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<title>kernel/git/stable/linux.git/tools/power/x86, branch linux-4.2.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-4.2.y</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-4.2.y'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2015-06-07T13:36:04+00:00</updated>
<entry>
<title>x86/uapi: Do not export &lt;asm/msr-index.h&gt; as part of the user API headers</title>
<updated>2015-06-07T13:36:04+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-06-04T16:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b72e7464e4cf80117938e6adb8c22fdc1ca46d42'/>
<id>urn:sha1:b72e7464e4cf80117938e6adb8c22fdc1ca46d42</id>
<content type='text'>
This header containing all MSRs and respective bit definitions
got exported to userspace in conjunction with the big UAPI
shuffle.

But, it doesn't belong in the UAPI headers because userspace can
do its own MSR defines and exporting them from the kernel blocks
us from doing cleanups/renames in that header. Which is
ridiculous - it is not kernel's job to export such a header and
keep MSRs list and their names stable.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1433436928-31903-19-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: update version number to 4.7</title>
<updated>2015-05-27T22:04:01+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2015-05-27T22:00:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=a68c7c3ff0469d79993ee85e8e0a3a9a568ce350'/>
<id>urn:sha1:a68c7c3ff0469d79993ee85e8e0a3a9a568ce350</id>
<content type='text'>
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: allow running without cpu0</title>
<updated>2015-05-27T22:04:01+00:00</updated>
<author>
<name>Prarit Bhargava</name>
<email>prarit@redhat.com</email>
</author>
<published>2015-05-25T12:34:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=7ce7d5de6dd08ee2a713ef13f4499073b4a72b7f'/>
<id>urn:sha1:7ce7d5de6dd08ee2a713ef13f4499073b4a72b7f</id>
<content type='text'>
Linux-3.7 added CONFIG_BOOTPARAM_HOTPLUG_CPU0,
allowing systems to offline cpu0.

But when cpu0 is offline, turbostat will not run:

 # turbostat ls
turbostat: no /dev/cpu/0/msr

This patch replaces the hard-coded use of cpu0 in turbostat
with the current cpu, allowing it to run without a cpu0.

Fewer cross-calls may also be needed due to use of current cpu,
though this hard-coding was used only for the --debug preamble.

Signed-off-by: Prarit Bhargava &lt;prarit@redhat.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: correctly decode of ENERGY_PERFORMANCE_BIAS</title>
<updated>2015-05-27T22:04:00+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2015-05-26T16:19:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e9be7dd62899194ebdd90d417fc6c07d5d157912'/>
<id>urn:sha1:e9be7dd62899194ebdd90d417fc6c07d5d157912</id>
<content type='text'>
When EPB is 0xF, turbosat was incorrectly describing it as "custom"
instead of calling it "powersave":

&lt; cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x0000000f (custom)
&gt; cpu0: MSR_IA32_ENERGY_PERF_BIAS: 0x0000000f (powersave)

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: enable turbostat to support Knights Landing (KNL)</title>
<updated>2015-05-27T22:03:57+00:00</updated>
<author>
<name>Dasaratharaman Chandramouli</name>
<email>dasaratharaman.chandramouli@intel.com</email>
</author>
<published>2015-05-20T16:49:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=fb5d432722e186c656285ccc088e35dbe24f6fd1'/>
<id>urn:sha1:fb5d432722e186c656285ccc088e35dbe24f6fd1</id>
<content type='text'>
Changes mainly to account for minor differences in Knights Landing(KNL):
1. KNL supports C1 and C6 core states.
2. KNL supports PC2, PC3 and PC6 package states.
3. KNL has a different encoding of the TURBO_RATIO_LIMIT MSR

Signed-off-by: Dasaratharaman Chandramouli &lt;dasaratharaman.chandramouli@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: correctly display more than 2 threads/core</title>
<updated>2015-05-27T21:26:42+00:00</updated>
<author>
<name>Dasaratharaman Chandramouli</name>
<email>dasaratharaman.chandramouli@intel.com</email>
</author>
<published>2015-04-15T17:09:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e275b3885dffd31095984ed2476ed0447fa7309a'/>
<id>urn:sha1:e275b3885dffd31095984ed2476ed0447fa7309a</id>
<content type='text'>
Without this update, turbostat displays only 2 threads per core.
Some processors, such as Xeon Phi, have more.

Signed-off-by: Dasaratharaman Chandramouli &lt;dasaratharaman.chandramouli@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: correct dumped pkg-cstate-limit value</title>
<updated>2015-04-18T18:20:52+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2015-04-02T01:02:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e9257f5fa48cc296d7eed35acf9f2ad195184122'/>
<id>urn:sha1:e9257f5fa48cc296d7eed35acf9f2ad195184122</id>
<content type='text'>
HSW expanded MSR_PKG_CST_CONFIG_CONTROL.Package-C-State-Limit,
from bits[2:0] used by previous implementations, to [3:0].
The value 1000b is unlimited, and is used by BDW and SKL too.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: calculate TSC frequency from CPUID(0x15) on SKL</title>
<updated>2015-04-18T18:20:52+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2015-04-02T01:02:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8a5bdf41d2c027c1e4ad62bc4f96f3fdf82070ba'/>
<id>urn:sha1:8a5bdf41d2c027c1e4ad62bc4f96f3fdf82070ba</id>
<content type='text'>
turbostat --debug
...
CPUID(0x15): eax_crystal: 2 ebx_tsc: 100 ecx_crystal_hz: 0
TSC: 1200 MHz (24000000 Hz * 100 / 2 / 1000000)

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: correct DRAM RAPL units on recent Xeon processors</title>
<updated>2015-04-18T18:20:52+00:00</updated>
<author>
<name>Andrey Semin</name>
<email>andrey.semin@intel.com</email>
</author>
<published>2014-12-05T05:07:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=40ee8e3b9dc8917e6077dde6a49c7a71d63b0231'/>
<id>urn:sha1:40ee8e3b9dc8917e6077dde6a49c7a71d63b0231</id>
<content type='text'>
While not yet documented in the Software Developer's Manual,
the data-sheet for modern Xeon states that DRAM RAPL ENERGY units
are fixed at 15.3 uJ, rather than being discovered via MSR.

Before this patch, DRAM energy on these products is over-stated by turbostat
because the RAPL units are 4x larger.

ref: "Xeon E5-2600 v3/E5-1600 v3 Datasheet Volume 2"
http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/xeon-e5-v3-datasheet-vol-2.pdf

Signed-off-by: Andrey Semin &lt;andrey.semin@intel.com&gt;
Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
<entry>
<title>tools/power turbostat: Initial Skylake support</title>
<updated>2015-04-18T18:20:51+00:00</updated>
<author>
<name>Len Brown</name>
<email>len.brown@intel.com</email>
</author>
<published>2015-03-26T04:50:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=0b2bb6925eb602eae993a4b5c282a8c18ad1c949'/>
<id>urn:sha1:0b2bb6925eb602eae993a4b5c282a8c18ad1c949</id>
<content type='text'>
Skylake adds some additional residency counters.

Skylake supports a different mix of RAPL registers
from any previous product.

In most other ways, Skylake is like Broadwell.

Signed-off-by: Len Brown &lt;len.brown@intel.com&gt;
</content>
</entry>
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