kernel/git/stable/linux.git/tools/testing/cxl, branch master

Merge branch 'for-7.3/cxl-misc' into cxl-for-next

2026-08-05T20:23:52+00:00

cxl/test: Assign one mock memdev a full-width serial number cxl/core: Format the memdev serial number as unsigned in TP_printk cxl/pmem: Format the nvdimm serial number as unsigned decimal

cxl/test: Assign one mock memdev a full-width serial number

2026-08-05T20:20:34+00:00

Mock memdev serial numbers have historically been derived from pdev->id, leaving them single-digit. As a result they never exercised either the decimal-vs-hex security-key lookup or unsigned formatting of large serial numbers. Give one mock memdev a full-width serial with bit 63 set. This mirrors real hardware (for example, Montage devices) and provides a test device that exposes both the hexadecimal-vs-decimal and signed-vs- unsigned formatting differences. pdev->id 7 is unused by the auto-region topology so the larger serial does not affect existing tests. This enables adding a new test case to cxl-security.sh that verify auto-unlock using a mock device whose serial exposes both formatting differences. Signed-off-by: Alison Schofield Link: https://patch.msgid.link/3e569a748fce4424b8622032fbffc298d92153b9.1784924949.git.alison.schofield@intel.com Signed-off-by: Dave Jiang

Merge branch 'for-7.3/cxl-type2-test' into cxl-for-next

2026-07-24T17:10:04+00:00

cxl_test support for type2 cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add() cxl/test: Add cxl_test accelerator driver cxl/test: Fixup hdm init for auto region to support type2 cxl/test: Propagate -ENOMEM on platform_device_alloc() failures cxl/test: Add hierarchy enumeration support for type2 device cxl/test: Refactor platform device enumerations cxl/test: Add type2 support for mock CFMWS0 cxl/test: Add test for module parameters

cxl/test: Rework cxl_type2_mem_init() to use cxl_mock_platform_device_add()

2026-07-14T15:30:21+00:00

cxl_type2_mem_init() is used to set up mock CXL type2 memory device for cxl testing, it introduces a known bug fixed by the following commit: commit d90f236f8b9e ("cxl/test: Update mock dev array before calling platform_device_add()") Mock CXL devices require updating the mock device array prior to platform_device_add(), otherwise, the CXL subsystem could fail to recognize the newly added mock device. Switch to cxl_mock_platform_device_add() helper to resolve this ordering issue. Besides, this patch also includes two minor changes. 1. Preserve the original error code returned by cxl_mock_platform_device_add(), rather than unconditionally overriding it with -ENOMEM. 2. Drop redundant NULL check before platform_device_unregister(), as the function internally handles NULL pointer. Fixes: 6b2e585142e6 ("cxl/test: Add hierarchy enumeration support for type2 device") Signed-off-by: Li Ming Reviewed-by: Dave Jiang Link: https://patch.msgid.link/20260713061531.56322-1-ming.li@zohomail.com Signed-off-by: Dave Jiang

Replace by more specific (c files)

2026-07-03T05:38:17+00:00

Replace the #include of by the more specific where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich Acked-by: Takashi Sakamoto Acked-by: Bjorn Helgaas Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub)

cxl/test: Add cxl_test accelerator driver

2026-06-30T17:47:31+00:00

Add a type2 accelerator mock driver for the platform device that simulates a CXL type2 device. The driver exercises the same minimal API calls that a real CXL type2 driver would utilize. Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-8-dave.jiang@intel.com Signed-off-by: Dave Jiang

cxl/test: Fixup hdm init for auto region to support type2

2026-06-30T17:47:31+00:00

Add support to setup initialization of decoders in order to support type2 auto region. Reviewed-by: Alison Schofield Tested-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-7-dave.jiang@intel.com Signed-off-by: Dave Jiang

cxl/test: Propagate -ENOMEM on platform_device_alloc() failures

2026-06-30T17:47:30+00:00

Set rc = -ENOMEM at every platform_device_alloc() failure site in cxl_rch_topo_init(), cxl_single_topo_init() and cxl_test_init() so the failure is propagated and the module load aborts cleanly. The cxl_acpi allocation site originates in the commit below, while the host-bridge/root-port/uport/dport allocation sites fixed here were added later in the single-host and RCH topology configs. Fixes: 67dcdd4d3b83 ("tools/testing/cxl: Introduce a mocked-up CXL port hierarchy") Fixes: e41c8452b9b2 ("tools/testing/cxl: Add a single-port host-bridge regression config") Fixes: c9435dbee119 ("tools/testing/cxl: Add an RCH topology") Assisted-by: Claude:claude-opus-4-8 Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-6-dave.jiang@intel.com Signed-off-by: Dave Jiang

cxl/test: Add hierarchy enumeration support for type2 device

2026-06-30T17:47:30+00:00

Add enumeration of type2 device hierarchy in cxl-test. The type2 device is setup to be directly attached to a root port instead of rp -> switch -> device that type3 hierarchy is setup.. Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-5-dave.jiang@intel.com Signed-off-by: Dave Jiang

cxl/test: Refactor platform device enumerations

2026-06-30T17:47:30+00:00

Split all the host bridges, rootports, upstream and downstream ports enumerations to separate helper functions. This should make adding type2 hierarchy easier later on. Tested-by: Alison Schofield Reviewed-by: Alison Schofield Link: https://patch.msgid.link/20260629221104.3891733-4-dave.jiang@intel.com Signed-off-by: Dave Jiang