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2026-06-05perf sched: Cap max_cpu at MAX_CPUS in timehist sample processingArnaldo Carvalho de Melo
perf_timehist__process_sample() updates sched->max_cpu from the sample CPU without bounds checking. Later code uses max_cpu + 1 as an iteration count over arrays allocated with MAX_CPUS entries (curr_thread, cpu_last_switched). A recording with CPU IDs >= MAX_CPUS causes out-of-bounds array accesses. Also cap the env->nr_cpus_online initialization of max_cpu in perf_sched__timehist(), which could exceed MAX_CPUS on very large systems. Add bounds checks before both max_cpu updates, matching the pattern already used in map_switch_event(). Fixes: 49394a2a24c7 ("perf sched timehist: Introduce timehist command") Reviewed-by: David Ahern <dsahern@kernel.org> Reported-by: sashiko-bot <sashiko-bot@kernel.org> Assisted-by: Claude:claude-opus-4.6 Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
2026-06-05power: supply: max17042_battery: Use modern PM ops to clear up warningNathan Chancellor
When building for a platform that does not have power management, such as s390, there is an unused function warning, as max17042_suspend_soc_alerts() is only used in max17042_suspend(), which is under a CONFIG_PM_SLEEP #ifdef. drivers/power/supply/max17042_battery.c:957:13: error: 'max17042_suspend_soc_alerts' defined but not used [-Werror=unused-function] 957 | static void max17042_suspend_soc_alerts(struct max17042_chip *chip) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~ Use the modern DEFINE_SIMPLE_DEV_PM_OPS(), which allows the compiler to see the functions as used while allowing it to eliminate them as unused during the optimization phase. Use pm_ptr() to allow the compiler to drop max17042_pm_ops when there is no PM support. Fixes: 601885ffb5e9 ("power: supply: max17042_battery: Keep only critical alerts during suspend") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Link: https://patch.msgid.link/20260604-max17042_battery-fix-unused-suspend_soc_alerts-v1-1-3562a68e6f36@kernel.org Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2026-06-05block: Enable lock context analysisBart Van Assche
Now that all block/*.c files have been annotated, enable lock context analysis for all these source files. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/e248ca3aeead238bbc489cf3afdafcbff9e41faf.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/mq-deadline: Make the lock context annotations compatible with ClangBart Van Assche
While sparse ignores the __acquires() and __releases() arguments, Clang verifies these. Make the arguments of __acquires() and __releases() acceptable for Clang. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/3b6e336ced91e27213608ffce205ccd24f4ba285.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/Kyber: Make the lock context annotations compatible with ClangBart Van Assche
While sparse ignores the __acquires() and __releases() arguments, Clang verifies these. Make the arguments of __acquires() and __releases() acceptable for Clang. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/91cb8c790fc8b26b8aa742569fbf8c2c1d099dac.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/blk-mq-debugfs: Improve lock context annotationsBart Van Assche
Make the existing lock context annotations compatible with Clang. Add the lock context annotations that are missing. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/f58fe220ff98f9dfddfed4573f40005c773b7fb7.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/blk-iocost: Inline iocg_lock() and iocg_unlock()Bart Van Assche
Both iocg_lock() and iocg_unlock() use conditional locking. Fold these functions into their callers such that unlocking becomes unconditional. Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/f8c9867788957d2e40a32e23c6d9b866e480ad9d.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/blk-iocost: Split ioc_rqos_throttle()Bart Van Assche
Prepare for inlining iocg_lock() and iocg_unlock() by moving the code between these two calls into a new function. No functionality has been changed. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/a6d3ed953cef6669d23a80923bf46600733cbdae.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/crypto: Annotate the crypto functionsBart Van Assche
Add the lock context annotations required for Clang's thread-safety analysis. Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@kernel.org> Cc: Eric Biggers <ebiggers@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/297b40e43a7f9b7d20e91a6c44b41a69d01f5c63.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/cgroup: Inline blkg_conf_{open,close}_bdev_frozen()Bart Van Assche
The blkg_conf_open_bdev_frozen() calling convention is not compatible with lock context annotations. Fold both blkg_conf_open_bdev_frozen() and blkg_conf_close_bdev_frozen() into their only caller. This patch prepares for enabling lock context analysis. The type of 'memflags' has been changed from unsigned long into unsigned int to match the type of current->flags. See also <linux/sched.h>. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/05661d1555decc6dd5389174ba448d803b72ed9a.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/blk-iocost: Combine two error paths in ioc_qos_write()Bart Van Assche
Reduce code duplication by combining two error paths. No functionality has been changed. Suggested-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/80d4fc1ecd5eaf187c0a31c63a1033a7326d4c7e.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/cgroup: Improve lock context annotationsBart Van Assche
Add lock context annotations where these are missing. Move the blkg_conf_prep() annotation into block/blk-cgroup.h to make it visible to all blkg_conf_prep() callers. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/58ddd6e2b960bdfa03d0007984386bc0ba351391.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/cgroup: Split blkg_conf_exit()Bart Van Assche
Split blkg_conf_exit() into blkg_conf_unprep() and blkg_conf_close_bdev() because blkg_conf_exit() is not compatible with the Clang thread-safety annotations. Remove blkg_conf_exit(). Rename blkg_conf_exit_frozen() into blkg_conf_close_bdev_frozen(). Add thread-safety annotations to the new functions. Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@kernel.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/c1ec1f1c4b675bc5f187f77b3e6436234c6b244c.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/cgroup: Split blkg_conf_prep()Bart Van Assche
Move the blkg_conf_open_bdev() call out of blkg_conf_prep() to make it possible to add lock context annotations to blkg_conf_prep(). Change an if-statement in blkg_conf_open_bdev() into a WARN_ON_ONCE() call. Export blkg_conf_open_bdev() because it is called by the BFQ I/O scheduler and the BFQ I/O scheduler may be built as a kernel module. Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@kernel.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/e6ea0387f413217c8561a0ca54ce7b846aa5c7c5.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block/bdev: Annotate the blk_holder_ops callback functionsBart Van Assche
The four callback functions in blk_holder_ops all release the bd_holder_lock. Annotate these functions accordingly. Reviewed-by: Hannes Reinecke <hare@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/be51cf81110f691ebd5868ac2f15ceb847805bc8.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05block: Annotate the queue limits functionsBart Van Assche
Let the thread-safety checker verify whether every start of a queue limits update is followed by a call to a function that finishes a queue limits update. Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Hannes Reinecke <hare@kernel.org> Signed-off-by: Bart Van Assche <bvanassche@acm.org> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Link: https://patch.msgid.link/8f71062b6d0fcf2b80bc8cda701c453224755439.1780682325.git.bvanassche@acm.org Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05Merge tag 'kbuild-fixes-7.1-3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/kbuild/linux Pull Kbuild fix from Nicolas Schier: "A single simple commit that fixes the currently broken kconfig selftests" * tag 'kbuild-fixes-7.1-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kbuild/linux: kconfig: Fix repeated include selftest expectation
2026-06-05Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds
Pull kvm fixes from Paolo Bonzini: "arm64: - Correctly drop the ITS translation cache reference when it actually gets invalidated - Take the SRCU lock for SW page table walks - Restore POR_EL0 access to host EL0, avoiding POR_EL0 becoming inaccessible from EL0 after running a guest - Reassign nested_mmus array behind mmu_lock, ensuring that vcpu init and MMU notifiers are mutually exclusive - Correctly handle FEAT_XNX at stage-2 s390: - More fixes for the new page table management and nested virtualization x86: - More fixes for GHCB issues: - Read start/end indices of page size change requests exactly once per vmexit - Unmap and unpin the GHCB as needed on vCPU free" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (23 commits) KVM: arm64: Correctly identify executable PTEs at stage-2 KVM: arm64: nv: Fix handling of XN[0] when !FEAT_XNX KVM: arm64: Reassign nested_mmus array behind mmu_lock KVM: arm64: Restore POR_EL0 access to host EL0 KVM: arm64: Take the SRCU lock for page table walks in fault injection and AT emulation KVM: arm64: vgic-its: Drop the translation cache reference only for the erased entry KVM: SEV: Unmap and unpin the GHCB as needed on vCPU free KVM: SEV: Decouple the need to sync the GHCB SA from the need to free the SA KVM: SEV: Move sev_free_vcpu() down below sev_es_unmap_ghcb() KVM: Don't WARN if memory is dirtied without a vCPU when the VM is dying KVM: SEV: Read start/end indices of PSC requests exactly once per #VMGEXIT KVM: SEV: Add an anonymous "psc" struct to track current PSC metadata KVM: SEV: Make it more obvious when KVM is writing back the current PSC index KVM: s390: Remove ptep_zap_softleaf_entry() KVM: s390: Fix possible reference leak in fault-in code KVM: s390: Prevent memslots outside the ASCE range KVM: s390: Lock pte when making page secure KVM: s390: Fix fault-in code KVM: s390: vsie: Fix rmap handling in _do_shadow_crste() KVM: s390: Fix guest / virtual address confusion in _essa_clear_cbrl() ...
2026-06-05Merge tag 'probes-fixes-v7.1-rc6' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace Pull tracing/probes fix from Masami Hiramatsu: "Fix the eprobe event parser to point error position correctly" * tag 'probes-fixes-v7.1-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/trace/linux-trace: tracing/probes: Point the error offset correctly for eprobe argument error
2026-06-05RDMA/siw: Fix endpoint/socket association handlingBernard Metzler
Disassociating a socket from an endpoint via siw_socket_disassoc() may release the last reference on that endpoint and free it. Therefore, don't clear the endpoints socket pointer after calling that function, but within. This fixes a: BUG: KASAN: slab-use-after-free in siw_cm_work_handler (drivers/infiniband/sw/siw/siw_cm.c:1053 drivers/infiniband/sw/siw/siw_cm.c:1075) which occurred after processing a malformed MPA request during connection establishment, causing the new endpoint to be closed. Fixes: 6c52fdc244b5c ("rdma/siw: connection management") Link: https://patch.msgid.link/r/20260604160808.30948-1-bernard.metzler@linux.dev Reported-by: Shuangpeng Bai <shuangpeng.kernel@gmail.com> Signed-off-by: Bernard Metzler <bernard.metzler@linux.dev> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-06-05arm64: defconfig: Enable DP83822 PHY driverStefan Wahren
Enable DP83822 PHY driver as a module to support the Ethernet PHY, which is placed on phyCORE-i.MX93 SOM. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05kconfig: Fix repeated include selftest expectationZhou Yuhang
The err_repeated_inc test was added with an expected stderr fixture that does not match the diagnostic printed by kconfig. Running "make testconfig" currently fails in that test even though the parser reports the duplicated include correctly: [stderr] Kconfig.inc1:4: error: repeated inclusion of Kconfig.inc3 Kconfig.inc2:3: note: location of first inclusion of Kconfig.inc3 The fixture expects "Repeated" and "Location" with capital letters, but the diagnostic emitted by scripts/kconfig/util.c uses lowercase words. Update the fixture to match the real message. Fixes: 102d712ded3e ("kconfig: Error out on duplicated kconfig inclusion") Signed-off-by: Zhou Yuhang <zhouyuhang@kylinos.cn> Tested-by: Nicolas Schier <nsc@kernel.org> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Link: https://patch.msgid.link/20260520070800.2265479-1-zhouyuhang1010@163.com Signed-off-by: Nicolas Schier <nsc@kernel.org>
2026-06-05block: Add WQ_PERCPU to alloc_workqueue usersMarco Crivellari
This continues the effort to refactor workqueue APIs, which began with the introduction of new workqueues and a new alloc_workqueue flag in: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") The refactoring is going to alter the default behavior of alloc_workqueue() to be unbound by default. With the introduction of the WQ_PERCPU flag (equivalent to !WQ_UNBOUND), any alloc_workqueue() caller that doesn’t explicitly specify WQ_UNBOUND must now use WQ_PERCPU. For more details see the Link tag below. In order to keep alloc_workqueue() behavior identical, explicitly request WQ_PERCPU. Link: https://lore.kernel.org/all/20250221112003.1dSuoGyc@linutronix.de/ Suggested-by: Tejun Heo <tj@kernel.org> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com> Reviewed-by: Chaitanya Kulkarni <kch@nvidia.com> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://patch.msgid.link/20260604105347.168322-1-marco.crivellari@suse.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-06-05arm64: dts: imx{91,93}-phyboard-segin: Add peb-av-18 overlaysFlorijan Plohl
Add overlay for the PHYTEC Audio/Video adapter module PEB-AV-18 on phyBOARD-Segin-i.MX91/93 boards. The supported AC220 display is Powertip PH800480T032-ZHC19 panel with a backlight and Ilitek touch-screen controller. Signed-off-by: Florijan Plohl <florijan.plohl@norik.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx93-var-som-symphony: enable ADCStefano Radaelli
Enable ADC1 on the Symphony carrier board and describe its 1.8 V reference supply. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx93-var-som-symphony: enable TPM3 PWMStefano Radaelli
Enable TPM3 on the Symphony carrier board and add the pinctrl states for the PWM output and sleep configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx93-var-som-symphony: keep RGB_SEL lowStefano Radaelli
Keep the RGB_SEL line driven low on the Symphony carrier board. This avoids leaving the line floating and ensures the board remains in the expected display configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx93-var-som-symphony: enable UART7Stefano Radaelli
Enable UART7 on the Symphony carrier board and add its pinctrl configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx93-var-som-symphony: add TPM supportStefano Radaelli
Add the ST33KTPM2XI2C TPM device on the Symphony carrier board. The TPM reset line is driven through a PCAL6408 GPIO expander, so add the expander on the I2C bus and describe the TPM reset GPIO. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx91-var-som-symphony: fix RGB_SEL handlingStefano Radaelli
RGB_SEL is a board-level signal driven by the PCAL6408 GPIO expander on the Symphony carrier board. The signal needs to be driven high on the i.MX91 variant to keep the board in the expected display configuration. Move the handling of this line from a fixed regulator tied to the PCAL6408 supply to a GPIO hog on the correct GPIO expander. Fixes: b3292129dcef ("arm64: dts: imx91-var-som: Add support for Variscite Symphony board") Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: freescale: fsl-ls1028a-tqmls1028a-mbls1028a: switch mmc aliasesNora Schiffer
All modern TQ-Systems boards follow the convention that mmc0 is the eMMC and mmc1 is the SD-card when both interfaces exist, reducing differences between boards for both documentation and U-Boot code (which uses the same Device Trees). Adjust the recently added MBLS1028A Device Tree accordingly. Fixes: 0538ca1f102d ("arm64: dts: ls1028a: Add mbls1028a and mbls1028a-ind devicetrees") Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx943-evk-sdwifi: add a new dtso to support SDIW612 WiFiSherry Sun
Add a new imx943-evk-sdwifi.dtso to support SDIW612 WiFi chip on imx943-evk board, the default imx943-evk.dtb is used to support PCIE AW693 WiFi. Use separate dts for SDIW612 and PCIe AW693 WiFi to avoid the shared regulator between SDIO and PCIe buses, the random probe order between the two buses may break the PCIe initialization sequence which cause AW693 has probability of failing to detect. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx8mp-kontron: Fix GPIO for display power switchFrieder Schrempf
The GPIO that controls the power supply for the LVDS display connector has changed between early prototypes and the current production design of the hardware. Reflect this change in the devicetree to properly switch on the panel supply. This was working before even with the wrong GPIO due to the bidirectional level shifter used on the board which drives the EN signal high even when the input has a (weak) pull down configured as reset condition of the SoC pad. As a result the display was working but the supply was always on. Tested on BL i.MX8MP to show the correct voltage level on the level shifter input. Fixes: 946ab10e3f40 ("arm64: dts: Add support for Kontron OSM-S i.MX8MP SoM and BL carrier board") Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: freescale: imx95-aquila: Add Clover carrier boardAntoine Gouby
Add support for the Aquila i.MX95 SoM mated with the Clover carrier board. Clover is a low-cost carrier board for the Aquila family featuring a small form factor (Nano-ITX 120mm x 120mm) and built for volume production. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/clover Signed-off-by: Antoine Gouby <antoine.gouby@toradex.com> Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: freescale: add Aquila iMX95 supportJoão Paulo Gonçalves
Add support for the Toradex Aquila iMX95 and its development carrier board. The module consists of an NXP i.MX95 family SoC, up to 16GB LPDDR5 RAM, up to 128GB of storage, a USB 3.2 OTG and USB 2.0 Host, a Gigabit Ethernet PHY, a 10 Gigabit Ethernet interface, an I2C EEPROM and Temperature Sensor, an RX8130 RTC, one Quad lane CSI interface, one Quad lane DSI or CSI interface, one LVDS interface (one or two channels), and some optional addons: DisplayPort (through a DSI-DP bridge), TPM 2.0, and a WiFi/BT module. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com> Co-developed-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Co-developed-by: Antoine Gouby <antoine.gouby@toradex.com> Signed-off-by: Antoine Gouby <antoine.gouby@toradex.com> Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com> Co-developed-by: Franz Schnyder <franz.schnyder@toradex.com> Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05dt-bindings: arm: fsl: add Aquila iMX95Franz Schnyder
Add DT compatible strings for the Aquila i.MX95 SoM and its supported carrier boards: the Aquila Development Board and the Clover carrier board. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Link: https://www.toradex.com/products/carrier-board/clover Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Franz Schnyder <franz.schnyder@toradex.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: tqma8mpql-mba8mpxl: configure sai clock in audio codec as wellAlexander Stein
With deferrable card binding the sound card driver tries to get the mclk configuration before it is setup in sai3 node. Fix this by setting the sai clock config for the audio codec as well. Fixes: d8f9d8126582 ("arm64: dts: imx8mp: Add analog audio output on i.MX8MP TQMa8MPxL/MBa8MPxL") Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: freescale: add i.MX95 19x19 FRDM PRO board dtsJoseph Guo
NXP i.MX95 19x19 FRDM PRO is cost-effective with extensive expansion capabilities based on the i.MX95 19x19 SoC. It is designed for AI and robotic situation. Difference with i.MX95 15x15 FRDM: - Use i.MX95 19x19 package - Support 2 KEY-M M.2 PCIE - 10G ETH interface - Secure Element interface Add device tree for this board. Including: - LPUART1 and LPUART5 - NETC - USB - 2 M-Key M.2 PCIe - uSDHC1, uSDHC2 and uSDHC3 - FlexCAN1 and FlexCAN3 (CAN1 is reserved by M7) - LPI2C3, LPI2C4 and their child nodes - Watchdog3 - SAI, MQS, MICFIL Signed-off-by: Joseph Guo <qijian.guo@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05dt-bindings: arm: fsl: Add i.MX95 19x19 FRDM PRO boardJoseph Guo
Add the i.MX95 19x19 FRDM PRO board in the binding document. Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Joseph Guo <qijian.guo@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: s32g: add PWM support for s32g2 and s32g3Khristine Andreea Barbulescu
Add PWM0 and PWM1 for S32G2 and S32G3 SoCs Reviewed-by: Enric Balletbo i Serra <eballetb@redhat.com> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: s32g3: Fix SWT8 watchdog addressKrzysztof Kozlowski
Add missing hex annotation to fix the SWT8 watchdog address in 'reg' property, as reported by dtc W=1: s32g3.dtsi:863.27-869.5: Warning (simple_bus_reg): /soc@0/watchdog@40500000: simple-bus unit address format error, expected "269fb20" Lack of hex '0x' meant address would be interpreted as decimal thus completely different value used as this device MMIO. If device was enabled this could lead to corruption of other device address space and broken boot. Cc: stable@vger.kernel.org Fixes: 6db84f042745 ("arm64: dts: s32g3: Add the Software Timer Watchdog (SWT) nodes") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx95-var-dart-sonata: add CAN controllerStefano Radaelli
Add the MCP251xFD CAN controller connected to LPSPI7 chip select 1 on the Sonata carrier board. Add the second SPI chip select GPIO and describe the CAN interrupt and pinctrl configuration. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx95-var-dart-sonata: add TPM reset GPIOStefano Radaelli
Add the reset GPIO for the TPM device on the Sonata carrier board and label the node accordingly. Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: imx8dxl: Add SolidRun SoM and HummingBoardJosua Mayer
Add support for the SolidRun i.MX8DXL System-on-Module (revision 2.1) and its corresponding evaluation carrier board, the HummingBoard Telematics (revision 2.0). The SoM features: - eMMC - GNSS with 1PPS - V2X DSRC Radio - Secure Element for V2X Applications - Inertial Sensor - Pressure Sensor - Compass The HummingBoard Telematics carrier board features: - Cellular Modem - WiFi & Bluetooth - RTC with backup battery - CAN - 100Base-TX Ethernet - 100Base-T1 Ethernet - Multi-interface I/O connector - Multi-interface add-on board connector The multi-interface I/O connector supplies power and provides basic I/O (Console UART, 100Base-TX, 100Base-T1, CAN, and power-supply logic level GPIOs). The SolidRun Evaluation Kit includes a suitable cable and adapter board that breaks these out into RJ45, USB Type-A, microUSB Console, and Terminal Block connectors. The multi-interface add-on board connector provides additional interfaces (5x 100Base-T1, 2x SGMII, USB 2.0 shared with the cellular modem, CAN, MDIO, SPI, UART, PCIe, I2C, and GPIO). These add-on interfaces are disabled by default in the base device tree and are intended to be enabled and extended via device tree overlays. Note that a few components physically present on the SoM were omitted from this description due to a lack of upstream bindings and drivers: - Pressure Sensor - V2X DSRC Radio - Secure Element Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05dt-bindings: arm: fsl: Add SolidRun i.MX8DXL SoM and HummingBoardJosua Mayer
Add binding for the SolidRun i.MX8DXL based System on Module, and the reference HummingBoard Telematics. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: Add support for LX2160 Twins board in single configurationJosua Mayer
Add support for the SolidRun LX2160A Twins board in its single cpu configuration. The twins board is designed to host a pair of LX2160A CEX-7 modules, sharing a single PCI-E connector in multi-host mode. It may be assembled in two configurations (different assembly options facilitating signal re-routing), with a single or with dual CEX-7 module. Their marketing names are: - SolidWAN Single LX2160 - SolidWAN Dual LX2160 Add the single configuration, featuring: - 8x SFP (1Gbps) - 8x SFP+ (1/10Gbps) - PCI-E OCP card connector - USB-3.0 front-panel header with single port - microSD - dual hot-swappable power supplies Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: lx2160a-cex7: add usb hubJosua Mayer
LX2160A CEX-7 module provides a total of 4 USB ports to the carrier board, one from first usb controller, and 3 from a hub behind the second controller. Both controllers currently have their status set okay in the module's dtsi file. However devices should be disabled by default when incomplete. The first USB controller is only completed by a carrier board featuring a device or USB connector. The second controller hosts a USB hub and should therefore be active. Add description for the USB hub, and enable the first controller only in the carrier board description. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: lx2160a-clearfog-itx: move shared includes to dtsJosua Mayer
Originally includes were defined hierarchically: - CEX-7 Module includes SoC - Clearfog-CX & Honeycomb common parts include CEX-7 Module - Boards include common parts This makes it difficult to modify the includes on a per-board level, e.g. when adding a new board based on CEX-7 module but revision 2 SoC (which now has its own soc dtsi). Move includes of both SoC and CEX-7 module out of common parts and into each board dts. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05arm64: dts: lx2160a-clearfog-itx: remove redundant dts version tagJosua Mayer
The dts version tag should only appear in the top level dts file. Since the cex-7 module and clearfog-itx are shared code intended for inclusion, drop their dts version tags. Signed-off-by: Josua Mayer <josua@solid-run.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-05dt-bindings: arm: fsl: Add solidrun lx2160a twins boardJosua Mayer
The SolidRun LX2160A Twins board supports two configurations, one with with a single CEX-7 module, and one with two (dual). The single configuration is a specific assembly that maximises connectivity for single cpu by routing some second cpu resources to the first via zero-Ohm resistors. The dual configuration was not yet tested and is intentionally omitted. Initial review strongly suggests that the dual configuration will have different bindings, because from either cpu point of view the board appears different (e.g. different number of sfp, fewer i2c gpio). Add binding for the single variant only. Signed-off-by: Josua Mayer <josua@solid-run.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-08 06:11:27 +0000