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The ES8316 has separate AVDD, CPVDD, DVDD and PVDD supply inputs for
its analog, charge pump, digital core and digital I/O domains. Describe
all four inputs so boards can model the codec power topology.
The binding also covers ES8311 and ES8323, whose supply inputs differ,
so restrict these properties to the ES8316 compatible. Keep them
optional for compatibility with existing descriptions.
Signed-off-by: Hongyang Zhao <hongyang.zhao@thundersoft.com>
Link: https://patch.msgid.link/20260812-es8316-regulator-next-20260722-v2-1-e7078bc9bc9c@thundersoft.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Document ESWIN EIC7700 SoC compatible for syscon registers.
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260804104431.1391839-5-pinkesh.vaghela@einfochips.com
Signed-off-by: Lee Jones <lee@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner
Pull Allwinner clk driver updates from Chen-Yu Tsai:
Some cleanups to the Allwinner clock driver library and support for the
Allwinner A733 RTC clocks added.
* tag 'sunxi-clk-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
clk: sunxi-ng: sun6i-rtc: add a733 support
clk: sunxi-ng: sun6i-rtc: split main oscillator div and gate
clk: sunxi-ng: div: add read-only operation support
clk: sunxi-ng: mux: fix determine helper rate propagation
clk: sunxi-ng: mux: remove unneeded export
clk: sunxi-ng: sun6i-rtc: Add feature bit for IOSC calibration
clk: sunxi-ng: sun6i-rtc: clean up DT usage
clk: sunxi-ng: fix ccu probe clock unregister on error
dt-bindings: rtc: sun6i: add sun60i-a733 support
dt-bindings: rtc: sun6i: no clock-output-names on h616/r329
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-qcom
Pull Qualcomm clk driver updates from Bjorn Andersson:
Add global, TCSR, RPMh, and video clock controller support for Maili.
Add global, RPM, GPU, display, and audio core clock controller support for
Shikra. Add display and graphics clock controllers for Nord.
Add Glymur camera and EVA clock controllers, the IPQ9650 REFGEN clocks, and
Hawi video clock controller support. Extend the IPQ5210 APSS PLL and RPM
clock support for Agatti.
Enable runtime PM and regulator-backed reference clock handling where needed.
Update QCM2290 clock and power-domain handling, critical clock definitions,
and arm architecture Kconfig defaults.
Correct MDM9607, MSM8916, MSM8939, SM6115, QCS8300, Kaanapali, and Glymur
clock and power-domain handling. Improve GDSC error propagation and teardown.
Update bindings for the added controllers and required power and OPP
properties.
* tag 'qcom-clk-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (94 commits)
clk: qcom: Add support for Qualcomm GPU Clock Controller on Shikra
clk: qcom: Return expected ENOMEM error on dynamic allocation failure
clk: qcom: apss-ipq-pll: Add IPQ5210 support
dt-bindings: clock: qcom,a53pll: Add IPQ5210 compatible
clk: qcom: Add support for videocc driver on Qualcomm Maili SoC
dt-bindings: clock: qcom: Add Qualcomm Maili video clock controller
dt-bindings: clock: qcom: Add Qualcomm Shikra GPU clock controller
dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller
clk: qcom: gpucc-qcm2290: Park RCG's clk source at XO during disable
clk: qcom: gpucc-qcm2290: Keep the critical clocks always-on from probe
clk: qcom: gpucc-qcm2290: Move to the latest common qcom_cc_probe() model
clk: qcom: gpucc-qcm2290: Drop pm_clk handling
clk: qcom: qcm2290: Update DISPCC and GPUCC GDSC *wait_val values
clk: qcom: qcm2290: Add RETAIN_FF_ENABLE flag for DISPCC and GPUCC GDSCs
clk: qcom: qcm2290: Set POLL_CFG_GDSCR flag for DISPCC and GPUCC GDSCs
clk: qcom: dispcc-qcm2290: Enable runtime PM support
clk: qcom: dispcc-qcm2290: Move to the latest common qcom_cc_probe() model
clk: qcom: gcc-qcm2290: Keep the critical clocks always-on from probe
dt-bindings: clock: qcom,qcm2290-dispcc: Add missing power-domains property
clk: qcom: Add Audio Core clock controller support on Qualcomm Shikra SoC
...
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https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-rockchip
Pull Rockchip clk driver updates from Heiko Stuebner:
- Clock driver for Rockchip RV1106
- Fix for Rockchip rk3576 spi source mux
- Better representing fractional PLL coefficients in Rockchip
clk driver
- Fix for the Rockchip dclk of the 3rd video-port to not affect
other compoents when its rate gets changed
* tag 'v7.3-rockchip-clk1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
clk: rockchip: rk3576: fix source muxes for SPI0..SPI4
clk: rockchip: Add clock controller for the RV1106
dt-bindings: clock: rockchip: Add RV1106 CRU support
clk: rockchip: Fractional PLL coefficient on RK3588/RK3576 is two's complement
clk: rockchip: Fix the fractional part denominator on RK3588/RK3576 PLLs
clk: rockchip: rk3588: Allow VP2 the same sourcing options as other VPs
clk: rockchip: rk3588: Don't change PLL rates when setting dclk_vop2_src
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clk-amlogic
Pull Amlogic clk driver updates from Jerome Brunet:
- Fix the incorrect parent number of the 32k clock on Amlogic GXBB
- Add the AO and peripheral clock controllers for the new Amlogic A9 chip
* tag 'clk-meson-v7.3-1' of ssh://github.com/BayLibre/clk-meson:
clk: amlogic: Add A9 peripherals clock controller driver
dt-bindings: clock: Add Amlogic A9 peripherals clock controller
clk: amlogic: Add A9 AO clock controller driver
dt-bindings: clock: Add Amlogic A9 AO clock controller
clk: meson: align gxbb_32k_clk_sel number of parents with actual count
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clk-mobileye
Pull Mobileye clk driver updates from Benoît Monin:
- Add support for Mobileye EyeQ7H
This patchset brings the support of the Other Logic Blocks (OLB)
found in the first Mobileye SoC based on the RISC-V architecture, the
EyeQ7H. Despite the change from MIPS to RISC-V, the Other Logic Blocks
provide similar clock and reset functions to the controllers of the
chip. This series introduces the device tree bindings of the SoC and
the necessary changes to the clock and reset eyeq drivers.
Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
* tag 'clk-eyeq7h-7.3' of ssh://github.com/benoitmonin/linux:
clk: eyeq: Add EyeQ7H compatibles
clk: eyeq: Drop PLL, dividers, and fixed factors structs
clk: eyeq: Convert clocks declaration to eqc_clock
clk: eyeq: Introduce a generic clock type
clk: eyeq: Prefix the PLL registers with the PLL type
clk: fixed-factor: Export __clk_hw_register_fixed_factor()
clk: fixed-factor: Rework initialization with parent clocks
reset: eyeq: Add EyeQ7H compatibles
dt-bindings: soc: mobileye: Add EyeQ7H OLB
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Convert the Texas Instruments OMAP L4 interconnect bus bindings
to DT schema.
During the conversion, several updates were made:
- Defined the compatible property as an array to require
the TI-specific string first, followed by either 'simple-bus' or
'simple-pm-bus'.
- Added a 'select' block to ensure this schema is only
applied to TI-specific nodes, preventing duplicate
schema warnings against the core simple-pm-bus.yaml.
- Added the L4 compatible strings used by the boards but missing from
the text binding, and corrected the 'ti,am3-l4-wkup' typo to
'ti,am33xx-l4-wkup'.
- Made 'reg' and 'reg-names' optional.
Signed-off-by: Eduard Bostina <egbostina@gmail.com>
Link: https://patch.msgid.link/20260810134051.380538-1-egbostina@gmail.com
[robh: move to bindings/bus/]
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Convert the Texas Instruments SmartReflex bindings to DT schema.
Signed-off-by: Eduard Bostina <egbostina@gmail.com>
Link: https://patch.msgid.link/20260810131641.352391-1-egbostina@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Add compatible string for StarFive JHB100 plic.
Signed-off-by: Ley Foon Tan <leyfoon.tan@starfivetech.com>
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Link: https://patch.msgid.link/20260806122553.182449-3-changhuang.liang@starfivetech.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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Add the Maili sound card compatible to the SM8450-family sound card
bindings.
Signed-off-by: Prasad Kumpatla <prasad.kumpatla@oss.qualcomm.com>
Link: https://patch.msgid.link/20260811084605.1820056-2-prasad.kumpatla@oss.qualcomm.com
Signed-off-by: Mark Brown <broonie@kernel.org>
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Add qcom,glymur-qmp-gen5x8-pcie-phy.yaml as a standalone binding for the
Glymur Gen5 PCIe PHY hardware block. This block supports two link modes,
selected at runtime via a TCSR syscon register:
1. x8 - a single 8-lane PHY instance is exposed
2. x4+x4 - two independent 4-lane PHY instances are exposed
Keep this as a separate schema from qcom,sc8280xp-qmp-pcie-phy.yaml rather
than folding it into the shared compatible list there, since the two PHY
instances active in x8 mode require twice as many clocks, resets, and
power-domains as any other entry in that file, and adding Glymur-specific
properties like qcom,link-mode and reg-names there would only apply to
this one compatible.
Document the required clocks, resets, and power-domains for both PHY
instances, and use #phy-cells = <1>, where the cell value is the PHY
index within the active link mode.
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Qiang Yu <qiang.yu@oss.qualcomm.com>
Link: https://patch.msgid.link/20260807-glymur_linkmode_0807-v9-1-dd1c7e236e29@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
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Correct a few white-space issues, like double space after '=' or before
bracket '{' characters, which will be flagged by dt-check-style. No
functional changes.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260801195517.235161-2-krzysztof.kozlowski@oss.qualcomm.com
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Document the basic hardware layout of SMSC (now Microchip)
EMC1402/1403/1404/1428 thermal sensors.
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260731113007.145322-2-clamor95@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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'qualcomm/msm', 'rockchip', 'ti/omap', 'riscv', 'intel/vt-d', 'amd/amd-vi', 'core' and 'typos' into next
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Require DP1000 PCIe controller nodes to provide clocks and clock-names,
using the standard DesignWare clock names "core", "dbi", and "aux".
Fixes: d9ff07f45955 ("dt-bindings: PCI: Add UltraRISC DP1000 PCIe controller")
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260731-ultrarisc-pci-clk-v4-1-d738b491e49a@ultrarisc.com
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Add device tree binding documentation for the DAPU Telecom DAP8211R(I)
Gigabit Ethernet PHY.
The PHY supports TX and RX clock delays in 150 ps steps from 0 to 2250 ps,
with a default of 1950 ps if not specified.
Signed-off-by: Artem Shimko <a.shimko.dev@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260805085540.452260-3-a.shimko.dev@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Add vendor prefix for Guangdong Dapu Telecom Co., Ltd. [1], a manufacturer
of Ethernet PHYs, networking and other equipment. The prefix will be
used in the DAP8211R(I) Gigabit Ethernet PHY binding.
[1] https://www.dptel.com/
Signed-off-by: Artem Shimko <a.shimko.dev@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260805085540.452260-2-a.shimko.dev@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Add the compatible for the pin controller of the Rockchip RV1106 and
its RV1103 package variant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linusw@kernel.org>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into clk-fixes
Pull Qualcomm clock driver fixes from Bjorn Andersson:
- Fix the Eliza display clock controller to avoid RCG stall.
Revert the rework of the "PHY mux" clock, as this broke PCIe
on several different targets
- Drop (and correct one) bouncing maintainer email addresses in
Qualcomm clk DeviceTree bindings
* tag 'qcom-clk-fixes-for-7.2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
dt-bindings: clock: Replace bouncing emails
Revert "clk: qcom: regmap-phy-mux: Rework the implementation"
clk: qcom: dispcc-eliza: Fix disp_cc_mdss_mdp_clk_src RCG stall on Eliza EVK
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https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt
Apple SoC DTS changes for 7.3
- Initial M3 Pro, Max and Ultra device trees, which are responsible for
the majority of the diffstat. These include CPU cores, interrupt
controller, power state, watchdog, serial pin/gpio controller, i2c and
the boot framebuffer. They are now on par with the base M3 device
trees.
- HWMON sensors for M1/M2
- "pmgr-misc" nodes for M1/2 Pro/Max/Ultra which saves about 1W of power
on these machines. The corresponding driver and dt-binding are part of
the Apple SoC driver changes tag for this cycle.
Signed-off-by: Sven Peter <sven@kernel.org>
* tag 'apple-soc-dt-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux: (22 commits)
arm64: dts: apple: Initial T6030 (M3 Pro) device trees
arm64: dts: apple: Initial T603[124] (M3 Max and Ultra) device trees
dt-bindings: pwm: apple,s5l-fpwm: Add t6030 and t6031 compatibles
dt-bindings: i2c: apple,i2c: Add t6030 and t6031 compatibles
dt-bindings: power: apple,pmgr-pwrstate: Add t6030 and t6031 compatibles
dt-bindings: arm: apple: apple,pmgr: Add t6030 and t6031 compatibles
dt-bindings: interrupt-controller: apple,aic2: Add apple,t6031-aic3 compatible
dt-bindings: interrupt-controller: apple,aic2: Invert #interrupt-cells condition
dt-bindings: arm: apple: Add M3 Pro/Max/Ultra devices (T603x)
arm64: dts: apple: t60xx: jxxx: Add device-specific SMC hwmon sensors
arm64: dts: apple: t8112: jxxx: Add device-specific SMC hwmon sensors
arm64: dts: apple: t8103: jxxx: Add device-specific SMC hwmon sensors
arm64: dts: apple: t602x: Add common SMC hwmon sensors
arm64: dts: apple: t600x: Add common SMC hwmon sensors
arm64: dts: apple: t8112: Add common SMC hwmon sensors
arm64: dts: apple: t8103: Add common SMC hwmon sensors
arm64: dts: apple: Add common SMC hwmon infrastructure
arm64: dts: apple: t602x: Add SMC hwmon node
arm64: dts: apple: t600x: Add SMC hwmon node
arm64: dts: apple: t8103: Add SMC hwmon node
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt
More Qualcomm Arm64 DeviceTree updates for v7.3
Introduce the Asus Zenbook A16 (UX3607OA).
Add IPQ9574 PCIe bridge descriptions and enable PCIe0 and PCIe2 for
QCN92xx Wi-Fi cards on RDP454. Align IPQ5018, IPQ6018, and IPQ8074 PCIe
PHY and reset descriptions with the port-node binding.
Extend Shikra platform enablement with CQM and IQS SoM Wi-Fi and Bluetooth
descriptions. Enable CDSP, LPAICP, and MPSS remote processors on CQM, CQS,
and IQS EVKs, and add SMP2P, QUPv3, DDR bandwidth monitor, CPU frequency
hardware, EPSS L3 interconnect, OPP tables, thermal zones, GPIO
reservations, and display and GPU clock controllers.
Enable Eliza CQS EVK audio and add its LPASS macro and SoundWire
descriptions. Add PMIC ADC support for Hamoa, Monaco, and Lemans, and
ADC channel macros for the third-generation ADC block. Add minidump SRAM
configurations across affected Qualcomm platforms.
Fix QMP PHY vdda-phy and vdda-pll supply assignments across Qualcomm
platforms. Correct PCIe IOMMU mappings for QCS6490, Lemans, Monaco,
Talos, SM, SC, and related boards. Fix the Glymur/Mahua PDC interrupt
mapping, USB HS properties, and wakeup configuration; correct board
identifiers, pin configuration, GPIO supplies, default bus frequency, and
DT validation issues.
Enable the X1E80100 deepest idle state, configure SPMI ADC thermal
monitoring on SM8550 and SM8650, add the Milos GPU clock controller, and
assign SM8650 CCI clock rates.
* tag 'qcom-arm64-for-7.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (117 commits)
arm64: dts: qcom: talos-evk: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sa8155p-adp: Fix swapped USB and UFS QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: eliza-mtp: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: lemans: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: glymur: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: kaanapali: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sar2130p: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sm8750: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sm8650: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: purwa: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: hamoa: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sc8180x: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sc7280: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sc7180: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sm7225-fairphone-fp4: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: qcs6490: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: qcm6490: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: qcs8550-aim300: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sm8550: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
arm64: dts: qcom: sm8450: Fix swapped USB QMP PHY vdda-phy/vdda-pll supplies
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v7.3
SoC Specific Changes:
AM64:
- Non critical clock ID update for ICSSG MDIO
Board Specific Changes:
AM62L BeagleBadge:
- New AM62L based BeagleBadge board
Variscite VAR-SOM-AM62(P):
- Add support for Variscite VAR-SOM-AM62 and Symphony carrier board
- var-som-am62p: Fix Ethernet PHY configuration and update audio codec
configuration
- am62p5-var-som-symphony: Add touchscreen and TPM support
AM69 Aquila (Toradex):
- DSI adapters and Display addon board overlays
- OV5640 CSI camera overlays
AM62x (Toradex Verdin):
- DSI adapters and Display addon board overlays
AM62P-Verdin:
- Add Toradex OV5640 CSI camera overlay
- Add NAU8822 Bridge Tied Load audio support
AM642 TQMa64xxl:
- Misc non-urgent fixes
AM67A BeagleY-AI:
- Setup I2C for CSI/DSI connectors and add DSI0/CSI1 mux
- Add IMX219 CSI0/CSI1 camera overlays
- Add gpio line names
AM68 phyBOARD-Izar:
- Add pwm fan support
AM625-BeaglePlay:
- Add LincolnTech OLDI LCD-185 overlay
AM625-SK:
- Add Microtips OLDI SK-LCD1 overlay
AM62L:
- Add bootph-all property to usb0
AM62A7-SK:
- Add bootph-all property in cpsw_mac_syscon node
* tag 'ti-k3-dts-for-v7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (37 commits)
arm64: dts: ti: Correct white-space style
arm64: dts: ti: k3-am64: Fix MDIO clock reference for ICSSG0 node
arm64: dts: ti: k3-am67a-beagley-ai: Add gpio line names
arm64: dts: ti: k3-am62a7-sk: Add bootph-all property in cpsw_mac_syscon node
arm64: dts: ti: k3-am67a-beagley-ai: Add overlay for IMX219 on CSI1
arm64: dts: ti: k3-am67a-beagley-ai: Add overlay for IMX219 on CSI0
arm64: dts: ti: k3-am67a-beagley-ai: Add DSI0/CSI1 mux
arm64: dts: ti: k3-am67a-beagley-ai: Setup I2C for CSI/DSI connectors
arm64: dts: ti: Add LincolnTech OLDI LCD-185 Overlay for AM625-BeaglePlay
arm64: dts: ti: k3-am68-phyboard-izar: Add pwm fan
arm64: dts: ti: Add Microtips OLDI SK-LCD1 Overlay for AM625-SK
arm64: dts: ti: k3-am62l: Add bootph to usb0
arm64: dts: ti: k3-am62x-verdin: Share UART_4 MCU reservation overlay
arm64: dts: ti: k3-am62p-verdin: Add Toradex OV5640 CSI Cameras
arm64: dts: ti: k3-am62p-verdin: Add NAU8822 Bridge Tied Load
arm64: dts: ti: k3-am62-verdin: Add RPi Touch Display 2 7-inch
arm64: dts: ti: k3-am62-verdin: Add Mezzanine with Toradex Display 10.1" LVDS
arm64: dts: ti: k3-am62-verdin: Add Toradex DSI to LVDS adapter with the 10.1" V2 display
arm64: dts: ti: k3-am62-verdin: Add Toradex Capacitive Touch Display 10.1" LVDS V2
arm64: dts: am62p5-var-som-symphony: add TPM support
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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soc/dt
arm64: Xilinx DT changes for 7.3
bindings:
- Cleanup xilinx.txt
- Update ZynqMP firmware and clock descriptions
zynq:
- Drop bias-high-impedance on SD
zynqmp:
- Drop bias-high-impedance on SD
- Correct indentation
versalnet:
- Enable firmware interface including clock, power and reset
* tag 'zynqmp-dt-for-7.3' of https://github.com/Xilinx/linux-xlnx:
arm64: versal-net: Switch Versal NET to firmware clock interface
dt-bindings: clock: versal-clk: Fix Versal NET clock validation
dt-bindings: clock: Move xlnx,zynqmp-clk to its own schema
dt-bindings: clock: versal-clk: Fix mio_clk index range in clock-names pattern
dt-bindings: firmware: xilinx: Add missing example for ZynqMP
dt-bindings: xilinx: Remove EDK/Ethernet references
arm64: dts: xilinx: zynqmp-sck: Correct indentation
arm: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins
arm64: dts: xilinx: drop bias-high-impedance on SDIO CD/WP pins
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add device tree binding documentation for the watchdog timer (WDT)
controller found on Nuvoton MA35D1 SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Zi-Yu Chen <zychennvt@gmail.com>
Link: https://lore.kernel.org/r/20260804070351.1846165-2-zychennvt@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add the compatible for the watchdog of the Rockchip RV1106, which is
compatible with the Synopsys DesignWare watchdog.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20260714131856.v2.1.b5339e64b3fe4338b3924ebd9dc0096904699744@changeid
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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NPCM750 and NPCM845 latch watchdog reset indications in the SoC
GCR block rather than in the watchdog block itself.
Add the optional nuvoton,sysgcr phandle so watchdog nodes can
reference the shared GCR reset-status registers that hold those
latched watchdog reset indications.
This is needed by the following reset-status support, which reads
those latches and reports watchdog-caused resets through bootstatus.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20260706144828.3517631-2-tmaimon77@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The watchdog on Apple silicon M3 Pro, Max and Ultra SoCs is compatible
with the t8103 (M1) one. Add "apple,t6030-wdt" for M3 Pro and
"apple,t6031-wdt" for M3 Max and Ultra as per-SoC compatibles.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Janne Grunau <j@jannau.net>
Link: https://lore.kernel.org/r/20260715-apple-t603x-initial-devices-v2-6-df65b2485710@jannau.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The watchdog on the Apple silicon t8132 (M4) SoC is compatible with the
existing driver. Add "apple,t8132-wdt" as SoC specific compatible under
"apple,t8103-wdt" used by the driver.
The M4 wdt block additionally has a secondary watchdog, which is
disabled by m1n1 and can safely be ignored by Linux.
Signed-off-by: Yureka Lilian <yureka@cyberchaos.dev>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260705-apple-m4-initial-devicetrees-v1-3-e5655ee56523@cyberchaos.dev
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add devicetree binding for watchdog present on Qualcomm Maili SoC.
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260629-maili-watchdog-v2-1-5cb9c83a581c@oss.qualcomm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The Analog Devices ADT7470 is a multichannel temperature sensor and
PWM fan controller. It supports monitoring up to 10 external
temperature sensors and controlling up to 4 fans.
Add the device tree binding documentation for it. This includes
support for the thermal framework by defining the "#thermal-sensor-cells"
property, and models the fan control lines as PWM channels by
defining the "#pwm-cells" property.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Link: https://lore.kernel.org/r/20260805-adt7470_thermalzone-v6-1-5605a5f95467@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The MPS MPQ8646 PMBus step-down converter uses the same
mps,vout-fb-divider-ratio-permille property with the same constraints
(maximum 2047, default 706) as the mps,mpq8785, so add its compatible
to the existing schema.
Signed-off-by: Vincent Jardin <vjardin@free.fr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260730-mpq8646_v0-v7-2-e7c7ad768d5d@free.fr
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add compatible strings for variants of MAX20830 which are MAX20830C
and MAX20840C. These devices have the same register functionality with
MAX20830 but with a longer IC_DEVICE_ID.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Link: https://lore.kernel.org/r/20260730-dev-max20830c-v5-3-a7553f84ee74@analog.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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and complete examples
Add adi,vout-rfb1-ohms and adi,vout-rfb2-ohms properties to support
external voltage divider configuration for VOUT sensing. When the
desired output voltage is higher than VREF, a resistor divider (RFB1
and RFB2) is required to reach the intended value.
The properties use a dependency constraint to ensure both resistors
are specified together, or neither. This prevents misconfiguration
where only one resistor value is provided.
This patch also adds missing entries in the examples.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com>
Link: https://lore.kernel.org/r/20260730-dev-max20830c-v5-1-a7553f84ee74@analog.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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VT7505
Add device tree binding documentation for the Analog Devices MAX16545 and
MAX16550, and the Volterra VT7505 PMBus controllers.
Signed-off-by: Sanman Pradhan <psanman@juniper.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260725211945.288415-2-sanman.pradhan@hpe.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The Kandou KB9002 is an 8-lane PCIe 5.0 retimer exposing an SMBus target
that reports an aggregated die temperature. It needs no device-specific
device tree properties beyond its address, so add it to trivial-devices.
Signed-off-by: Andy Chung <Andy.Chung@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260724-kb9002-upstream-v5-2-9523c3ffe83a@amd.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Kandou AI is the vendor of the KB9002 PCIe retimer.
Signed-off-by: Andy Chung <Andy.Chung@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260724-kb9002-upstream-v5-1-9523c3ffe83a@amd.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Reduce the hpe,gxp-fan-ctrl register references from 3 to 1. The
function2 (fn2) and programmable logic (pl) references are removed.
The purpose of removal being their functionality will be consumed by a
new GPIO driver.
Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230705194544.100370-4-nick.hawkins@hpe.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add support for MPS mpq82d00 controller.
Signed-off-by: Wensheng Wang <wenswang@yeah.net>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20260704081952.1701914-1-wenswang@yeah.net
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add a YAML devicetree binding for the Sensirion SHT3x/STS3x sensor
family and the compatible GXCAS GXHT30, with the ALERT interrupt,
nRESET GPIO and VDD supply as optional properties.
The SHT30, SHT31, SHT35 and SHT85 measure humidity and temperature
and differ only in accuracy and packaging, while the STS30, STS31,
STS32 and STS35 are temperature-only parts. Within each group the
parts share the same software interface, so model them with a
fallback to the base part of their group: "sensirion,sht30" for the
SHT parts and "sensirion,sts30" for the STS parts.
The GXCAS GXHT30 is a drop-in replacement for the SHT30 and uses it
as fallback as well.
Signed-off-by: Zaixiang Xu <zaixiang.xu.dev@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260713074559.12196-3-zaixiang.xu.dev@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add vendor prefix for Beijing Galaxy-CAS Technology Co., Ltd. (GXCAS).
The prefix was confirmed from the manufacturer's website:
https://www.gxcas.com/en/index.html
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Zaixiang Xu <zaixiang.xu.dev@gmail.com>
Link: https://lore.kernel.org/r/20260713074559.12196-2-zaixiang.xu.dev@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add device tree binding documentation for ESWIN EIC7700 Voltage and
Temperature sensor.
The EIC7700 SoC integrates two PVT instances for monitoring SoC and DDR
power domains respectively.
Signed-off-by: Yulin Lu <luyulin@eswincomputing.com>
Signed-off-by: Huan He <hehuan1@eswincomputing.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com>
Link: https://lore.kernel.org/r/20260630091122.1462-1-dongxuyang@eswincomputing.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Support ROHM BD12790 hot-swap controller which is largely compatible
with the Analog Devices adm1272.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/753a6ded3e1aff1aaba7d932f0a883f789d9dfaa.1782458224.git.mazziesaccount@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Support ROHM BD12780 and BD12780A hot-swap controllers, which are largely
compatible with the Analog Devices adm1278. Main difference between
the BD12780 and the BD12780A is, that the BD12780 has one I2C address
configuration pin more (ADDR3) than the BD12780A.
Introduce own compatibles for both variants but require the BD12780A to
always have the BD12780 as a fall-back.
Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/2b7d5bb8cba773d0bba1d6779f0e6daa6a40eed4.1782458224.git.mazziesaccount@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add support for an optional label property similar to other hwmon devices.
This allows, in case of boards with multiple CHIPCAP2 sensors, to assign
distinct names to each instance.
Signed-off-by: Flaviu Nistor <flaviu.nistor@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260625160423.17882-1-flaviu.nistor@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add a 'ti,current-range' string property to configure the device's Current
Limit (CL) behavior to "high" or "low" via the register, overriding the
physical CL pin setting.
This configuration is supported on LM25066, LM5064, LM5066, and LM5066i.
LM25056 is excluded because it does not support configuring the current
limit via the DEVICE_SETUP register (bit 2 of DEVICE_SETUP is reserved).
The values "low" and "high" map to the respective low/high threshold
voltages of the chips:
- LM25066: low = 25 mV, high = 46 mV
- LM5064, LM5066, LM5066i: low = 26 mV, high = 50 mV
Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20260615-lm25066-cl-config-v3-1-decb4f5b0b77@gmail.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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Add devicetree binding documentation for the Silergy SQ24860 eFuse.
The device is a PMBus hardware monitoring device which reports voltage,
current, power, and temperature telemetry. The board-specific IMON
resistor value is described with silergy,rimon-micro-ohms.
Signed-off-by: Ziming Zhu <ziming.zhu@silergycorp.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20260612030304.5165-2-zmzhu0630@163.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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The INA232 is a current/power monitor from Texas Instruments sharing
the same register map as the other INA2xx.
Signed-off-by: Martino Facchin <m.facchin@arduino.cc>
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260611-monza-ina232-v2-1-e4375ce652d0@oss.qualcomm.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
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https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
More new boards: LincStation E1, Vicharak Vaaman, EmbedFire LubanCat 4,
ArmSoM CM5 + IO-board and the Anbernic RG Vita-Pro handheld
Apart from that some board-level changes and style fixes.
* tag 'v7.3-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: Add LincStation E1
dt-bindings: arm: rockchip: Add LincStation E1
arm64: dts: rockchip: Add Vicharak Vaaman board
dt-bindings: arm: rockchip: Add Vicharak Vaaman board
arm64: dts: rockchip: Add icm42607p IMU for RG-DS
arm64: dts: rockchip: Correct white-space style
arm64: dts: rockchip: Add EmbedFire LubanCat 4 board
dt-bindings: arm: rockchip: Add EmbedFire LubanCat 4 board
arm64: dts: rockchip: Keep rk3399-roc-pc-plus work LED on
arm64: dts: rockchip: Enable wireless on rk3399-roc-pc-plus
arm64: dts: rockchip: Fix rk3399-roc-pc-plus analog audio
arm64: dts: rockchip: Add CSI-2 bus type to ROCK 5B+ camera overlays
arm64: dts: rockchip: Drop data-mapping from Engicam PX30 Core
arm64: dts: rockchip: Add Anbernic RG Vita-Pro
dt-bindings: arm: rockchip: Add Anbernic RG Vita-Pro
arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO
dt-bindings: arm: rockchip: Add ArmSoM CM5 and CM5-IO
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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soc/dt
RISC-V Devicetrees for v7.3
Sophgo:
The changes of this PR are all for CV18xx serials.
There are three major changes. The first is to allow
DMA multiplexer setting channel number for DMA controller;
the second is to add initial RISC-V support for "Duo S"
board, which uses SG2000, a dual-arch SoC (RISC-V and
ARM64); the third is to add support for "Duo 256M"
board, another dev-board based on SG2002 SoC.
Signed-off-by: Chen Wang <chen.wang@linux.dev>
* tag 'riscv-sophgo-dt-for-v7.3' of https://github.com/sophgo/linux:
riscv: dts: sophgo: Add Milk-V Duo 256M board support
riscv: dts: sophgo: cv180x: Add PWR_GPIO controller
dt-bindings: soc: sophgo: add Milk-V Duo 256M board
riscv64: dts: sophgo: add initial Milk-V Duo S board support
riscv64: dts: sophgo: add SG2000 dtsi
riscv: dts: sophgo: cv180x: Allow the DMA multiplexer to set channel number for DMA controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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