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2026-08-10dt-bindings: power: Document Renesas R-Car X5H Module ControllerGeert Uytterhoeven
Document support for Renesas R-Car X5H Module Controllers, and add binding definitions for power domains not backed by registers. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-10dt-bindings: gpio: rockchip,gpio-bank: Add rockchip,grf propertySimon Glass
Some Rockchip SoCs, such as the RV1106, give each GPIO bank its own IO control (IOC) register block rather than grouping the registers of all banks into a shared GRF region. Add an optional rockchip,grf property to the gpio-bank binding so that each bank node can reference the syscon for its own IOC block. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260729072727.v3.2.d04a89a3849323a0dcee2c701cba43adbb0523b2@changeid Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-08-10Merge tag 'thermal-v7.3-rc1' of ↵Rafael J. Wysocki
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux Pull thermal driver updates for 7.3-rc1 from Daniel Lezcano: "- Move thermal_zone_device_enable() to the right place in order to prevent calling it if the thermal zone registration failed (Dan Carpenter) - Improve bitfield manipulations on Armada (Bryan B. Lima) - Remove unneeded 'fast_io' on Sun8i and Armada (Wolfram Sang) - Fix wrong boundary when clamping the low values in the set_trips() callback and fix wrong mask when setting the temperature interval on Airoha (Christian Marangi) - Make use of the regmap API in order to support the Airoha AN7583 (Christian Marangi) - Fix adc_tm5_get_temp() return check value on the QCom SPMI ADC sensor (Rakesh Kota) - Fix unbalanced clock enablement when the resume fails on the iMX driver (Can Peng) - Add Qualcomm Master BandGap thermal monitor support (Satya Priya Kakitapalli) - Add Maili Temperature bindings compatible (Haritha S K) - Add a devm action to clean hardware interrupts, sampling, and control registers on Spacemit K1 (Pei Xiao) - Fix trivial typo in an OF code comment (Marek Vasut) - Remove unecessary print on Qcom SPMI ADC driver when a call to devm_request_threaded_irq() fails as this one already prints a message (Jishnu Prakash) - Add support for QCom PMIC5 Gen3 ADC by using auxialiary driver and shared interrupt with the IIO driver (Jishnu Prakash) - Make resets optional on MT8196 and add the corresponding property in the DT bindings (AngeloGioacchino Del Regno) - Fix clock staying enabled with the resume operation fails on Qoriq (Can Peng) - Fix wrong closing brace position in thermal library header (Andreas Haufler) - Fix low and high trip point validation by moving the check after the clamp on the spacemit driver (surendra) - Remove redundant error messages on IRQ request failure (Pan Chuang) * tag 'thermal-v7.3-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (26 commits) thermal/drivers: Remove redundant error messages on IRQ request failure thermal/drivers/spacemit: Validate clamped trip thresholds tools/lib/thermal: Fix misplaced extern "C" closing brace thermal/drivers/qoriq: Disable clock on resume failure thermal/drivers/mediatek/lvts_thermal: Make reset optional for MT8196 dt-bindings: thermal: mediatek: Make resets optional for MT8196 thermal/drivers/qcom: add support for PMIC5 Gen3 ADC thermal monitoring iio: adc: qcom-spmi-adc5-gen3: Share SDAM0 IRQ with ADC_TM auxiliary driver iio: adc: qcom-spmi-adc5-gen3: Remove an unnecessary print thermal/of: Fix trivial enabled typo thermal/drivers/spacemit/k1: Add shutdown action and reorder registration order dt-bindings: thermal: qcom-tsens: Document the Maili Temperature Sensor thermal/drivers/qcom: Add support for Qualcomm MBG thermal monitoring dt-bindings: thermal: Add Qualcomm MBG thermal monitor support thermal/drivers/imx: Disable clock on runtime resume failure thermal/drivers/qcom-spmi-adc-tm5: Drop IIO_VAL_INT check in adc_tm5_get_temp thermal/drivers/airoha: Add support for AN7583 Thermal Sensor dt-bindings: arm: airoha: Add the chip-scu node for AN7583 SoC thermal/drivers/airoha: Generalize get_thermal_ADC and set_mux function thermal/drivers/airoha: Generalize probe function ...
2026-08-10dt-bindings: crypto: qcom,inline-crypto-engine: Add x1e80100 supportWenjia Zhang
Document the compatible string for inline crypto engine found on the Qualcomm X1E80100 SoC, used by the Hamoa IoT EVK board. Signed-off-by: Wenjia Zhang <wenjia.zhang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-08-10Merge tag 'soc_fsl-7.3-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux into soc/drivers FSL SOC Changes for 7.3 Freescale QUICC Engine: - Use generic I/O helpers in interrupt controller for IO Ports - Move CONFIG_QE_GPIO out of powerpc - Fix DT scan for GPIO nodes - Convert IO ports interrupt controller to generic IRQ chip - Add support of IRQs in GPIO controller - Implement get_direction() in GPIO controller - Check platform_driver_register() in interrupt controller for IO Ports Data Path I/O: - Replace maintainer - Remove redundant dev_err() - Fix kernel-doc typos Freescale Management Complex: - Use strscpy() to copy strings into arrays - Remove redundant dev_err() - Drop unused assignment of acpi_device_id::driver_data Other changes: - Add kernel and device tree binding support for RCW override, completing the SerDes PHY driver functionality - Fix kernel-doc warnings and typos in DPAA header * tag 'soc_fsl-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/chleroy/linux: (31 commits) bus: fsl-mc: drop unused assignment of acpi_device_id::driver_data soc: fsl: qe: check platform_driver_register() in qe_ic_of_init() phy: lynx-10g: use RCW override procedure for dynamic protocol change soc: fsl: guts: implement the RCW override procedure dt-bindings: fsl: layerscape-dcfg: define DCFG_DCSR region soc: fsl: guts: make fsl_soc_data available after fsl_guts_init() soc: fsl: guts: make it easier to determine on which SoC we are running soc: fsl: guts: add a central fsl_guts_read() function soc: fsl: guts: add a global structure to hold state soc: fsl: guts: use a macro to encode the DCFG CCSR space soc: fsl: guts: perform fsl_guts_init() error teardown in reverse order of setup soc: fsl: dpio: fix kernel-doc typos soc: fsl: fix kernel-doc warnings and typos bus: fsl-mc: Remove redundant dev_err() soc: fsl: qe: Add support of IRQs in QE GPIO soc: fsl: qe: Rename irq variable to parent_irq soc: fsl: qe: Convert to generic IRQ chip soc: fsl: qe: Handle spurious interrupts soc: fsl: qe: Iterate over all pending interrupts in cascade handler soc: fsl: qe: Use generic_handle_domain_irq() ... Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-10Merge tag 'apple-soc-drivers-7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/drivers Apple Soc driver updates for 7.3 - New driver and dt-bindings for Apple PMGR misc controls, which tweaks various global power related states and saves about 1W of power on M1 Pro/Max/Ultra during s2idle. - A small fix for device links in SART Signed-off-by: Sven Peter <sven@kernel.org> * tag 'apple-soc-drivers-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux: soc: apple: Add driver for Apple PMGR misc controls dt-bindings: soc: apple: Add Apple PMGR misc controls soc: apple: sart: require device link for consumers Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-10Merge tag 'qcom-drivers-for-7.3-2' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers More Qualcomm driver updates for v7.3 Add SMEM parsing for DDR configuration data and use its highest bank address bit to select the appropriate UBWC configuration. Enable generic PAS trusted-zone APIs for the Iris and Venus media drivers. Fix SCM probe retry state, reserved-memory cleanup, and an early IRQ-handler NULL dereference. Enable QSEECOM EFI variable access on the Asus Zenbook A16. Correct GENI firmware-size validation using the hardware CFG RAM depth and correct the PMIC GLINK Thunderbolt extradata layout. Document the Nord AOSS side channel and the IMEM minidump SRAM property. Clean up Qualcomm statistics macros and the WCNSS binding schema. * tag 'qcom-drivers-for-7.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: media: qcom: Switch to generic PAS TZ APIs dt-bindings: soc: qcom,aoss-qmp: Document Nord AOSS side channel dt-bindings: sram: qcom,imem: Add minidump-sram pattern property soc: qcom: qcom_stats: Replace CLIENT_VOTES_OFFSET macro with sizeof() soc: qcom: qcom_stats: Remove unused macro definitions soc: qcom: ubwc: Get HBB from SMEM soc: qcom: smem: Expose DDR data from SMEM soc: qcom: smem: Use 'unsigned int' instead of 'unsigned' firmware: qcom: scm: Fix tzmem state on probe retry firmware: qcom: scm: Fix reserved memory cleanup on probe failure firmware: qcom: scm: Fix NULL dereference in IRQ handler before __scm is published firmware: qcom: scm: Allow QSEECOM on Asus Zenbook A16 (UX3607OA) soc: qcom: geni-se: Use HW PROG_RAM_DEPTH to validate firmware size soc: qcom: pmic_glink_altmode: Define the TBT extradata properly dt-bindings: soc: qcom,wcnss: Drop redundant $ref of firmware-name property Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-09Merge tag 'tegra-for-7.3-arm64-dt' of ↵Alexandre Belloni
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt arm64: tegra: Device tree changes for v7.3-rc1 This contains a new device tree for the Lenove ThinkEdge SE70 Edge Client device as well as a number of fixes and cleanups for Tegra234 and Tegra194. Tegra264 sees a number of additions to enable more features. * tag 'tegra-for-7.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (1469 commits) arm64: tegra: Correct Tegra234 p3740 interrupt flags arm64: tegra: Correct Tegra234 p3737 interrupt flags arm64: tegra: Correct Tegra194 p2972 interrupt flags arm64: tegra: Drop CPU masks from GICv3 PPI interrupts arm64: tegra: Add Lenovo ThinkEdge SE70 device tree arm64: tegra: Add pinctrl nodes for Tegra264 arm64: tegra: Fix CMDQV interrupt type on Tegra264 arm64: tegra: Properly sort devices on Tegra264 arm64: tegra: Add GTE nodes for Tegra264 arm64: tegra: Add Host1x and VIC on Tegra264 arm64: tegra: Populate CPU and L2 cache nodes on Tegra264 arm64: tegra: Enable GPCDMA in Tegra264 and add iommu-map Linux 7.2-rc5 super: fix emergency thaw deadlock on frozen block devices tracing: perf: Fix stale head for perf syscall tracing ftrace: Add global mutex to serialize trace_parser access tracing: Delay module ref count for "enable_event" trigger tracing: Fix use-after-free freeing trigger private data bpf, sockmap: Fix cork use-after-free in tcp_bpf_sendmsg() tracing: Fix context switch counter truncation ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-09Merge tag 'tegra-for-7.3-dt-bindings' of ↵Alexandre Belloni
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt dt-bindings: Changes for v7.3-rc1 This contains a few fixes for interrupt types and email addresses as well as the addition of a compatible string for the Lenovo ThinkEdge SE70 Edge Client. * tag 'tegra-for-7.3-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: arm: tegra: Add lenovo,thinkedge-se70 compatible string dt-bindings: gpu: host1x: Fix email address dt-bindings: iommu: Fix interrupt type in example Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'sunxi-dt-for-7.3' of ↵Alexandre Belloni
https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt Allwinner device tree changes for 7.3 Some changes for old chips/devices and some for recent ones. - A10 PMU interrupt number fixed - A100/A133 gained LRADC - enabled overlay support for sun8i-h2-plus pi boards - A523 family gained consumer IR receiver - H728-based X96QPRO+ gained SPDIF audio output - PinePhone's mpu6050 mount orientation fixed - style fixes New board added: - Baijie Helper A133 - NetCube Systems OpenNMC (dobermann) * tag 'sunxi-dt-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: Correct white-space style ARM: dts: allwinner: Correct white-space style arm64: dts: allwinner: a523: Enable SPDIF on X96QPRO+ arm64: dts: allwinner: a523: Add SPDIF output PH pin mux option arm64: dts: allwinner: sun50i-a64-pinephone: Fix mpu6050 mount matrix arm64: dts: allwinner: a523: enable IR on the Avaota A1 arm64: dts: allwinner: a523: enable IR receiver on the X96Q Pro+ arm64: dts: allwinner: a523: add IR receiver nodes media: dt-bindings: allwinner,sun4i-a10-ir: add A523 compatible ARM: dts: allwinner: a10: Fix PMU interrupt ARM: dts: allwinner: enable overlay support for sun8i-h2-plus pi boards ARM: dts: allwinner: add support for NetCube Systems OpenNMC (dobermann) riscv: dts: allwinner: d1s-t113: Add uart4 pinctrl required by NetCube Systems OpenNMC dt-bindings: arm: sunxi: Add NetCube Systems OpenNMC (dobermann) ARM: dts: allwinner: sun8i-h3: Correct indentation arm64: dts: allwinner: A133: add support for Baijie Helper A133 board arm64: dts: allwinner: a100: Add LRADC node dt-bindings: input: sun4i-lradc-keys: Add A100/A133 compatible dt-bindings: arm: sunxi: Add Baijie HelperBoard A133 compatible dt-bindings: vendor-prefixes: Add Shenzhen Baijie Technology Co., Ltd. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'spacemit-dt-for-7.3-1' of ↵Alexandre Belloni
https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux into soc/dt RISC-V SpacemiT DT changes for 7.3 For K3 SoC - Enable SD card support - Enable QSPI - Fix reset delay of ETH PHY - Fix PHY ID of ETH - Symbolic PDAM ID - Add SPI controller support - Add USB and PHY support - Add I2S nodes For K1 SoC - Symbolic PDAM ID - Enable cpufreq support - Fix max CPU core voltage For boards of K3 - Pico-ITX - Enable ALDPS on RTL8211F PHY - Disable 125MHz clock on RTL8211F PHY - Enable NOR flash - Add EEPROM support - CoM260 - Add EEPROM support For boards of K1 - Milk-V Jupiter - Enable CPU DVFS - Banana Pi BPI-CM6 - Add initial support - OrangePi R2S - Enable PCIe * tag 'spacemit-dt-for-7.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/spacemit/linux: (33 commits) riscv: dts: spacemit: Add cpu scaling for Milk-V Jupiter riscv: dts: spacemit: k1-bananapi-cm6: fix maximum CPU core voltage riscv: dts: spacemit: k1-orangepi-r2s: fix maximum CPU core voltage riscv: dts: spacemit: k1-musepi-pro: fix maximum CPU core voltage riscv: dts: spacemit: k1-orangepi-rv2: fix maximum CPU core voltage riscv: dts: spacemit: k1-milkv-jupiter: fix maximum CPU core voltage riscv: dts: spacemit: k1-bananapi-f3: fix maximum CPU core voltage riscv: dts: spacemit: Make dtschema recognize the etherent PHY correctly on K3 com260 board riscv: dts: spacemit: Make dtschema recognize the etherent PHY correctly on K3 pico-itx board riscv: dts: spacemit: k3: add i2s0-i2s5 nodes riscv: dts: spacemit: k3: add USB controller and USB phy support riscv: dts: spacemit: enable PCIe on OrangePi R2S riscv: dts: spacemit: k3-com260-ifx: add eeprom on i2c1 riscv: dts: spacemit: k3-com260: add eeprom on i2c2 riscv: dts: spacemit: add SPI controllers for K3 riscv: dts: spacemit: add K3 PDMA request numbers riscv: dts: spacemit: Fix phy id check for the phy on com260 board riscv: dts: spacemit: Fix phy id check for the phy on pico-itx board riscv: dts: spacemit: Add enough deassert time for the PHY on com260 board riscv: dts: spacemit: Add enough deassert time for the PHY on PICO ITX ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'v7.3-rockchip-dts64-1' of ↵Alexandre Belloni
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: Graperain G3568, HINLINK H28K, LCKFB Taishan Pi 3M, Orange Pi 5 Pro, Vicharak Axon, Vicharak Vaaman2, Youyeetoo YY3588 New peripherals: eDP support on RK3576 And of course a number of board-fixes, style-fixes and some newly enabled board-components. * tag 'v7.3-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (39 commits) arm64: dts: rockchip: Fix rk3566-bigtreetech-cb2 touchscreen property arm64: dts: rockchip: fix label of sys_led for nanopi-r4s arm64: dts: rockchip: Fix the rk3566-radxa-cm3 Wifi compatible arm64: dts: rockchip: Fix Gru WLAN sideband interrupt arm64: dts: rockchip: Add Vicharak Vaaman2 board dt-bindings: arm: rockchip: Add Vicharak Vaaman2 arm64: dts: rockchip: add Vicharak Axon board dt-bindings: arm: rockchip: add Vicharak Axon board arm64: dts: rockchip: Add LCKFB Taishan Pi 3M dt-bindings: arm: rockchip: Add LCKFB Taishan Pi 3M arm64: dts: rockchip: Add Orange Pi 5 Pro board support arm64: dts: rockchip: refactor items from Orange Pi 5/b to prep for Pro arm64: dts: rockchip: rename PLDO regulator labels to match schematic on rk3588s-orangepi-5 dt-bindings: arm: rockchip: Add Orange Pi 5 Pro arm64: dts: rockchip: Add devicetree for the Graperain G3568 v2 dt-bindings: arm: rockchip: Add Graperain G3568 series dt-bindings: vendor-prefixes: Add graperain Revert "arm64: dts: rockchip: Further describe the WiFi for the Pinephone Pro" arm64: dts: rockchip: fix HDMI-RX signal detect GPIO on yy3588 arm64: dts: rockchip: Enable USB device mode on rk3588s-roc-pc ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'qcom-arm64-for-7.3' of ↵Alexandre Belloni
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm Arm64 DeviceTree updates for v7.3 Introduce DeviceTree support for the Shikra SoC, its GCC and RPM clock controllers, CQM, CQS, and IQS SoM platforms, and their evaluation boards. Document the Hawi and Maili SoCs. Add the Eliza CQS SoM and EVK platforms, the QCS8550 RB5 Gen 2, Vicharak Axon Mini, HONOR MagicBook Art 14, Microsoft Surface Pro 12, Xiaomi 12 Lite, Motorola Edge 30, Sony Xperia M2, and Motorola Moto G2 device trees. Extend Eliza support with USB, SD card, touchscreen, PMIC, interconnect, thermal, CPU and LLCC bandwidth-monitor, QUPv3, and ADSP GPR descriptions. Expand Glymur support with GPU, camera and EVA clock controllers, LPASS audio, CoreSight, PCIe, USB, IMEM and PIL memory regions, power domains, thermal cooling, and CRD peripherals. Add SoCCP, PMIC regulator, TRNG, and CPU-capacity descriptions. Add display, IPA, camera, USB, audio, crypto, TRNG, CoreSight, and thermal support to the Kaanapali, Milos, Hamoa, and related platforms. Add embedded controller support for Hamoa and Glymur boards. Improve networking-platform descriptions with IPQ PCIe port, PHY, clock, PWM, regulator, and interrupt updates. Update CTCU, display, Iris, audio, camera, PCIe, USB-C, power-domain, memory-region, and thermal descriptions across established Qualcomm platforms. Correct bindings and DeviceTree validation for Qualcomm compatible strings, legacy fallback compatibles, node naming and formatting, address ranges, clock specifiers, reserved memory, regulators, GPIOs, and peripheral wiring. * tag 'qcom-arm64-for-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (244 commits) arm64: dts: qcom: eliza: Describe the ADSP GPR node arm64: dts: qcom: eliza-evk: Add support for USB and SD card dt-bindings: arm: qcom-soc: Allow WSA88xx speaker compatible dt-bindings: arm: qcom-soc: Validate nodes with fallbacks dt-bindings: arm: qcom-soc: Document more of existing legacy style compatibles dt-bindings: arm: qcom-soc: Include Eliza, Kaanapali and others in SoC names arm64: dts: qcom: eliza: Enable cpufreq cooling devices arm64: dts: qcom: glymur: add SoCCP DT node arm64: dts: qcom: glymur: fix SoCCP memory mappings arm64: dts: qcom: mahua: Add QREF regulator supplies to TCSR arm64: dts: qcom: glymur: Add QREF regulator supplies to TCSR arm64: dts: qcom: glymur: Add CX power domain to GCC arm64: dts: qcom: glymur: Drop fake PCIe phy 3B arm64: dts: qcom: glymur: add TRNG node arm64: dts: qcom: glymur: enable ETR and CTCU devices arm64: dts: qcom: glymur: Add PCIe port compatibles and ports arm64: dts: qcom: smb2370: Disable SMB2370_2 by default arm64: dts: qcom: eliza-mtp: Enable touchscreen arm64: dts: qcom: purwa-iot-som: enable video arm64: dts: qcom: purwa: Override Iris clocks and operating points ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'imx-dt64-7.3' of ↵Alexandre Belloni
https://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/dt arm64: dts: NXP device tree updates for v7.3 New boards and SOM support: - Variscite DART-MX8M-MINI, DART-MX8M-PLUS, VAR-SOM-MX8 QuadMax (with Sonata and Symphony carrier boards) - TQMa8MPxS (i.MX8MP) with LVDS overlays, TQMa9596LA on MBa95xxCA; TQMa91xx on MBa93xxCA - imx8mm-verdin: Toradex DSI displays (7"/10.1"), HDMI adapter, NAU8822 BTL audio, Cortex-M4F remoteproc and UART overlay i.MX8: - PCIe: add power supply properties to Root Port nodes. - imx8mp-evk add typec and usb3_phy1 tuning; imx8mq-evk add typec; - imx8mp-evk add flexcan2 overlay and CAN2/MICFIL board mux; imx8mp-frdm fix HDMI DDC pinctrl - imx8mp-var-som-symphony: add second Ethernet, CAN, PWM1, ECSPI2, capacitive touchscreen, HDMI, PCIe, USB, TPM, external RTC, input keys, header UARTs - imx8mq-evk: add DCSS node, uart3/bluetooth node - imx8qm: add SCU power key, lsio mu8/mu8b, spdif1, lpuart4 nodes; fix LPCG clock indices for ASRC0; add Variscite Symphony board support - imx8ulp: add I3C2, eDMA channel properties, LPUART6 (BT) and LPUART7, gpio-keys power button; correct SRAM node address/size; update rpmsg resource table address; rename 9x9-evk model string - imx8mp: enable MU2 for DSP communication (imx8mp-ab2) i.MX9: - PCIe: add Root Port nodes with correct outbound address space for imx94/imx943/imx95; add dma/intr/aer/pme interrupts for imx95 PCIe; remove 'supports-clkreq' from imx943-evk PCIe1 - imx95: switch USB3 controller to flattened model; add CM7/CM33S nodes for imx943/imx952/imx95-19x19-evk; add imx94 DMA channels (xspi); enable NETC block control and in-band SFP status (imx95-var-dart); add wm8904 DMICDAT1; add lpuart5 alias (imx95-toradex-smarc) - imx93: add LVDS Display Bridge support with DY1212W-4856 panel overlay for imx93-11x11-evk; add LVDS overlays for imx93-tqma9352 boards; update TMU compatible string; fix memory node for imx93-kontron - imx91: add WM8524 and PDM microphone sound cards, CAN overlay, audio board muxes (imx91-9x9-qsb); move ELE reserved memory into 512MB range; USB phy adjustments (imx91-tqma9131) Layerscape / S32G: - ls1028a/ls1046a/ls1088a/ls208xa/lx2160a/lx2162a: describe Lynx 10G SerDes blocks; refactor lx2160a PCIe and SerDes into separate dtsi files; transition to device-specific SerDes compatible strings - s32g: add GPR syscon region; describe GPIO and EIRQ in SIUL2 pinctrl Cleanup and warning fixes: - correct imx8/s32g3 indentation - imx8mp: add missing #sound-dai-cells to xcvr * tag 'imx-dt64-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux: (131 commits) arm64: dts: imx95: Add dma, intr, aer and pme interrupts for PCIe arm64: dts: imx94-xspi: add the DMA channels arm64: dts: freescale: imx8mm-verdin: Add Cortex-M4F UART_4 overlay arm64: dts: freescale: imx8mm-verdin: Add Cortex-M4F remoteproc arm64: dts: freescale: imx8mm-verdin: Add Toradex Capacitive Touch Display 7" DSI arm64: dts: freescale: imx8mm-verdin: Add Toradex Capacitive Touch Display 10.1" DSI arm64: dts: freescale: imx8mm-verdin: Add Toradex DSI to LVDS adapter with 10.1" display arm64: dts: freescale: imx8mm-verdin: Add DSI to HDMI adapter overlay arm64: dts: freescale: imx8mm-verdin: Add NAU8822 Bridge Tied Load arm64: dts: imx95-var-dart-sonata: enable in-band status for SFP arm64: dts: imx8ulp-evk: Update rpmsg resource table address arm64: dts: imx943-evk: Add CM7 and CM33S nodes arm64: dts: imx952-evk: Add CM7 node and related memory nodes arm64: dts: imx95-19x19-evk: Add CM7 node and related memory nodes arm64: dts: imx8qm-var-som-symphony: enable expansion header UART arm64: dts: imx8ulp-9x9-evk: Rename model string to reflect die size arm64: dts: imx8ulp-evk: Change the values of some PCRs of ENET arm64: dts: imx8ulp-evk: Enable LPUART7 arm64: dts: imx8ulp-evk: Enable LPUART6 for Bluetooth arm64: dts: imx8ulp-evk: Add gpio-keys node for power button ... Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2026-08-08Merge tag 'drm-misc-next-2026-08-06' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for v7.3: UAPI Changes: - Remove the default udmabuf size limit of 64MB. Cross-subsystem Changes: - Add dmemcg support for eviction, and hook it up for amdgpu and xe. Core Changes: - Changes to TTM to be more aggressive when allocating below protection limit! - Improve dt binding documentation for renesas. - Add helper to convert physical address back to buddy block, add that to and improve its kunit test. Driver Changes: - Assorted small fixes to ti-sn65dsi86, panthor, imagination, omapdrm, bridge/synopsys, panel-edp, ssd130x, panel/tdo-tl070wsh30. - Add Sharp LQ120P1JX51 panel. - Add dmemcg support to nouveau. - Various updates and improvements to sun4i, among which YUV and 4k support. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patch.msgid.link/917d462a-8976-4a15-bec4-4513ec51c5c0@linux.intel.com
2026-08-07dt-bindings: riscv: Add Ssqosid extension descriptionDrew Fustini
Document the ratified Supervisor-mode Quality of Service ID (Ssqosid) extension v1.0. Link: https://github.com/riscv/riscv-ssqosid/releases/tag/v1.0 Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Drew Fustini <fustini@kernel.org> Link: https://patch.msgid.link/20260729-dfustini-atl-sc-cbqri-dt-v6-1-7c22b05d461b@kernel.org Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-07dt-bindings: riscv: add Counter delegation ISA extensions descriptionAtish Patra
Add description for the Smcdeleg/Ssccfg extension. Signed-off-by: Atish Patra <atishp@rivosinc.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260807-counter_delegation-v9-10-58658104e487@meta.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-07dt-bindings: riscv: add Smcntrpmf ISA extension descriptionAtish Patra
Add the description for Smcntrpmf ISA extension Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> Link: https://patch.msgid.link/20260807-counter_delegation-v9-7-58658104e487@meta.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-07dt-bindings: riscv: add Smcsrind and Sscsrind ISA extension descriptionsAtish Patra
Add the S[m|s]csrind ISA extension description. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Atish Patra <atishp@rivosinc.com> [pjw@kernel.org: use official extension names in the patch description] Link: https://patch.msgid.link/20260807-counter_delegation-v9-4-58658104e487@meta.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: add support of an7563 pin controllerMikhail Kshevetskiy
Introduce device tree binding schema for Airoha AN7563 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: add support of en7523 pin controllerMikhail Kshevetskiy
Introduce device tree binding schema for Airoha EN7523 SoC pin controller. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: add missed featuresMikhail Kshevetskiy
Changes: * add npu_uart pin-group support for uart pin-function * add pon_alt pin-group support for pon pin-function * add support for olt pin group/function Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: add i2c0 group for i2c functionMikhail Kshevetskiy
add mux to force enable i2c0 bus. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: allow configuration of non-gpio ↵Mikhail Kshevetskiy
default pins as gpio and pwm Some AN7583 pins have non-gpio default settings. This patch provides a way to configure such pins as GPIO or PWM. Also add gpio-range property in the dts example. Please note that gpio52 pin can't be configured as PWM pin. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: en7581: allow configuration of pcie_reset pins ↵Mikhail Kshevetskiy
as gpio or pwm In the an7581 case * gpio47 and pcie_reset0 shares the same pin, * gpio48 and pcie_reset1 shares the same pin, * gpio49 and pcie_reset2 shares the same pin. Let's define a way to configure these pins as gpio or pwm. Also add gpio-range property in the dts example. Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: an7583: fix device tree binding schemaMikhail Kshevetskiy
An7583 device tree binding schema was more or less blinly copied from corresponding en7581 schema. As result it's not correct. There are following issues: * i2s pin-function is not really defined for an7583 * i2s pin-function by mistake was replaced by i2c pin-function in the functions/groups checks * pcm_spi pin-function defined for less number of pin-groups * pwm pin-function should have more pin-groups elements * unexisting pins was defined Fix an7583 schema, so it matches actual pinctrl driver. Fixes: e6e47d31d3f8 ("dt-bindings: pinctrl: airoha: Document AN7583 Pin Controller") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: pinctrl: airoha: en7581: fix misprint in i2s function nameMikhail Kshevetskiy
Due to misprint i2s pin-function is missed, instead i2c pin-function defined twice. The second of them operates with i2s pin-group. Let's fix the typo so that the i2s function is defined correctly. Fixes: d0c15cb96b74 ("dt-bindings: pinctrl: airoha: Add EN7581 pinctrl") Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: thermal: mediatek: Make resets optional for MT8196AngeloGioacchino Del Regno
Both LVTS-AP and LVTS-MCU may be shared with SoC-internal MCUs running some sort of firmware that checks thermals in order to scale frequency, or to take action for critical SoC thermal protection - and this is seen on most MT8196 boards. Make resets optional, as doing a HW reset on such boards will result in either an immediate thermal protect shutdown or in a rather important and usually permanent system slowdown. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20260721105230.101906-2-angelogioacchino.delregno@collabora.com
2026-08-07dt-bindings: thermal: qcom-tsens: Document the Maili Temperature SensorHaritha S K
Document the Temperature Sensor (TSENS) on the Qualcomm Maili SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Haritha S K <haritha.k@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Link: https://patch.msgid.link/20260619-b4-maili-upstream-3-v2-1-e54516c37022@oss.qualcomm.com
2026-08-07dt-bindings: thermal: Add Qualcomm MBG thermal monitor supportSatya Priya Kakitapalli
Add bindings for the Qualcomm MBG (Master Bandgap) temperature alarm peripheral found on the PM8775 PMIC. Unlike the existing SPMI temp alarm peripheral, the MBG peripheral supports both hot and cold threshold monitoring across two programmable levels (LVL1 and LVL2), with interrupt status reported via a fault status register over SPMI. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Co-developed-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com> Signed-off-by: Sachin Gupta <sachin.gupta@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260722-spmi-mbg-driver-v3-1-ef73064f2789@oss.qualcomm.com
2026-08-07dt-bindings: irq: sun7i-nmi: Document the Allwinner A733 NMI controllerJerome Brunet
The A733 NMI controller is compatible with the A523 one. Add an A733-specific compatible string, with the A523 as fallback. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260731-allwinner-a733-nmi-support-v1-1-61e4a0825b20@baylibre.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07dt-bindings: Correct white-space styleKrzysztof Kozlowski
Correct a few white-space issues, like double space after '=' or before bracket '{' characters, which will be flagged by dt-check-style. No functional changes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Jeff Johnson <jjohnson@kernel.org> # qcom,ath10k.yaml Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for Documentation/devicetree/bindings/pwm Acked-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Link: https://patch.msgid.link/20260801195613.235430-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07dt-bindings: fix typos and bracketsManuel Ebner
Add missing '(', ')', '}' Remove needless '(', ')', '{', '}' 'lover voltage' -> 'lower voltage' Signed-off-by: Manuel Ebner <manuelebnerli@mailbox.org> Link: https://patch.msgid.link/20260722101246.3113818-2-manuelebnerli@mailbox.org [robh: drop .txt binding changes] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07docs: dt: submitting-patches: Mention expectation about dt-check-styleKrzysztof Kozlowski
Any new DTS example in the binding should pass dt-check-style 'strict' mode without warnings, although scripts does report some false positives. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260803091758.232633-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07docs: dt: writing-schema: Extend expectations about example part of bindingKrzysztof Kozlowski
Document already used rules about example DTS in the binding: - All final device bindings (except sub-block of more complex devices) should have an example. - Phandles do not need to be resolvable - Sashiko already provided incorrect review, so this might help it to understand the concept. - Example should be complete, readable (use known defines), without 'status' property. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260722062240.19382-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07dt-bindings: gpu: powervr-rogue: Add MediaTek MT8173 GPUChen-Yu Tsai
The MediaTek MT8173 comes with a PowerVR Rogue GX6250, which is one of the Series6XT GPUs, another sub-family of the Rogue family. This was part of the very first few versions of the PowerVR submission, but was later dropped. [1] https://lore.kernel.org/dri-devel/6eeccb26e09aad67fb30ffcd523c793a43c79c2a.camel@imgtec.com/ Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20260728091804.382753-4-wenst@chromium.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-08-07regulator: qcom-rpmh: Support RPMH address reads and use it for rpmh-regulatorsMark Brown
Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com> says: This patch series adds a new `rpmh_read()` API to allow reading RPMH addresses. Using this API enhances the RPMH regulator driver by adding readback of the voltage/bypass/mode settings as they have been applied by APPS during the bootloader stage, so regulator framework can get them via `get_mode`, `get_bypass` & `get_voltage_selector` callbacks during regulator registration. This is needed because currently regulator framework does a unnecessary write with `min-microvolt` DT setting for all the RPMH regulators during regulator registration, because the first time after boot the value is seen as -ENOTRECOVERABLE, as there is no option to read these regulator settings. With this change this unnecessary write can be avoided and regulator framework gets a sense of the initial state set during the bootloader stage for all regulator settings. NOTE - During discussion on the v2 series - PATCH 3/4, reviewer had inquired about possible need for the use of the sync_state() to handle the "multiple" client case - for maintaining the regulator settings till all the clients are probed. This case was not covered in my previous series and had originally planned to do that series separately. But after the discussion decided to merge the 2 series as it seemed this would be a better approach. But after working on sync_state change. I realized a basic issue with using sync_state() for regulators - that its per-driver and not per-regulator resource. But we needed a sync_state callback for each regulator separately. I had been experimenting with few ideas but seems its going to need more time for me to close on the equivalent solution that has per-regulator sync_state or something to that effect. So I thought to close on this series and attend to that separately. Link: https://patch.msgid.link/20260801-b4-read-rpmh-v5-v6-0-9fcb54928523@oss.qualcomm.com
2026-08-07dt-bindings: pinctrl: ti,dra7-iodelay: Convert to DT schemaBhargav Joshi
Convert TI IODELAY controller from text to DT schema. Document child properties missing from text bindings for proper validation. Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-07dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Add SM8475 QMP PHYEsteban Urrutia
SM8450 init sequence for this PHY varies significantly and can't be reused in SM8475. Add bindings for the PHY found in this SoC. Signed-off-by: Esteban Urrutia <esteuwu@proton.me> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260715-sm8475-bup-pcie-v2-1-48bd91a19abf@proton.me Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-07dt-bindings: phy: qcom,sa8775p-dwmac-sgmii-phy: add named voltage rails and ↵Mohd Ayaan Anwar
deprecate phy-supply The Qualcomm SGMII SerDes PHY has two distinct voltage supply rails, vdda-0p9 and vdda-1p2. The binding incorrectly described only a single generic supply via 'phy-supply'. Deprecate 'phy-supply' and instead add two named supply properties. The 0.9V rail draws a peak current of 46 mA and the 1.2V rail draws 15 mA. Fixes: 97b795125704 ("dt-bindings: phy: describe the Qualcomm SGMII PHY") Signed-off-by: Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://patch.msgid.link/20260804-b4-sgmiieth_serdes_regulator-v2-1-c4bc688177dd@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-07dt-bindings: phy: qcom,sc8280xp-qmp-ufs-phy: Add Hawi UFS PHY compatiblePalash Kambar
Document QMP UFS PHY compatible for Hawi SoC. Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Palash Kambar <palash.kambar@oss.qualcomm.com> Link: https://patch.msgid.link/20260806161301.1010876-2-palash.kambar@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-07dt-bindings: fsl: layerscape-dcfg: define DCFG_DCSR regionVladimir Oltean
In Layerscape (Arm) and QorIQ (PowerPC) devices, hardware peripherals are accessed by the CPU through a portion of the SoC address space called CCSR ("Configuration, Control, and Status Registers"). All hardware IP blocks have their registers mapped here, and the Device Configuration block makes no exception. However, there exists a secondary range of the address space named DCSR ("Debug Control and Status Registers") which, like CCSR, also holds registers of hardware IP blocks, except the DCSR contents is hidden in all public reference manuals. The intention of the CCSR/DCSR split, to the best of my knowledge, was to place the functionality that is too low level for normal use, and which is necessary only for debug, in a completely separate address space which can be hidden. A use case has appeared where networking SerDes lanes need to be reconfigured at runtime for a different protocol (example: 10GBase-R to SGMII), and the architecture of the SoCs does not normally permit that. The Reset Configuration Word (RCW) is a data structure read by the SoC preboot loader (PBL) which contains stuff like pinmuxing and SerDes protocol mapping for each lane. The RCW that the PBL has loaded is visible in the DCFG block's normal status registers (from CCSR), as read only. Turns out, the RCW is also mapped in the DCFG's shadow register map (in DCSR), in a write-only form. Writing to the RCW registers from the DCFG's DCSR space to change what the PBL has loaded is called "RCW override". It has been validated that the RCW override procedure is necessary to reconfigure the networking data path when a SerDes lane performs a major protocol change. It changes some internal muxes which connect the PCS to either the 10G MAC or to the 1G MAC. Defining the DCSR area of the DCFG as a secondary 'reg' array element allows operating systems to perform RCW overrides. Since it is introduced late in the binding's lifetime, it is optional. It can be identified by name, but also by index (first 'reg' is CCSR). Note that while all SoCs should have a DCFG register block in DCSR, we only need to expose it for the SoCs where the RCW override procedure is known to be needed and has been validated. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20260721231603.67865-8-vladimir.oltean@nxp.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-06dt-bindings: pinctrl: tegra264: fix DAP2 DIN/DOUT pin namesPrathamesh Shete
The DAP2_DIN and DAP2_DOUT pins were listed with swapped ball suffixes: DAP2_DIN as PV7 and DAP2_DOUT as PW0. On silicon DAP2_DIN is on ball PW0 and DAP2_DOUT is on ball PV7. Correct the pin and drive group names to dap2_din_pw0 and dap2_dout_pv7. Fixes: 30a9d5162f25 ("dt-bindings: pinctrl: Document Tegra264 pin controllers") Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-06Merge tag 'samsung-pinctrl-7.3' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v7.3 Add drivers for newly introduced Samsung Exynos8855 SoC. Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-7.2-rc7). No conflicts, or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-08-06dt-bindings: phy: rockchip-inno-csi-dphy: add rockchip,clk-lane-phase propertyGerald Loacker
Add support for the optional rockchip,clk-lane-phase device tree property to allow board-specific tuning of the clock lane sampling phase for improved signal integrity across supported data rates. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Michael Riesch <michael.riesch@collabora.com> Signed-off-by: Gerald Loacker <gerald.loacker@wolfvision.net> Link: https://patch.msgid.link/20260725-feature-mipi-csi-dphy-4k60-v4-2-5b2c4626d31e@wolfvision.net Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-06dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add SM8475 QMP PHYEsteban Urrutia
SM8450 init sequence for this PHY varies significantly and can't be used in SM8475. Add bindings for the PHY found in this SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Esteban Urrutia <esteuwu@proton.me> Link: https://patch.msgid.link/20260804-sm8475-bup-usbss-v3-1-9a5b9ebf62de@proton.me Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-06dt-bindings: phy: renesas,usb2-phy: Document RZ/G3L PHY bindingsBiju Das
Add device tree binding support for the RZ/G3L (r9a08g046) USB2 PHY. The RZ/G3L USB PHY is almost identical to the RZ/G3S USB PHY, the difference being 2 OTG blocks on RZ/G3L compared to 1 on RZ/G3S. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260806102236.149159-7-biju.das.jz@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-06dt-bindings: phy: qcom,m31-eusb2-phy: Document M31 eUSB2 PHY for HawiRonak Raheja
Document the M31 eUSB2 PHY for Hawi which handles the USB2 path. Use fallback to indicate the compatibility of the M31 eUSB2 PHY on the Hawi with that on the SM8750. Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://patch.msgid.link/20260803091441.3040830-3-mukesh.ojha@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-08-06dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add Hawi QMP PHYRonak Raheja
Document the Hawi compatible string for the QMP combo PHY. Hawi uses a new QSERDES V10 register layout with a new COM AON module and hardware-specific PHY init sequences compared to previous targets, requiring a dedicated compatible string. Signed-off-by: Ronak Raheja <ronak.raheja@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://patch.msgid.link/20260803091441.3040830-2-mukesh.ojha@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-29 20:45:56 +0000