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2025-11-13dt-bindings: arm: ti: add Toradex Aquila AM69João Paulo Gonçalves
Add DT compatible strings for the Toradex Aquila AM69 SoM and its supported carrier boards: the Aquila Development Board and the Clover carrier board. Link: https://www.toradex.com/computer-on-modules/aquila-arm-family/ti-am69 Link: https://www.toradex.com/products/carrier-board/aquila-development-board-kit Link: https://www.toradex.com/products/carrier-board/clover Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com> Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251111175502.8847-2-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-11-13dt-bindings: mfd: twl: Enable power button also for TWL603XAndreas Kemnade
TWL603x has also a power button function, so add the corresponding subnode. As not in all cases there is a power button connected to the corresponding pad of the TWL603x, the functionality can be disabled by status = "disabled" or simply not adding the subnode. To keep things simple, follow the established design pattern of using const interrupts as used also by the other subdevices. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251106-twl6030-button-v4-1-fdf1aa6e1e9a@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-13dt-bindings: mfd: qcom-spmi-pmic: Document PM7550 PMICLuca Weiss
Document the compatible string for the PM7550 PMIC. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://patch.msgid.link/20251023-sm7635-pmxr2230-v3-2-f70466c030fe@fairphone.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-13dt-bindings: leds: qcom,spmi-flash-led: Add PM7550Luca Weiss
Document compatible for PM7550 Torch and Flash LED controller. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://patch.msgid.link/20251023-sm7635-pmxr2230-v3-1-f70466c030fe@fairphone.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-13dt-bindings: mfd: qcom,spmi-pmic: Document PMIV0104Luca Weiss
Add the PMIV0104 PMIC which is found on e.g. boards with Milos SoCs. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Link: https://patch.msgid.link/20251023-sm7635-pmiv0104-v3-1-27f1c417376d@fairphone.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-13dt-bindings: interrupt-controller: Add support for Amlogic S6 S7 and S7D SoCsXianwei Zhao
Update the device tree binding document for GPIO interrupt controller of Amlogic S6 S7 and S7D SoCs. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251105-irqchip-gpio-s6-s7-s7d-v1-1-b4d1fe4781c1@amlogic.com
2025-11-13Merge tag 'linux-can-next-for-6.19-20251112-2' of ↵Paolo Abeni
git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next Marc Kleine-Budde says: ==================== pull-request: can-next 2025-11-12 this is a pull request of 11 patches for net-next/main. The first 3 patches are by Vadim Fedorenko and convert the CAN drivers to use the ndo_hwtstamp callbacks. Maud Spierings contributes a patch for the mcp251x driver that converts it to use dev_err_probe(). The next 6 patches target the mcp251xfd driver and are by Gregor Herburger and me. They add GPIO controller functionality to the driver. The final patch is by Chu Guangqing and fixes a typo in the bxcan driver. linux-can-next-for-6.19-20251112-2 * tag 'linux-can-next-for-6.19-20251112-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next: can: bxcan: Fix a typo error for assign dt-bindings: can: mcp251xfd: add gpio-controller property can: mcp251xfd: add gpio functionality can: mcp251xfd: only configure PIN1 when rx_int is set can: mcp251xfd: add workaround for errata 5 can: mcp251xfd: utilize gather_write function for all non-CRC writes can: mcp251xfd: move chip sleep mode into runtime pm can: mcp251x: mcp251x_can_probe(): use dev_err_probe() can: peak_usb: convert to use ndo_hwtstamp callbacks can: peak_canfd: convert to use ndo_hwtstamp callbacks can: convert generic HW timestamp ioctl to ndo_hwtstamp callbacks ==================== Link: https://patch.msgid.link/20251112184344.189863-1-mkl@pengutronix.de Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-11-13dt-bindings: media: i2c: document Sony IMX111 CMOS sensorSvyatoslav Ryhel
Add bindings for Sony IMX111 CMOS Digital Image Sensor found in LG Optimus 4X (P880) and Optimus Vu (P895) smartphones. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2025-11-13dt-bindings: pwm: thead: Add T-HEAD TH1520 PWM controllerMichal Wilczynski
Add the Device Tree binding documentation for the T-HEAD TH1520 SoC PWM controller. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Drew Fustini <fustini@kernel.org> Reviewed-by: Elle Rhumsaa <elle@weathered-steel.dev> Signed-off-by: Michal Wilczynski <m.wilczynski@samsung.com> Link: https://patch.msgid.link/20251016-rust-next-pwm-working-fan-for-sending-v16-5-a5df2405d2bd@samsung.com Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-11-12dt-bindings: hwmon: ST TSC1641 power monitorIgor Reznichenko
Add binding for the TSC1641 I2C power monitor. Signed-off-by: Igor Reznichenko <igor@reznichenko.net> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251105201406.1210856-2-igor@reznichenko.net Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2025-11-12dt-bindings: can: mcp251xfd: add gpio-controller propertyGregor Herburger
The mcp251xfd has two pins that can be used as gpio. Add gpio-controller property to binding description. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com> Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251001091006.4003841-7-viken.dadhaniya@oss.qualcomm.com Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
2025-11-12dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uartJunhui Liu
The Anlogic DR1V90 SoC integrates a UART controller compatible with snps,dw-apb-uart, operating at a 50 MHz clock. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMERJunhui Liu
Add MTIMER support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a TIMER unit compliant with the ACLINT specification. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12dt-bindings: riscv: Add Anlogic DR1V90Junhui Liu
Add Anlogic DR1V90 FPSoC, featuring a UX900 RISC-V core as the processing system (PS) and 94,464 LUTs programmable logic (PL). It is used by the Milianke MLKPAI-FS01 board, a SBC equipped with 512MB DDR3 memory, USB-C UART, 1GbE RJ45 Ethernet, USB-A 2.0 port, TF card slot, and 256Mbit Quad-SPI flash. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12dt-bindings: riscv: Add Nuclei UX900 compatiblesJunhui Liu
The UX900 is a RISC-V core from Nuclei, used in the Anlogic DR1V90 SoC. It features a 64-bit architecture and dual-issue, 9-stage pipeline, with lots of optional extensions including V, K, Zc, and more. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12dt-bindings: vendor-prefixes: Add Anlogic, Milianke and NucleiJunhui Liu
Add vendor prefixes for "anlogic", "milianke" and "nuclei". These are required for describing the Milianke MLKPAI-FS01 board with DR1V90 SoC from Anlogic, which uses a processor core designed by Nuclei. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-11-12spi: dt-bindings: nuvoton,npcm-pspi: Convert to DT schemaTomer Maimon
Convert the Nuvoton NPCM PSPI binding to DT schema format. Also update the binding to fix shortcoming: * Drop clock-frequency property: it is never read in the NPCM PSPI driver and has no effect. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251112150950.1680154-1-tmaimon77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-12phy: phy-can-transceiver: Support TJA1048/TJA1051Vinod Koul
Peng Fan <peng.fan@nxp.com> says: TJA1048 is a Dual channel can transceiver with Sleep mode supported. TJA105{1,7} is a Single Channel can transceiver with Sleep mode supported. Link: https://patch.msgid.link/20251001-can-v7-0-fad29efc3884@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-12dt-bindings: phy: ti,tcan104x-can: Document NXP TJA105X/1048Peng Fan
The TJA1048 is a dual high-speed CAN transceiver with sleep mode supported and no EN pin. The TJA1051 is a high-speed CAN transceiver with slient mode supported, but only TJA1051T/E has EN pin. To make it simple, make enable-gpios as optional for TJA1051. The TJA1057 is a high-speed CAN transceiver with slient mode supported and no EN pin. Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> Link: https://patch.msgid.link/20251001-can-v7-1-fad29efc3884@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-11-12dt-bindings: riscv: spacemit: Add OrangePi R2S boardMichael Opdenacker
Document the compatible string for the OrangePi R2S board [1], which is marketed as using the Ky X1 SoC but is in fact identical in die and package to the SpacemiT K1 SoC [2]. Link: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-R2S.html [1] Link: https://www.spacemit.com/en/key-stone-k1 [2] Signed-off-by: Michael Opdenacker <michael.opdenacker@rootcommit.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20251112044426.2351999-2-michael.opdenacker@rootcommit.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-11-11dt-bindings: interrupt-controller: aspeed,ast2700: Correct #interrupt-cells ↵Ryan Chen
and interrupts count Update the AST2700 interrupt controller binding to match the actual hardware and the irq-aspeed-intc driver behavior. - Interrupts: First-level INTC banks request multiple interrupt lines to the root GIC, with a maximum of 10 per bank. Second-level INTC banks request only one interrupt line to their parent INTC-IC. Therefore, set the interrupts property to allow a minimum of 1 and a maximum of 10 entries. - #interrupt-cells: Set '#interrupt-cells' to <1> since the aspeed intc driver does not support specifying a trigger type; only the interrupt index is used. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251030060155.2342604-2-ryan_chen@aspeedtech.com
2025-11-11dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT SSWIJunhui Liu
Add SSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a TIMER unit compliant with the ACLINT specification. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-6-5478db4f664a@pigmoral.tech
2025-11-11dt-bindings: interrupt-controller: Add Anlogic DR1V90 ACLINT MSWIJunhui Liu
Add MSWI support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with a TIMER unit compliant with the ACLINT specification. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-5-5478db4f664a@pigmoral.tech
2025-11-11dt-bindings: interrupt-controller: Add Anlogic DR1V90 PLICJunhui Liu
Add PLIC support for Anlogic DR1V90. Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251021-dr1v90-basic-dt-v3-4-5478db4f664a@pigmoral.tech
2025-11-11dt-bindings: mmc: socionext,milbeaut-m10v-sdhci-3.0: convert to DT schemaCharan Pedumuru
Convert SOCIONEXT Milbeaut SDHCI controller binding to YAML format. Add a new property "voltage-ranges" to resolve dt_check errors. Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-11dt-bindings: mmc: ti,da830-mmc: convert to DT schemaCharan Pedumuru
Convert TI Highspeed MMC host controller binding to YAML format. Define 'clocks' and 'interrupts' properties to resolve errors identified by 'dt_check' and 'dtb_check'. Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-11dt-bindings: mmc: sdhci-of-dwcmshc: Add Eswin EIC7700Huan He
EIC7700 use Synopsys dwcmshc IP for SD/eMMC controllers. Add Eswin EIC7700 support in sdhci-of-dwcmshc.yaml. Signed-off-by: Huan He <hehuan1@eswincomputing.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-11dt-bindings: clock: document 8ULP's SIM LPAVLaurentiu Mihalcea
Add documentation for i.MX8ULP's SIM LPAV module. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com> Link: https://lore.kernel.org/r/20251104120301.913-3-laurentiumihalcea111@gmail.com Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
2025-11-11Merge tag 'v6.18-rc5' into media-nextMauro Carvalho Chehab
Linux 6.18-rc5 * tag 'v6.18-rc5': (1016 commits) Linux 6.18-rc5 kbuild: Let kernel-doc.py use PYTHON3 override rtc: rx8025: fix incorrect register reference Revert "drm/nouveau: set DMA mask before creating the flush page" io_uring: fix regbuf vector size truncation compiler_types: Move unused static inline functions warning to W=2 smb: client: validate change notify buffer before copy tracing/tools: Fix incorrcet short option in usage text for --threads drm/xe: Enforce correct user fence signaling order using x86/microcode/AMD: Add more known models to entry sign checking drm/xe: Do clean shutdown also when using flr drm/xe: Move declarations under conditional branch drm/xe/guc: Synchronize Dead CT worker with unbind tracing: Fix memory leaks in create_field_var() ring-buffer: Do not warn in ring_buffer_map_get_reader() when reader catches up tracing: tprobe-events: Fix to put tracepoint_user when disable the tprobe tracing: tprobe-events: Fix to register tracepoint correctly gpio: tb10x: Drop unused tb10x_set_bits() function drm/amd/display: Enable mst when it's detected but yet to be initialized drm/amdgpu: Fix wait after reset sequence in S3 ...
2025-11-11dt-bindings: pinctrl: airoha: Document AN7583 Pin ControllerChristian Marangi
Document Airoha AN7583 Pin Controller based on Airoha EN7581 with some minor difference on some function group (PCM and LED gpio). To not bloat the EN7581 schema with massive if condition, use a dedicated YAML schema for Airoha AN7583. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-11dt-bindings: pinctrl: mt7988: allow gpio-hogsFrank Wunderlich
Allow gpio-hogs in pinctrl node for switching pcie on Bananapi R4 Pro. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogiocchino.delregno@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10dt-bindings: pinctrl: Add rk3506 pinctrl supportYe Zhang
Add the compatible string for the rk3506 SoC. Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10Merge tag 'samsung-pinctrl-6.19' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.19 Add pin controller support for Samsung Exynos8890 and Axis ARTPEC-9 SoCs. The latter is a newer design of Artpec SoCs made/designed by Samsung, thus it shares most of the core blocks with Samsung Exynos, including the pinctrl. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10ASoC: dt-bindings: consolidate simple audio codec to trivial-codec.yamlFrank Li
Consolidate simple audio codec (one compatible string, one reg, one optional reset-gpios and '#sound-dai-cells' 0) to a trivial-codec.yaml. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251031144622.4033833-1-Frank.Li@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-10dt-bindings: thermal: qcom-tsens: document the Kaanapali Temperature SensorManaf Meethalavalappu Pallikunhi
Document the Temperature Sensor (TSENS) on the Kaanapali Platform. Signed-off-by: Manaf Meethalavalappu Pallikunhi <manaf.pallikunhi@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251021-b4-knp-tsens-v2-1-7b662e2e71b4@oss.qualcomm.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2025-11-10dt-bindings: thermal: r9a09g047-tsu: Document RZ/V2H TSUOvidiu Panait
The Renesas RZ/V2H SoC includes a Thermal Sensor Unit (TSU) block designed to measure the junction temperature. The device provides real-time temperature measurements for thermal management, utilizing two dedicated channels for temperature sensing. The Renesas RZ/V2H SoC is using the same TSU IP found on the RZ/G3E SoC, the only difference being that it has two channels instead of one. Add new compatible string "renesas,r9a09g057-tsu" for RZ/V2H and use "renesas,r9a09g047-tsu" as a fallback compatible to indicate hardware compatibility with the RZ/G3E implementation. Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251020143107.13974-3-ovidiu.panait.rb@renesas.com
2025-11-10dt-bindings: display: renesas,rzg2l-du: Add support for RZ/V2N SoCLad Prabhakar
Document support for the DU IP found on the Renesas RZ/V2N (R9A09G056) SoC. The DU IP is functionally identical to that on the RZ/V2H(P) SoC, so no driver changes are needed. The existing `renesas,r9a09g057-du` compatible will be used as a fallback for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20251023213350.681602-1-prabhakar.mahadev-lad.rj@bp.renesas.com
2025-11-10dt-bindings: pinctrl: Convert sprd,sc9860-pinctrl to DT schemaRob Herring (Arm)
Convert the sprd,sc9860-pinctrl binding to DT schema format. What's valid for the the sleep mode child nodes wasn't well defined. The schema is based on the example (as there's no .dts with pin states) and the driver's register definitions. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10dt-bindings: fpga: update link for Altera's and AMD partial reconDinh Nguyen
The link is giving the 404 error, so use the correct link for the documents Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20251101190848.24271-1-dinguyen@kernel.org Reviewed-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
2025-11-10dt-bindings: PCI: amlogic: Fix the register name of the DBI regionManivannan Sadhasivam
Binding incorrectly specifies the 'DBI' region as 'ELBI'. DBI is a must have region for DWC controllers as it has the Root Port and controller specific registers, while ELBI has optional registers. Hence, fix the binding. Though this is an ABI break, this change is needed to accurately describe the PCI memory map. Fixes: 7cd210391101 ("dt-bindings: PCI: meson: add DT bindings for Amlogic Meson PCIe controller") Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://patch.msgid.link/20251101-pci-meson-fix-v1-1-c50dcc56ed6a@oss.qualcomm.com
2025-11-09dt-bindings: firmware: svc: Add IOMMU support for Agilex5Khairul Anuar Romli
In Agilex5, the TBU (Translation Buffer Unit) can now operate in non-secure mode, enabling Linux to utilize it through the IOMMU framework. This allows improved memory management capabilities in non-secure environments. With Agilex5 lifting this restriction, we are now extending the device tree bindings to support IOMMU for the Agilex5 SVC. Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2025-11-09dt-bindings: iio: dac: Document AD5446 and similar devicesNuno Sá
Add device tree binding documentation for the Analog Devices AD5446 family of Digital-to-Analog Converters and derivative devices from Texas Instruments. There's both SPI and I2C interfaces and feature resolutions ranging from 8-bit to 16-bit. The binding covers 29 derivatives devices including the AD5446 series, AD5600 series, AD5620/5640/5660 variants with different voltage ranges, and TI DAC081s101/DAC101s101/DAC121s101 devices. Signed-off-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: Add the Renesas RZ/N1 ADCHerve Codina (Schneider Electric)
The Renesas RZ/N1 ADC controller is the ADC controller available in the Renesas RZ/N1 SoCs family. Signed-off-by: Herve Codina (Schneider Electric) <herve.codina@bootlin.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: Add AST2700 ADC compatible stringsBilly Tsai
Add the compatible strings "aspeed,ast2700-adc0" and "aspeed,ast2700-adc1" to the binding for the Aspeed ADC. These new compatibles represent the ADC instances found on the AST2700 SoC, which are similar to the AST2600 but have their trimming data located at different SCU offset. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: imu: mpu6050: remove interrupts from required listFrank Li
Irq is optional signal to make sensor work. Not all boards connect this signals, so remove it from required list. Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: Support MediaTek MT8189 evb board auxadcJack Hsu
add compatible string for mt8189 evb board dts node of auxadc Signed-off-by: Jack Hsu <jh.hsu@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: pressure: Add Aosong adp810Akhilesh Patil
Add bindings for adp810 differential pressure and temperature sensor. This sensor communicates over I2C with CRC support and can measure pressure in the range -500 to 500Pa and temperature in the range -40 to +85 degree celsius. Signed-off-by: Akhilesh Patil <akhilesh@ee.iitb.ac.in> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: Add rockchip,rk3506-saradc variantHeiko Stuebner
The SARADC of the RK3506 is similar to the one found in the RK3528 in terms of number of channels and the other implementation details. So add a variant compatible for it, that reflects this fact. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: adi,ad4080: add support for AD4087Antoniu Miclaus
Add device tree binding support for the AD4087 14-bit SAR ADC. Add adi,ad4087 to the compatible enum. A fallback compatible string to adi,ad4080 is not appropriate as the AD4087 has different resolution (14-bit vs 20-bit) and LVDS CNV clock count maximum (1 vs 7), requiring different driver configuration. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-09dt-bindings: iio: adc: adi,ad4080: add support for AD4086Antoniu Miclaus
Add device tree binding support for the AD4086 14-bit SAR ADC. Add adi,ad4086 to the compatible enum. A fallback compatible string to adi,ad4080 is not appropriate as the AD4086 has different resolution (14-bit vs 20-bit) and LVDS CNV clock count maximum (4 vs 7), requiring different driver configuration. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-09 01:53:42 +0000