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2025-11-09dt-bindings: iio: adc: adi,ad4080: add support for AD4083Antoniu Miclaus
Add device tree binding support for the AD4083 16-bit SAR ADC. Add adi,ad4083 to the compatible enum. A fallback compatible string to adi,ad4080 is not appropriate as the AD4083 has different resolution (16-bit vs 20-bit) and LVDS CNV clock count maximum (5 vs 7), requiring different driver configuration. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-11-08dt-bindings: i3c: snps: Add Altera SoCFPGA compatibleAdrian Ng Ho Yin
Add the "altr,agilex5-dw-i3c-master" compatible string to the Synopsys DesignWare I3C master binding. This allow Agilex5 to use the generic DW I3C master controller while applying any required platform-specific quirks. Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/4ef059b129e9457eaadcfa6b996b9b6b000c7dba.1762237922.git.adrianhoyin.ng@altera.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-11-08scsi: dt-bindings: phy: mediatek,ufs-phy: Update maintainer information in ↵Peter Wang
mediatek,ufs-phy.yaml Replace Stanley Chu with me and Chaotian in the maintainers field, since his email address is no longer active. Signed-off-by: Peter Wang <peter.wang@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251103115808.3771214-1-peter.wang@mediatek.com Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-11-07spi: enable the SpacemiT K1 SoC QSPIMark Brown
Merge series from Alex Elder <elder@riscstar.com>: This series adds support for the SpacemiT K1 SoC QSPI. This IP is generally compatible with the Freescale QSPI driver, requiring three minor changes to enable it to be supported. The changes are: - Adding support for optional resets - Having the clock *not* be disabled when changing its rate - Allowing the size of storage blocks written to flash chips to be set to something different from the AHB buffer size
2025-11-06dt-bindings: rtc: Document NVIDIA VRS RTCShubhi Garg
Add device tree bindings for NVIDIA VRS (Voltage Regulator Specification) RTC device. NVIDIA VRS is a Power Management IC (PMIC) that implements a power sequencing solution with I2C interface. The device includes RTC which provides functionality to get/set system time, retain system time across boot, wake system from suspend and shutdown state. Supported platforms: - NVIDIA Jetson AGX Orin Developer Kit - NVIDIA IGX Orin Development Kit - NVIDIA Jetson Orin NX Developer Kit - NVIDIA Jetson Orin Nano Developer Kit Signed-off-by: Shubhi Garg <shgarg@nvidia.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Tested-by: Jon Hunter <jonathanh@nvidia.com> Link: https://patch.msgid.link/20251007135738.487694-2-shgarg@nvidia.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-11-06dt-bindings: arm: rockchip: Add 9Tripod X3568 seriesCoia Prant
This documents 9Tripod X3568 v4 which is a SBC based on RK3568 SoC. Link: http://www.9tripod.com/showpro.php?id=117 Link: https://appletsapi.52solution.com/media/X3568V4%E5%BC%80%E5%8F%91%E6%9D%BF%E7%A1%AC%E4%BB%B6%E6%89%8B%E5%86%8C.pdf Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251103171702.1518730-3-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-06dt-bindings: vendor-prefixes: Add 9TripodCoia Prant
Add 9Tripod to the vendor prefixes. Signed-off-by: Coia Prant <coiaprant@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251103171702.1518730-2-coiaprant@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-11-06dt-bindings: net: dsa: lantiq,gswip: add support for MaxLinear GSW1xx switchesDaniel Golle
Extend the Lantiq GSWIP device tree binding to also cover MaxLinear GSW1xx switches which are based on the same hardware IP but connected via MDIO instead of being memory-mapped. Add compatible strings for MaxLinear GSW120, GSW125, GSW140, GSW141, and GSW145 switches and adjust the schema to handle the different connection methods with conditional properties. Add MaxLinear GSW125 example showing MDIO-connected configuration. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/fc96f1dedb2b418a63e69960356dde7f6eb86424.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-06dt-bindings: net: dsa: lantiq,gswip: add support for MII delay propertiesDaniel Golle
Add support for standard tx-internal-delay-ps and rx-internal-delay-ps properties on port nodes to allow fine-tuning of RGMII clock delays. The GSWIP switch hardware supports delay values in 500 picosecond increments from 0 to 3500 picoseconds, with a post-reset default of 2000 picoseconds for both TX and RX delays. The driver currently sets the delay to 0 in case the PHY is setup to carry out the delay by the corresponding interface modes ("rgmii-id", "rgmii-rxid", "rgmii-txid"). This corresponds to the driver changes that allow adjusting MII delays using Device Tree properties instead of relying solely on the PHY interface mode. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/9e007d4f85c2c6d69e0b91f3663d99e0f6fc8eac.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-06dt-bindings: net: dsa: lantiq,gswip: add MaxLinear RMII refclk output propertyDaniel Golle
Add support for the maxlinear,rmii-refclk-out boolean property on port nodes to configure the RMII reference clock to be an output rather than an input. This property is only applicable for ports in RMII mode and allows the switch to provide the reference clock for RMII-connected PHYs instead of requiring an external clock source. This corresponds to the driver changes that read this Device Tree property to configure the RMII clock direction. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/9813bb916ecce9bae366e6c50c081014fe5371ea.1762170107.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-06dt-bindings: rtc: Add support for ATCRTC100 RTCCL Wang
Document Device Tree bindings for the Andes ATCRTC100 Real-Time Clock. Signed-off-by: CL Wang <cl634@andestech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250915031439.2680364-2-cl634@andestech.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
2025-11-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.18-rc5). Conflicts: drivers/net/wireless/ath/ath12k/mac.c 9222582ec524 ("Revert "wifi: ath12k: Fix missing station power save configuration"") 6917e268c433 ("wifi: ath12k: Defer vdev bring-up until CSA finalize to avoid stale beacon") https://lore.kernel.org/11cece9f7e36c12efd732baa5718239b1bf8c950.camel@sipsolutions.net Adjacent changes: drivers/net/ethernet/intel/Kconfig b1d16f7c0063 ("libie: depend on DEBUG_FS when building LIBIE_FWLOG") 93f53db9f9dc ("ice: switch to Page Pool") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-06spi: dt-bindings: fsl-qspi: add optional resetsAlex Elder
Allow two resets to be defined to support the SpacemiT K1 SoC QSPI IP. Move the allOf block down, below the required section. Reviewed-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alex Elder <elder@riscstar.com> Link: https://patch.msgid.link/20251027133008.360237-3-elder@riscstar.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-06spi: dt-bindings: fsl-qspi: support SpacemiT K1Alex Elder
Add the SpacemiT K1 SoC QSPI IP to the list of supported hardware. This is the first non-Freescale device represented here. It has a nearly identidal register set, and this binding correctly describes the hardware. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Alex Elder <elder@riscstar.com> Link: https://patch.msgid.link/20251027133008.360237-2-elder@riscstar.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-06dt-bindings: mfd: tps65910: Make interrupt properties optionalShree Ramamoorthy
Mark 'interrupts', 'interrupt-controller', and 'interrupt-cells' as optional in the binding schema. The 'interrupts' property should not be required for the TPS65910 PMIC. On the AM335x-ICEV2 SoC, there is no hardware connection from the PMIC_INT pin to the SoC. Without the 'interrupts' property defined, the PMIC cannot forward interrupts. Signed-off-by: Shree Ramamoorthy <s-ramamoorthy@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251021182716.292652-1-s-ramamoorthy@ti.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-06dt-bindings: mfd: dlg,da9063: Allow wakeup-source propertyFrank Li
Allow wakeup-source property to below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/imx/imx6dl-emcon-avari.dtb: pmic@58 (dlg,da9063): onkey: 'wakeup-source' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251014184114.2353199-1-Frank.Li@nxp.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-06dt-bindings: mfd: Add Renesas R2A11302FT PMICWolfram Sang
This PMIC is referenced in upstream DTs for the Renesas Lager and Koelsch boards. Sadly, there is no documentation available. This minimal binding description states the facts that we do know. Fixes: arch/arm/boot/dts/renesas/r8a7790-lager.dtb: /soc/spi@e6e10000/pmic@0: failed to match any schema with compatible: ['renesas,r2a11302ft'] arch/arm/boot/dts/renesas/r8a7791-koelsch.dtb: /soc/spi@e6e20000/pmic@0: failed to match any schema with compatible: ['renesas,r2a11302ft'] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251010094734.10487-2-wsa+renesas@sang-engineering.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-06dt-bindings: max77705: Add interrupt-controller propertyDzmitry Sankouski
Add interrupt-controller property, because max77705 has dedicated interrupt source register to determine which sub device triggered an interrupt. Signed-off-by: Dzmitry Sankouski <dsankouski@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-06dt-bindings: mfd: sy7636a: Add missing GPIO pins and supplyAndreas Kemnade
To be able to fully describe how the SY7636A is connected to the system, add properties for the EN and VCOM_EN pins. To squeeze out every bit of unused current, in many devices it is possible to power off the complete chip. Add an input regulator to allow that. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andreas Kemnade <akemnade@kernel.org> Signed-off-by: Lee Jones <lee@kernel.org>
2025-11-06dt-bindings: riscv: spacemit: add MusePi Pro boardTroy Mitchell
Document the compatible string for the MusePi Pro [1]. It is a 1.8-inch single board computer based on the SpacemiT K1/M1 RISC-V SoC [2]. Here's a refined list of its core features: - SoC: SpacemiT M1/K1, 8-core 64-bit RISC-V. - Memory: LPDDR4X @ 2400MT/s, available in 8GB & 16GB options. - Storage: Onboard eMMC 5.1 (64GB/128GB options), M.2 M-Key for NVMe SSD (2230 size), and a microSD slot (UHS-II) for expansion. - Display: HDMI 1.4 (1080P@60Hz) and 2-lane MIPI DSI FPC (1080P@60Hz). - Connectivity: Onboard Wi-Fi 6 & Bluetooth 5.2, single Gigabit Ethernet port (RJ45). - USB: 4x USB 3.0 Type-A (host) and 1x USB 2.0 Type-C (device/OTG). - Expansion: Full-size miniPCIe slot and a second M.2 M-Key (2230). - GPIO: Standard 40-pin GPIO interface. - MIPI: 1x 4-lane MIPI CSI FPC and 2x MIPI DSI FPC interfaces. - Clock: Onboard RTC with battery support. Link: https://developer.spacemit.com/documentation?token=YJtdwnvvViPVcmkoPDpcvwfVnrh&type=pdf [1] Link: https://www.spacemit.com/en/key-stone-k1 [2] Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Link: https://lore.kernel.org/r/20251023-k1-musepi-pro-dts-v4-1-01836303e10f@linux.spacemit.com Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-11-06media: dt-bindings: Add qcom,msm8939-camssVincent Knecht
Add bindings for qcom,msm8939-camss in order to support the camera subsystem for MSM8939. Signed-off-by: Vincent Knecht <vincent.knecht@mailoo.org> [André: Make order of items the same as in 8916] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: André Apitzsch <git@apitzsch.eu> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2025-11-06dt-bindings: media: Describe Qualcomm SM8650 CAMSS IPVladimir Zapolskiy
Add device tree bindings for Qualcomm SM8650 camera subsystem. Qualcomm SM8650 CAMSS IP contains the next subdevices: * 6 x CSIPHY, * 3 x CSID, 2 x CSID Lite, * 3 x IFE, 2 x IFE Lite. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2025-11-06media: dt-bindings: qcom,x1e80100-camss: Fix typo in CSIPHY supply descriptionKrzysztof Kozlowski
Correct description of the CSIPHY 1.2 V supply ("vdd-csiphy-1p2-supply"), because it supplies 1.2 V, confirmed with DTS on the mailing lists. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2025-11-06dt-bindings: arm: document the static TPDM compatibleJie Gan
The static TPDM device is intended for sources that do not require MMIO mapping. Its compatible string should be documented clearly, along with an example illustrating how to define a static TPDM node in the DT. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251028-add_static_tpdm_support-v4-1-84e21b98e727@oss.qualcomm.com Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
2025-11-06Add support MT6316/6363/MT6373 PMICs regulatorsMark Brown
Merge series from AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>: This series adds support for three new MediaTek PMICs: MT6316, MT6363 and MT6373 and their variants - used in board designs featuring the MediaTek MT8196 Chromebook SoC, or the MT6991 Dimensity 9400 Smartphone SoC. In particular, MT6316 is a regulator, but the MT6363 and MT6373 PMICs are multi-function devices, as they have and expose multiple sub-devices; moreover, some of those also contain an interrupt controller, managing internal IPs interrupts: for those, a chained interrupt handler is registered, which parent is the SPMI controller itself. This series adds support for all of the MT6316 regulator variants and for MT6363, MT6373 SPMI PMICs and their interrupt controller.
2025-11-06ASoC: qcom: q6dsp: fixes and updatesMark Brown
Merge series from Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com>: This patchset has 4 fixes and some enhancements to the Elite DSP driver support. Fixes includes - setting correct flags for expected behaviour of appl_ptr - fix closing of copp instances - fix buffer alignment. - fix state checks before closing asm stream Enhancements include: - adding q6asm_get_hw_pointer and ack callback support - simplify code via __free(kfree) mechanism. - use spinlock guards - few cleanups discovered during doing above 2. There is another set of updates comming soon, which will add support for early memory mapping and few more modules support in audioreach.
2025-11-06dt-bindings: crypto: qcom-qce: Document the kaanapli crypto engineGaurav Kashyap
Document the crypto engine on the kaanapali platform. Signed-off-by: Gaurav Kashyap <gaurav.kashyap@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-06dt-bindings: crypto: qcom,prng: Document kaanapali RNGGaurav Kashyap
Document kaanapali compatible for the True Random Number Generator. Signed-off-by: Gaurav Kashyap <gaurav.kashyap@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-11-05dt-bindings: ethernet: eswin: fix yaml schema issuesShangjuan Wei
eswin,hsp-sp-csr attribute is one phandle with multiple arguments, so the syntax should be in the form of: items: - items: - description: ... - description: ... - description: ... - description: ... To align with the description of the 'eswin-sp-csr' attribute in the mmc,usb modules, the description of the 'eswin,hsp-sp-csr' attribute has been modified. Fixes: 888bd0eca93c ("dt-bindings: ethernet: eswin: Document for EIC7700 SoC") Reported-by: Rob Herring (Arm) <robh@kernel.org> Closes: https://lore.kernel.org/all/176096011380.22917.1988679321096076522.robh@kernel.org/ Signed-off-by: Shangjuan Wei <weishangjuan@eswincomputing.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251104073305.299-1-weishangjuan@eswincomputing.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-05dt-bindings: regulator: Document MediaTek MT6363 PMIC RegulatorsAngeloGioacchino Del Regno
Add bindings for the regulators found in the MediaTek MT6363 PMIC, usually found in board designs using the MT6991 Dimensity 9400 and on MT8196 Kompanio SoC for Chromebooks, along with the MT6316 and MT6373 PMICs. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20251027110527.21002-4-angelogioacchino.delregno@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-05dt-bindings: regulator: Document MediaTek MT6316 PMIC RegulatorsAngeloGioacchino Del Regno
Add bindings for the regulators found in the MediaTek MT6316 PMIC, usually found in board designs using the MT6991 Dimensity 9400 and on MT8196 Kompanio SoC for Chromebooks. This chip is fully controlled by SPMI and has multiple variants providing different phase configurations. Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20251027110527.21002-2-angelogioacchino.delregno@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-05dt-bindings: arm: mediatek: add BPI-R4 Pro boardFrank Wunderlich
Add compatibles for Bananapi R4 Pro boards. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-11-05dt-bindings: soc: bcm: Add bcm2712 compatibleStanimir Varbanov
Add bcm2712-pm compatible and update the bindings to satisfy it's requirements. The PM hardware block inside bcm2712 lacks the "asb" and "rpivid_asb" register ranges and also does not have clocks, update the bindings accordingly. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-11-05ASoC: dt-bindings: ti,pcm1862: convert to dtschemaRanganath V N
convert the Texas Instruments PCM186x Universal audio ADC bindings to DT schema. The PCM186x codec provides a single digital audio interface. Therefore this binding adds a reference to dai-common.yaml and defines '#sound-dai-cells = 0". Signed-off-by: Ranganath V N <vnranganath.20@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251104-dtbs-v7-1-224aacb09671@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-05spi: tegra210-quad: Improve timeout handling underMark Brown
Merge series from Vishwaroop A <va@nvidia.com>: This patch series addresses timeout handling issues in the Tegra QSPI driver that occur under high system load conditions. We've observed that when CPUs are saturated (due to error injection, RAS firmware activity, or general CPU contention), QSPI interrupt handlers can be delayed, causing spurious transfer failures even though the hardware completed the operation successfully. These changes have been tested in production environments under various high load scenarios including RAS testing and CPU saturation workloads.
2025-11-05dt-bindings: gpu: img,powervr-rogue: Document GE7800 GPU in Renesas R-Car M3-NMarek Vasut
Document Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 present in Renesas R-Car R8A77965 M3-N SoC. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Link: https://patch.msgid.link/20251104135716.12497-2-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-11-05dt-bindings: gpu: img,powervr-rogue: Keep lists sorted alphabeticallyMarek Vasut
Sort the enum: list alphabetically. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Matt Coster <matt.coster@imgtec.com> Link: https://patch.msgid.link/20251104135716.12497-1-marek.vasut+renesas@mailbox.org Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-11-05dt-bindings: soc: samsung: exynos-pmu: allow mipi-phy subnode for Exynos7870 PMUKaustabh Chakraborty
Exynos7870 PMU is already documented in schema. Add Exynos7870's PMU compatible to the list of nodes which allow a MIPI PHY driver. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251031-exynos7870-drm-dts-v4-1-c1f77fb16b87@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-11-04dt-bindings: net: ethernet-phy: clarify when compatible must specify PHY IDBuday Csaba
Change PHY ID description in ethernet-phy.yaml to clarify that a PHY ID is required (may -> must) when the PHY requires special initialization sequence. Link: https://lore.kernel.org/netdev/20251026212026.GA2959311-robh@kernel.org/ Link: https://lore.kernel.org/netdev/aQIZvDt5gooZSTcp@debianbuilder/ Signed-off-by: Buday Csaba <buday.csaba@prolan.hu> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://patch.msgid.link/64c52d1a726944a68a308355433e8ef0f82c4240.1762157515.git.buday.csaba@prolan.hu Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-11-04dt-bindings: mmc: ti,omap2430-sdhci: convert to DT schemaCharan Pedumuru
Convert TI OMAP SDHCI Controller binding to YAML format. Changes during Conversion: - Define new properties like "clocks", "clock-names", "pbias-supply" and "power-domains" to resolve dtb_check errors. - Remove "pinctrl-names" and "pinctrl-<n>" from required as they are not necessary for all DTS files. - Remove "ti,hwmods" property entirely from the YAML as the DTS doesn't contain this property for the given compatibles and the text binding is misleading. - Add "clocks", "clock-names" and "max-frequency" to the required properties based on the compatible and the text binding doesn't mention these properties as required. - Add missing strings like "default-rev11", "sdr12-rev11", "sdr25-rev11", "hs-rev11", "sdr25-rev11" and "sleep" to pinctrl-names string array to resolve errors detected by dtb_check. Signed-off-by: Charan Pedumuru <charan.pedumuru@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20251024-ti-sdhci-omap-v5-3-df5f6f033a38@gmail.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-11-04dt-bindings: omap: add AM335x-based TQMa335x SOM and MBa335x boardMatthias Schiffer
TQMa335x[L] is a SOM family using TI AM335x CPU family. MBa335x is an evaluation mainboard for this SOM. Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250826140853.2570528-2-alexander.stein@ew.tq-group.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-11-04ASoC: dt-bindings: ti,tas2781: Add TAS5822 supportBaojun Xu
TAS5822 is in same family with TAS58XX. Signed-off-by: Baojun Xu <baojun.xu@ti.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20251104041314.792-2-baojun.xu@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-11-04regulator: pf9453: optimize PMIC PF9453 driverMark Brown
Merge series from Joy Zou <joy.zou@nxp.com>: For the details, please check the patch commit log. Signed-off-by: Joy Zou <joy.zou@nxp.com> --- Joy Zou (3): regulator: pf9453: change the device ID register address regulator: pf9453: remove low power mode regulator: pf9453: remove unused I2C_LT register drivers/regulator/pf9453-regulator.c | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) --- base-commit: 98bd8b16ae57e8f25c95d496fcde3dfdd8223d41 change-id: 20251103-b4-next-pf9453-c9f8fb6e0c10 Best regards, -- Joy Zou <joy.zou@nxp.com>
2025-11-03dt-bindings: firmware: qcom,scm: Document SCM on Kaanapali SOCJingyi Wang
Document SCM compatible for the Qualcomm Kaanapali SoC. Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251102-knp-soc-binding-v3-2-11255ec4a535@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-03Merge branch '20251030-gcc_kaanapali-v2-v2-3-a774a587af6f@oss.qualcomm.com' ↵Bjorn Andersson
into clk-for-6.19 Merge Kaanapali RPMh, TCSR and global clock controllers through a topic branch, so they can be made available in the DeviceTree branch as well.
2025-11-03dt-bindings: clock: qcom: Add Kaanapali Global clock controllerTaniya Das
Add device tree bindings for the global clock controller on Qualcomm Kaanapali platform. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251030-gcc_kaanapali-v2-v2-3-a774a587af6f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-03dt-bindings: clock: qcom: Document the Kaanapali TCSR Clock ControllerTaniya Das
Add bindings documentation for TCSR Clock Controller for Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251030-gcc_kaanapali-v2-v2-2-a774a587af6f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-03dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for KaanapaliTaniya Das
Update the documentation for RPMH clock controller for Kaanapali SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20251030-gcc_kaanapali-v2-v2-1-a774a587af6f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-11-03dt-bindings: arm-smmu: Add compatible for Kaanapali and Glymur SoCsJingyi Wang
Qualcomm Kaanapali and Glymur SoCs include apps smmu that implements arm,mmu-500, which is used to translate device-visible virtual addresses to physical addresses. Add compatible for these items. Co-developed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Will Deacon <will@kernel.org>
2025-11-03dt-bindings: gpu: mali-valhall-csf: add mediatek,mt8196-mali variantNicolas Frattaroli
The Mali-based GPU on the MediaTek MT8196 SoC uses a separate MCU to control the power and frequency of the GPU. This is modelled as a power domain and clock provider. It lets us omit the OPP tables from the device tree, as those can now be enumerated at runtime from the MCU. Add the necessary schema logic to handle what this SoC expects in terms of clocks and power-domains. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Link: https://patch.msgid.link/20251017-mt8196-gpufreq-v8-1-98fc1cc566a1@collabora.com Signed-off-by: Liviu Dudau <liviu.dudau@arm.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-09 11:57:50 +0000