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2025-08-18dt-bindings: pinctrl: mediatek: mt8183: Allow gpio-line-namesJulien Massot
Add support for the 'gpio-line-names' property in the MT8183 pinctrl binding. This allows naming the GPIOs, which is already done in several device trees (e.g. mt8183-kukui-jacuzzi.dtsi, mt8183-kukui-kakadu.dtsi, mt8183-kukui-krane.dtsi), but was previously generating DT schema warnings. Signed-off-by: Julien Massot <julien.massot@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20250801-mtk-dtb-warnings-v1-7-6ba4e432427b@collabora.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-18dt-bindings: arm: sti: drop B2120 board supportRaphael Gallais-Pou
B2120 boards are internal boards which never were commercialised. Remove them from bindings. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-08-18dt-bindings: mmc: fsl,esdhc: Add explicit reference to mmc-controller-commonAlexander Stein
Even though it is referenced by mmc/mmc-controller.yaml it still raises the warning: esdhc@1560000 (fsl,ls1021a-esdhc): Unevaluated properties are not allowed ('bus-width' was unexpected) Adding an explicit reference fixes this. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250725060152.262094-1-alexander.stein@ew.tq-group.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-16dt-bindings: iio: Replace bouncing Analog emailsKrzysztof Kozlowski
Emails to stefan.popa@analog.com and alexandru.tachici@analog.com bounce permanently: Remote Server returned '550 5.1.10 RESOLVER.ADR.RecipientNotFound; Recipient not found by SMTP address lookup' so replace them with Marcelo Schmitt and Nuno Sá (listed alphabetically by first name) from Analog where appropriate. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Link: https://patch.msgid.link/20250812132445.75398-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: ad7476: Add ROHM bd79105Matti Vaittinen
The ROHM BD79105 is a simple, 16-bit, 1-channel ADC with a 'CONVSTART' pin used to start the ADC conversion. Other than the 'CONVSTART', there are 3 supply pins (one used as a reference), analog inputs, ground and communication pins. It's worth noting that the pin somewhat confusingly labeled as 'DIN', is a pin which should be used as a chip-select. The IC does not have any writable registers. The device is designed so that the output pin can, in addition to outputting the data, be used as a 'data-ready'-IRQ. There are cases where the IRQ can't be used (because it is delivered via SPI data-line). Hence, some systems may use a GPIO for polling the data readiness. Add a compatible for the bd79105 and add the data-ready GPIO to the binding. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/3f70f68665225be3091f8a0412e74037b6a2a88e.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: ad7476: Drop redundant prop: trueMatti Vaittinen
The ad7476 supports a few variants with different power-supplies and control GPIOs. The binding first unconditionally introduces all the properties, and later sets them 'true' or 'false' based on the combatible. The 'true' seems to be implied by the initial property introduction so the 'true' -branches in later conditional handling (based on the compatible) can be omitted. Drop the redundant true -branches. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/bee66444bf628ba9a34a02738a1842e2abc14290.1754901948.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: light: veml6046x00: add color sensorAndreas Klinger
Add a new compatible for Vishay high accuracy RGBIR color sensor veml6046x00. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Andreas Klinger <ak@it-klinger.de> Link: https://patch.msgid.link/20250728075447.338725-2-ak@it-klinger.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: pressure: add invensense,icp10100Rodrigo Gobbi
There is no txt file for it, add yaml for invensense,icp10100 which is already used in the driver. Also, document other compatibles for ICP-101xx family and add invensense,icp10100 as a fallback. Acked-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@tdk.com> Signed-off-by: Rodrigo Gobbi <rodrigo.gobbi.7@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250801221424.132305-1-rodrigo.gobbi.7@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: light: Simplify interrupts property in the exampleKrzysztof Kozlowski
dynaimage,al3010 and dynaimage,al3320a are I2C devices, so their interrupts are not routed to GIC and rarely first interrupt cell is <0>. This looks like copy-paste from some SoC block, so drop it and also for readability use known defines instead of hard-coding interrupt flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-8-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: samsung,exynos-adc: Use correct IRQ level in exampleKrzysztof Kozlowski
The interrupt line to GIC is IRQ_TYPE_LEVEL_HIGH, so use that instead of "none". Also replace the hard-coded GIC_SPI flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-7-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: Replace hard-coded GPIO/IRQ flag with a defineKrzysztof Kozlowski
For readability use known defines instead of hard-coding GPIO or interrupt flag. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Link: https://patch.msgid.link/20250724111345.47889-6-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: Drop unused header includes in examplesKrzysztof Kozlowski
Drop includes of headers which example code does not use. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Heidelberg <david@ixit.cz> Acked-by: Matti Vaittinen <mazziesaccount@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250724111345.47889-5-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-16dt-bindings: iio: adc: rockchip-saradc: Allow use of a power-domainJonas Karlman
The SARADC controller in most Rockchip SoCs are part of power domains that are always powered on, i.e. PD_BUS or PD_PERI. These always powered on power domains have typically not been described in the device tree. Because these power domains have been left out of the device tree there has not been any real need to properly describe the power domain of the SARADC controller. On RK3528 the SARADC controller is part of the PD_VPU power domain. Add support to describe an optional power-domains for the SARADC controller in Rockchip SoCs. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250723085654.2273324-4-jonas@kwiboo.se Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-15dt-bindings: powerpc: Drop duplicate fsl/mpic.txtRob Herring (Arm)
The chrp,open-pic binding schema already supports the "fsl,mpic" compatible. Add a couple of missing properties and support for 4 "#interrupt-cells" to the chrp,open-pic binding, so fsl/mpic.txt can be removed. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250814135157.2747346-2-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-15dt-bindings: perf: Convert apm,xgene-pmu to DT schemaRob Herring (Arm)
Convert the Applied Micro X-Gene PMU binding to DT schema format. It is a straightforward conversion. Link: https://lore.kernel.org/r/20250812181422.68286-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-15dt-bindings: arm: Convert marvell,berlin to DT schemaRob Herring (Arm)
Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Link: https://lore.kernel.org/r/20250806212733.1633662-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-15dt-bindings: arm: cpus: Add edac-enabled propertySascha Hauer
Some ARM Cortex CPUs including A72 have Error Detection And Correction (EDAC) support on their L1 and L2 caches. That functionality is in implementation defined registers, so using it is not safe in virtualized environments or when EL3 already uses these registers. Add a edac-enabled flag which can be explicitly set when EDAC can be used. [ bp: Massage commit message. ] Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Vijay Balakrishna <vijayb@linux.microsoft.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/1752714390-27389-3-git-send-email-vijayb@linux.microsoft.com
2025-08-14scsi: ufs: qcom: dt-bindings: Split SM8650 and similarKrzysztof Kozlowski
The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SM8650 and SM8750 UFS controllers which: 1. Do not reference ICE as IO address space, but as phandle, 2. Have same order of clocks. 3. Have MCQ I/O address space. Document that MCQ address space as optional to maintain backwards compatibility and because Linux drivers can operate perfectly fine without it (thus without MCQ feature). Linux driver already uses "mcq" as possible name for "reg-names" property. The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-3-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <mani@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-14scsi: ufs: qcom: dt-bindings: Split SC7180 and similarKrzysztof Kozlowski
The binding for Qualcomm SoC UFS controllers grew and it will grow further. Split SC7180 and several other devices which: 1. Do not reference ICE as I/O address space, but as a phandle, 2. Have same order of clocks (SC7180 has one clock less than SC7280 and other variants in split binding). The split allows easier review and maintenance of the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-2-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-14scsi: ufs: qcom: dt-bindings: Split common part to qcom,ufs-common.yamlKrzysztof Kozlowski
The binding for Qualcomm SoC UFS controllers grew and it will grow further. It already includes several conditionals, partially for difference in handling encryption block (ICE, either as phandle or as I/O address space) but it will further grow for MCQ. Prepare for splitting this one big binding into several ones for common group of devices by defining common part for all Qualcomm UFS schemas. This only moves code, no functional impact expected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250731-dt-bindings-ufs-qcom-v2-1-53bb634bf95a@linaro.org Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-08-15dt-bindings: riscv: spacemit: Add OrangePi RV2 boardHendrik Hamerlinck
Document the compatible string for the OrangePi RV2 board [1]. The board is described as using the Ky X1 SoC, which, based on available downstream sources and testing, appears to be identical or very closely related to the SpacemiT K1 SoC [2]. Link: http://www.orangepi.org/html/hardWare/computerAndMicrocontrollers/details/Orange-Pi-RV2.html [1] Link: https://www.spacemit.com/en/key-stone-k1 [2] Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be> Reviewed-by: Yixun Lan <dlan@gentoo.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250813092240.180333-2-hendrik.hamerlinck@hammernet.be Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-15dt-bindings: interconnect: document the RPMh Network-On-Chip interconnect in ↵Raviteja Laggyshetty
Glymur SoC Document the RPMh Network-On-Chip Interconnect in Glymur platform. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250814-glymur-icc-v2-1-596cca6b6015@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-08-14Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.17-rc2). No conflicts. Adjacent changes: drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c d7a276a5768f ("net: stmmac: rk: convert to suspend()/resume() methods") de1e963ad064 ("net: stmmac: rk: put the PHY clock on remove") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-14dt-bindings: interrupt-controller: Convert hisilicon,mbigen-v2 to DT schemaRob Herring (Arm)
Convert the HiSilicon MBIGEN binding to DT schema format. It's a straight-forward conversion. Link: https://lore.kernel.org/r/20250812203327.730393-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: arm/cpus: Add missing Applied Micro CPU compatiblesRob Herring (Arm)
"apm,potenza" and "apm,strega" CPU compatibles have been in use for some time. Link: https://lore.kernel.org/r/20250812181428.69490-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14Merge tag 'net-6.17-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from Netfilter and IPsec. Current release - regressions: - netfilter: nft_set_pipapo: - don't return bogus extension pointer - fix null deref for empty set Current release - new code bugs: - core: prevent deadlocks when enabling NAPIs with mixed kthread config - eth: netdevsim: Fix wild pointer access in nsim_queue_free(). Previous releases - regressions: - page_pool: allow enabling recycling late, fix false positive warning - sched: ets: use old 'nbands' while purging unused classes - xfrm: - restore GSO for SW crypto - bring back device check in validate_xmit_xfrm - tls: handle data disappearing from under the TLS ULP - ptp: prevent possible ABBA deadlock in ptp_clock_freerun() - eth: - bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE - hv_netvsc: fix panic during namespace deletion with VF Previous releases - always broken: - netfilter: fix refcount leak on table dump - vsock: do not allow binding to VMADDR_PORT_ANY - sctp: linearize cloned gso packets in sctp_rcv - eth: - hibmcge: fix the division by zero issue - microchip: fix KSZ8863 reset problem" * tag 'net-6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (54 commits) net: usb: asix_devices: add phy_mask for ax88772 mdio bus net: kcm: Fix race condition in kcm_unattach() selftests: net/forwarding: test purge of active DWRR classes net/sched: ets: use old 'nbands' while purging unused classes bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE netdevsim: Fix wild pointer access in nsim_queue_free(). net: mctp: Fix bad kfree_skb in bind lookup test netfilter: nf_tables: reject duplicate device on updates ipvs: Fix estimator kthreads preferred affinity netfilter: nft_set_pipapo: fix null deref for empty set selftests: tls: test TCP stealing data from under the TLS socket tls: handle data disappearing from under the TLS ULP ptp: prevent possible ABBA deadlock in ptp_clock_freerun() ixgbe: prevent from unwanted interface name changes devlink: let driver opt out of automatic phys_port_name generation net: prevent deadlocks when enabling NAPIs with mixed kthread config net: update NAPI threaded config even for disabled NAPIs selftests: drv-net: don't assume device has only 2 queues docs: Fix name for net.ipv4.udp_child_hash_entries riscv: dts: thead: Add APB clocks for TH1520 GMACs ...
2025-08-14dt-bindings: arm: Drop obsolete cavium-thunder2.txtRob Herring (Arm)
The binding is already converted to schema and is located in Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml. Link: https://lore.kernel.org/r/20250806212812.1634740-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: arm: Convert cavium,thunder-88xx to DT schemaRob Herring (Arm)
Convert Cavium Thunder-88xx boards to DT schema format. There's not any defined board compatibles in this case. Link: https://lore.kernel.org/r/20250806212741.1633917-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: display: Drop duplicate ti,opa362 bindingRob Herring (Arm)
The "ti,opa362" binding is already supported in simple-bridge.yaml, so remove the old binding doc. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://lore.kernel.org/r/20250807214508.4174167-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: reset: add compatible for bcm63xx ephy controlKyle Hendry
Add compatible string for bcm63xx ephy control. Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250715234605.36216-3-kylehendrydev@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-08-14dt-bindings: serial: 8250: allow "main" and "uart" as clock namesAlex Elder
There are two compatible strings defined in "8250.yaml" that require two clocks to be specified, along with their names: - "spacemit,k1-uart", used in "spacemit/k1.dtsi" - "nxp,lpc1850-uart", used in "lpc/lpc18xx.dtsi" When only one clock is used, the name is not required. However there are two places that do specify a name: - In "mediatek/mt7623.dtsi", the clock for the "mediatek,mtk-btif" compatible serial device is named "main" - In "qca/ar9132.dtsi", the clock for the "ns8250" compatible serial device is named "uart" In commit d2db0d7815444 ("dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart"), Frank Li added the restriction that two named clocks be used for the NXP platform mentioned above. Change that logic, so that an additional condition for (only) the SpacemiT platform similarly restricts the two clocks to have the names "core" and "bus". Finally, add "main" and "uart" as allowed names when a single clock is specified. Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507160314.wrC51lXX-lkp@intel.com/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813031338.2328392-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: 8250: move a constraintAlex Elder
A block that required a "spacemit,k1-uart" compatible node to specify two clocks was placed in the wrong spot in the binding. Conor Dooley pointed out it belongs earlier in the file, as part of the initial "allOf". Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: Conor Dooley <conor@kernel.org> Closes: https://lore.kernel.org/lkml/20250729-reshuffle-contented-e6def76b540b@spud/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813032151.2330616-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: brcm,bcm7271-uart: Constrain clocksKrzysztof Kozlowski
Lists should have fixed constraints, because binding must be specific in respect to hardware, thus add missing constraints to number of clocks. Cc: stable <stable@kernel.org> Fixes: 88a499cd70d4 ("dt-bindings: Add support for the Broadcom UART driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250812121630.67072-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: clock: adi,axi-clkgen: add clock-output-names propertyDavid Lechner
Add an optional `clock-output-names` property to the ADI AXI Clock Generator binding. This is already being used in the Linux driver and real-world dtbs, so we should document it to allow for correct binding validation. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20250811-dt-bindings-clk-axi-clkgen-add-clock-output-names-property-v1-1-f02727736aa7@baylibre.com Reviewed-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Remove unused fujitsu,mb86s70-crg11 bindingRob Herring (Arm)
The fujitsu,mb86s70-crg11 binding is unused. The driver for it was removed in 2017. It's not used for Synquacer DT either like some other mb86s70 bindings are. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804175304.3423965-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si570 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI570 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222010.4082782-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si5341 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI5341 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222034.4083410-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si514/544 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI514 and SI544 bindings to DT schema format. Combine the bindings into a single schema as they are the same. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222042.4083656-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: usb: Drop duplicate nvidia,tegra20-ehci.txtRob Herring (Arm)
The nvidia,tegra20-ehci binding is already documented in ci-hdrc-usb2.yaml, so drop the old text binding. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250807214351.4172243-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: usb: renesas,usbhs: Add RZ/T2H and RZ/N2H supportLad Prabhakar
Document the USBHS controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. While the USBHS block is similar to the one found on the RZ/G2L SoC, it differs slightly in terms of interrupt configuration, clock/reset requirements, and register bit definitions. Due to these differences, a new compatible string `renesas,usbhs-r9a09g077` is introduced for the RZ/T2H SoC. The USBHS controller on the RZ/N2H (r9a09g087) SoC is identical to that on the RZ/T2H, so it uses the `renesas,usbhs-r9a09g077` compatible string as a fallback. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250805114730.2491238-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: arm: Convert ti,keystone to DT schemaRob Herring (Arm)
Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20250806212824.1635084-1-robh@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2025-08-13regulator: dt-bindings: Add Richtek RT5133 SupportJeff Chang
Add bindings for Richtek RT5133 IC Controlled PMIC Signed-off-by: Jeff Chang <jeff_chang@richtek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250813020910.2977555-1-jeff_chang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-13dt-bindings: memory: Update brcmstb-memc-ddr binding with older chipsFlorian Fainelli
The older MIPS-based chips incorporated a memory controller with the revision A.0.0, update the binding to list that compatible. Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250729205213.3392481-2-florian.fainelli@broadcom.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for PMIV0104Luca Weiss
Add a dt-bindings compatible string for the Qualcomm's PMIV0104 PMIC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-3-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Document qcom,tune-res-fsdifLuca Weiss
Document the FS Differential TX Output Resistance Tuning value found on the eUSB2 repeater on Qualcomm PMICs. The tuning values have special meanings, being different offsets of the resistance to the default value in Ohms but the exact meaning is not relevant here, as the correct tuning is determined by hardware engineers to make sure the electrical properties are as expected. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-1-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variantYao Zi
Rockchip RK3528 ships one naneng-combphy which operates in either PCIe or USB 3 mode. Document its compatible string. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250728102947.38984-5-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add power-domains propertyYao Zi
Though isn't described in existing devicetrees, most Rockchip combphys belong to a specific power-domain of the SoC. Taking RK3588 as example, combphy 0 and combphy 2 belong to the PD_BUS domain. Document the power-domains property to allow describing the information correctly in devicetree. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: soc: rockchip: Add RK3528 pipe-phy GRF sysconYao Zi
Add compatible string for pipe-phy GRF found on RK3528 SoC, which controls misc settings for the integrated naneng-combphy. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250728102947.38984-3-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: net: airoha: npu: Add memory regions used for wlan offloadLorenzo Bianconi
Document memory regions used by Airoha EN7581 NPU for wlan traffic offloading. The brand new added memory regions do not introduce any backward compatibility issues since they will be used just to offload traffic to/from the MT76 wireless NIC and the MT76 probing will not fail if these memory regions are not provide, it will just disable offloading via the NPU module. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://patch.msgid.link/20250811-airoha-en7581-wlan-offlaod-v7-1-58823603bb4e@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-12ASoC: dt-bindings: Convert brcm,bcm2835-i2s to DT schemaRob Herring (Arm)
Convert the Broadcom BCM2835 I2S/PCM binding to DT schema format. It's a straightforward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250812203356.735234-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-12 17:13:53 +0000