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2025-06-17dt-bindings: sram: qcom,imem: Add the SM7150 compatibleDanila Tikhonov
Add compatible for SM7150 SoC IMEM. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-5-bf9a9081631d@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17dt-bindings: soc: qcom: aoss-qmp: Add the SM7150 compatibleDavid Wronek
Document the AOSS QMP compatible for SM7150. Signed-off-by: David Wronek <david@mainlining.org> Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-6-bf9a9081631d@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17dt-bindings: soc: qcom,dcc: Add the SM7150 compatibleDanila Tikhonov
Document DDC compatible for SM7150. Signed-off-by: Danila Tikhonov <danila@jiaxyga.com> Link: https://lore.kernel.org/r/20250422-sm7150-upstream-v1-12-bf9a9081631d@jiaxyga.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17dt-bindings: soc: qcom: add qcom,qcs615-imem compatibleLijuan Gao
Document qcom,qcs615-imem compatible. It has a child node for debugging purposes. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> Link: https://lore.kernel.org/r/20250526-add_qcs615_remoteproc_support-v4-2-06a7d8bed0b5@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17dt-bindings: HID: i2c-hid: elan: Introduce Elan eKTH8D18Chen-Yu Tsai
The Elan eKTH8D18 touchscreen controller is an I2C HID device with a longer boot-up time. Power sequence timing wise it is compatible with the eKTH6A12NAY, with a power-on delay of at least 5ms, 20ms out-of-reset for I2C ack response, and 150ms out-of-reset for I2C HID enumeration, both shorter than what the eKTH6A12NAY requires. Enumeration and subsequent operation follows the I2C HID standard. Add a compatible string for it with the ekth6a12nay one as a fallback. No enum was used as it is rare to actually add new entries. These chips are commonly completely backward compatible, and unless the power sequencing delays change, there is no real effort being made to keep track of new parts, which come out constantly. Also drop the constraints on the I2C address since it's not really part of the binding. Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20250617082004.1653492-2-wenst@chromium.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-06-17dt-bindings: PCI: pci-ep: Extend max-link-speed to PCIe Gen5/Gen6Hans Zhang
Update the PCI Endpoint (EP) device tree binding documentation to include PCIe Gen5 and Gen6 support for the `max-link-speed` property. Similar to the Host Controller binding, the original EP binding limited this value to 1~4 (Gen1~Gen4). With current SoCs requiring Gen5/Gen6 support (e.g., Synopsys/Cadence IP), this change aligns the EP binding with the kernel's PCIe 6.0 capabilities. Signed-off-by: Hans Zhang <18255117159@163.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250529021026.475861-3-18255117159@163.com
2025-06-17dt-bindings: PCI: qcom,pcie-sa8775p: Document QCS8300Ziyue Zhang
QCS8300 is derived from SA8775p. Hence, add the callback with SA8775p as the fallback. Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250529035635.4162149-3-quic_ziyuzhan@quicinc.com
2025-06-17dt-bindings: PCI: qcom,pcie-sm8150: Document QCS615Ziyue Zhang
QCS615 is derived from SM8150. Hence, add the callback with SM8150 as the fallback. Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com> [mani: commit message rewording] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250527072036.3599076-3-quic_ziyuzhan@quicinc.com
2025-06-17dt-bindings: remoteproc: qcom,sa8775p-pas: Correct the interrupt numberLijuan Gao
Correct the interrupt number of ready and handover in the DTS example. Fixes: af5da7b0944c ("dt-bindings: remoteproc: qcom,sa8775p-pas: Document the SA8775p ADSP, CDSP and GPDSP") Signed-off-by: Lijuan Gao <lijuan.gao@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250612-correct_interrupt_for_remoteproc-v1-1-490ee6d92a1b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17dt-bindings: gpio: gpio-xilinx: Mark clocks as required propertyMichal Simek
On Microblaze platforms there is no need to handle clocks because the system is starting with clocks enabled (can be described via fixed clock node or clock-frequency property or not described at all). With using soft IPs with SOC platforms there is mandatory to handle clocks as is explained in commit 60dbdc6e08d6 ("dt-bindings: net: emaclite: Add clock support"). That's why make clock as required in dt binding because it is present in both configurations and should be described even there is no way how to handle it on Microblaze systems. There is also need to describe missing axi gpio clock in fpga-region.yaml not to introduce new error when make dt_binding_check runs. Signed-off-by: Michal Simek <michal.simek@amd.com> Reviewed-by: Xu Yilun <yilun.xu@intel.com> # fpga Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/94151cfbcff5e4ae05894981c7e398b605d4b00a.1750059796.git.michal.simek@amd.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-06-17dt-bindings: dmaengine: Add dma multiplexer for CV18XX/SG200X series SoCInochi Amaoto
The DMA IP of Sophgo CV18XX/SG200X is based on a DW AXI CORE, with an additional channel remap register located in the top system control area. The DMA channel is exclusive to each core. In addition, the DMA multiplexer is a subdevice of system controller, so this binding only contains necessary properties for the multiplexer itself. Add the dmamux binding for CV18XX/SG200X series SoC. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250611081000.1187374-2-inochiama@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-16dt-bindings: clock: Add RaspberryPi RP1 clock bindingsAndrea della Porta
Add device tree bindings for the clock generator found in RP1 multi function device, and relative entries in MAINTAINERS file. Signed-off-by: Andrea della Porta <andrea.porta@suse.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20250529135052.28398-1-andrea.porta@suse.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-06-16media: dt-bindings: media: renesas,vsp1: Document RZ/V2N SoCLad Prabhakar
The VSPD block on the RZ/V2N SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,r9a07g044-vsp2` will be used as a fallback compatible string on the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250530154148.374663-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-06-16media: dt-bindings: media: renesas,fcp: Document RZ/V2N SoCLad Prabhakar
The FCPVD block on the RZ/V2N SoC is identical to the one found on the RZ/G2L SoC. No driver changes are required, as `renesas,fcpv` will be used as a fallback compatible string on the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250530154148.374663-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-06-15dt-bindings: phy: Add the M31 based eUSB2 PHY bindingsWesley Cheng
On SM8750, the M31 eUSB2 PHY is being used to support USB2. Add the binding definition for the PHY driver. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-2-d58de3b41d34@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Add SM8750 to QMP PHYWesley Cheng
Add an entry to the compatible field for SM8750 for the QMP combo PHY. This handles the USB3 path for SM8750. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250527-sm8750_usb_master-v6-1-d58de3b41d34@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: renesas,usb2-phy: Document RZ/V2N SoC supportLad Prabhakar
Document support for the USB2.0 phy found on the Renesas RZ/V2N (R9A09G056) SoC. The USB2.0 phy is functionally identical to that on the RZ/V2H(P) SoC, so no driver changes are needed. The existing `renesas,usb2-phy-r9a09g057` compatible will be used as a fallback for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20250528133858.168582-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert Marvell MVEBU PHYs to DT schemaRob Herring (Arm)
Convert the Marvell Armada-375 USB and MVEBU SATA PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250607212609.743346-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert marvell,armada-380-comphy to DT schemaRob Herring (Arm)
Convert the Marvell Armada 38x combo PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://lore.kernel.org/r/20250607212541.742427-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert ti,keystone-usbphy to DT schemaRob Herring (Arm)
Convert the TI Keystone USB PHY binding to DT schema format. Drop the "#address-cells" and "#size-cells" properties which don't make sense without any child nodes. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212641.744683-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert ti,dm816x-usb-phy to DT schemaRob Herring (Arm)
Convert the TI DM816x USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212634.744373-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert st,spear1310-miphy to DT schemaRob Herring (Arm)
Convert the ST SPEAr MIPHY PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212629.744191-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert qca,ar7100-usb-phy to DT schemaRob Herring (Arm)
Convert the Qualcomm-Atheros AR7100 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212625.744008-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert motorola,mapphone-mdm6600 to DT schemaRob Herring (Arm)
Convert the Motorola Mapphone MDM6600 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212621.743859-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert motorola,cpcap-usb-phy to DT schemaRob Herring (Arm)
Convert the Motorola CPCAP PMIC USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212616.743674-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert marvell,mmp2-usb-phy to DT schemaRob Herring (Arm)
Convert the Marvell MMP2 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212613.743515-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert marvell,comphy-cp110 to DT schemaRob Herring (Arm)
Convert the Marvell CP110 combo PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212605.743176-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert marvell,berlin2-usb-phy to DT schemaRob Herring (Arm)
Convert the Marvell Berlin2 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212554.742884-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert marvell,berlin2-sata-phy to DT schemaRob Herring (Arm)
Convert the Marvell Berlin2 SATA PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212545.742617-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert lantiq,ase-usb2-phy to DT schemaRob Herring (Arm)
Convert the Lantiq XWAY USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212537.742287-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert img,pistachio-usb-phy to DT schemaRob Herring (Arm)
Convert the Imagination Pistachio USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212531.742082-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,inno-usb2-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon INNO USB2 PHY binding to DT schema format. It's a straight forward conversion. Add the undocumented "hisilicon,hi3798mv100-usb2-phy" compatible. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212527.741915-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,hi6220-usb-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon HI6220 USB PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212524.741770-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert hisilicon,hix5hd2-sata-phy to DT schemaRob Herring (Arm)
Convert the HiSilicon HIX5HD2 SATA PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212520.741588-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert brcm,sr-pcie-phy to DT schemaRob Herring (Arm)
Convert the Broadcom Stingray PCIe PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212508.741193-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert brcm,ns2-drd-phy to DT schemaRob Herring (Arm)
Convert the Broadcom NS2 USB2 PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212456.740697-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: Convert apm,xgene-phy to DT schemaRob Herring (Arm)
Convert the APM X-Gene PHY binding to DT schema format. It's a straight forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250607212424.739972-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-15dt-bindings: phy: samsung,mipi-video-phy: document exynos7870 MIPI phyKaustabh Chakraborty
The Exynos7870 MIPI PHY device contains one DSIM PHY block and three CSIS PHY blocks. It also requires two sysregs, one for display, and the other for cameras. Document this device. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250612-exynos7870-mipi-phy-v1-1-3fff0b62d9d3@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-14dt-bindings: phy: samsung,usb3-drd-phy: Add exynos990 compatibleIgor Belwon
Add a compatible for the exynos990-usbdrd-phy. The PHY is compatible with the older exynos5420 design (two clocks) when running in highspeed mode. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20250515-usb-resends-may-15-v3-1-ad33a85b6cee@mentallysanemainliners.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-06-13dt-bindings: pci: Add Sophgo SG2044 PCIe hostInochi Amaoto
The PCIe controller on the SG2044 is Designware based with custom app registers. Add binding document for SG2044 PCIe host controller. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250504004420.202685-2-inochiama@gmail.com
2025-06-12dt-bindings: net: renesas-gbeth: Add support for RZ/G3E (R9A09G047) SoCJohn Madieu
Document support for the GBETH IP found on the Renesas RZ/G3E (R9A09G047) SoC. The GBETH block on RZ/G3E is equivalent in functionality to the GBETH found on RZ/V2H(P) (R9A09G057). Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250611061204.15393-1-john.madieu.xa@bp.renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-06-12dt-bindings: clock: exynosautov920: add hsi2 clock definitionsRaghav Sharma
Add device tree clock binding definitions for CMU_HSI2 Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250529112640.1646740-3-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12dt-bindings: clock: exynosautov920: sort clock definitionsRaghav Sharma
Sort all the clock compatible strings in alphabetical order Signed-off-by: Raghav Sharma <raghav.s@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250529112640.1646740-2-raghav.s@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12dt-bindings: arm: samsung: document g0s board bindingIvaylo Ivanov
Add binding for the Samsung Galaxy S22+ (SM-S906B) board, codenamed G0S, which is based on the Samsung Exynos2200 SoC. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250504145907.1728721-2-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-12ASoC: dt-bindings: mt8192-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-6-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8186-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-5-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8173-afe-pcm: Allow specifying reserved memory regionChen-Yu Tsai
It is desirable to reserve memory for the audio frontend. Allow the "memory-region" property, to be used to point to a reserved memory region. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-4-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: mt8173-afe-pcm: Add power domainChen-Yu Tsai
The audio subsystem sits under a controllable power domain. Add it to the binding. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-3-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-12ASoC: dt-bindings: Convert MT8173 AFE binding to dt-schemaChen-Yu Tsai
Convert the MT8173 AFE (audio frontend) binding from text to dt-schema in YAML. "clocks" is added to the list of required properties to match "clock-names". And the example was slightly fixed up in style. Otherwise everything is as before. A contributer and maintainer for a recently added MediaTek audio binding was chosen instead of the original submitter. Cc: Trevor Wu <trevor.wu@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20250612074901.4023253-2-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-06-11dt-bindings: arm: qcom: Add Sony Xperia Z Ultra (togari)Kevin Widjaja
Based on the msm8974. Signed-off-by: Kevin Widjaja <kevin.widjaja21@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Luca Weiss <luca@lucaweiss.eu> Link: https://lore.kernel.org/r/20250610-togari-v2-3-10e7b53b87c1@lucaweiss.eu Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-15 13:46:58 +0000