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2026-07-11dt-bindings: clock: qcom,sm8450-camcc: Drop qcom,sc8280xp-camcc from "if" blockKrzysztof Kozlowski
qcom,sc8280xp-camcc compatible was moved to own binding file in commit 842fa7482915 ("dt-bindings: clock: qcom,sm8450-camcc: Move sc8280xp camcc to sa8775p camcc"), so cleanup redundant entry in "if:then:" block. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260708-dt-bindings-camcc-required-opps-v1-1-ae0871774210@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11dt-bindings: clock: Replace bouncing emailsKrzysztof Kozlowski
Replace permanently bouncing email addresses (550 5.1.1 Recipient address rejected) of Adam Skladowski, Chanho Park, Anusha Rao and Sireesh Kodali. There are no new messages from them via other email addresses, so drop them permanently. Add Alim Akhtar to Samsung ExynosAutov9 SoC clocks, because he looks at other Samsung clock hardware and drivers. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623073050.36262-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-11Merge branch '20260624-glymur_camcc-v5-1-a321df74b1a1@oss.qualcomm.com' into ↵Bjorn Andersson
clk-for-7.3 Merge Glymur camera clock controller binding through topic branch, to allow sharing constants with DeviceTree branches.
2026-07-11dt-bindings: clock: qcom: Add Glymur camera clock controllerJagadeesh Kona
Add device tree bindings for the camera clock controller on Qualcomm Glymur SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260624-glymur_camcc-v5-1-a321df74b1a1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-10dt-bindings: pinctrl: apple,pinctrl: Add t6030 and t6031 compatiblesJanne Grunau
The pin controller on Apple silicon M3 Pro, Max and Ultra SoCs is compatible with the t8103 (M1) one. Add "apple,t6030-pinctrl" for M3 Pro and "apple,t6031-pinctrl" for M3 Max and Ultra as per-SoC compatibles. Signed-off-by: Janne Grunau <j@jannau.net> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-10dt-bindings: usb: generic-ohci: Document clock-names in top-levelKrzysztof Kozlowski
Convention is to always have properties defined in top-level part of the binding and then customized (narrowed per variant) in "if:then:" blocks. The clock-names were mentioned only in such "if:then:" block for atmel,at91rm9200-ohci, thus add the top-level part and disallow usage of clock-names for other devices. This has no practical impact as clock-names are not used by other variants, except in hisilicon/hi3798cv200.dtsi, but that SoC has it undocumented. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260625091744.109467-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-10dt-bindings: usb: generic-ehci: Document clock-names in top-levelKrzysztof Kozlowski
Convention is to always have properties defined in top-level part of the binding and then customized (narrowed per variant) in "if:then:" blocks. The clock-names were mentioned only in such "if:then:" block for atmel,at91sam9g45-ehci, thus add the top-level part and disallow usage of clock-names for other devices. This has no practical impact as clock-names are not used by other variants, except in hisilicon/hi3798cv200.dtsi, but that SoC has it undocumented. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260625091744.109467-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-10dt-bindings: usb: mtu3: add support mt8196Chunfeng Yun
There are three USB controllers on mt8196, each controller's wakeup control is different, add some specific versions for them, and add compatilbe for mt8196. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://patch.msgid.link/20260413121727.4702-1-chunfeng.yun@mediatek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-10dt-bindings: usb: qcom,snps-dwc3: Add ipq5210 to USB DWC3Varadarajan Narayanan
IPQ5210 includes a Qualcomm DWC3 USB controller supported by the existing binding. Add its compatible string to the schema and include it in the matching conditional constraints. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260604090528.735236-1-varadarajan.narayanan@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-09dt-bindings: soc: qcom: qcom,pmic-glink: Add Maili compatible stringFenglin Wu
Maili is a mobile platform that is compatible with Hawi and Kaanapali platform with respect to pmic-glink support. Add Maili compatible string with Kaanapali as a fallback. Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260610-maili-pmic-glink-v1-1-a6ba02d6deba@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-09dt-bindings: samsung: exynos-pmu: Narrow allowed reboot modesKrzysztof Kozlowski
syscon-reboot-mode schema allows arbitrary "mode-.* properties but only a subset actually makes sense and is valid. Provide negative look-ahead pattern to disallow any modes not supported by the device, which tightens the binding. Most of Android-based Exynos devices share the bootloader or its parts, thus reboot modes are most likely the same, however only a few upstream DTS define them, so add restrictions only for these. Google GS101 has on the other hand quite different bootloader with many known reboot modes. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260701105731.196618-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-07-09dt-bindings: samsung: exynos-pmu: Restrict children with unevaluatedPropertiesKrzysztof Kozlowski
Each schema for a child node should end with either additionalProperties or unevaluatedProperties, so add missing one making the schema tighter. Defining 'type: object' is on the other hand not necessary when other schema is referenced. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260701105731.196618-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-07-09MAINTAINERS: Update my email address for the AW99706 backlight driverJunjie Cao
Switch my maintainer entry for the Awinic AW99706 WLED backlight driver from my personal Gmail address to junjie.cao@linux.dev. Update both MAINTAINERS and the device-tree binding maintainers field. Signed-off-by: Junjie Cao <junjie.cao@linux.dev> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260706073307.1038430-1-junjie.cao@linux.dev Signed-off-by: Lee Jones <lee@kernel.org>
2026-07-08ASoC: dt-bindings: dmic-codec: Add audio-graph port supportChancel Liu
Add port property referencing audio-graph-port.yaml to allow DMIC to be used with audio-graph-card and audio-graph-card2. Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Link: https://patch.msgid.link/20260707065725.312450-4-chancel.liu@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-08ASoC: dt-bindings: fsl,micfil: Add audio-graph port supportChancel Liu
Add port property referencing audio-graph-port.yaml to allow MICFIL to be used with audio-graph-card and audio-graph-card2. Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Link: https://patch.msgid.link/20260707065725.312450-3-chancel.liu@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-08ASoC: dt-bindings: wlf,wm8524: Add audio-graph port supportChancel Liu
Add port property referencing audio-graph-port.yaml to allow WM8524 to be used with audio-graph-card and audio-graph-card2. Signed-off-by: Chancel Liu <chancel.liu@nxp.com> Link: https://patch.msgid.link/20260707065725.312450-2-chancel.liu@oss.nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-08MAINTAINERS: replace maintainer for Altera mSGDMA driverAdrian Ng Ho Yin
Olivier Dautricourt has stepped down as maintainer of the Altera msgDMA driver as he no longer has access to the hardware. Replace him with Adrian Ng Ho Yin as the new maintainer and update the status from "Odd Fixes" to "Maintained". Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/addaf51275355667045ec300fc8d725e2e273807.1782911845.git.adrian.ho.yin.ng@altera.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2026-07-08dt-bindings: usb: renesas,usbhs: Document RZ/G3L SoCBiju Das
The USBHS IP block on RZ/G3L SoC is identitcal to the one found on the RZ/G3S device. Document the RZ/G3L USBHS IP block. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260707145135.247565-2-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-08ASoC: dt-bindings: qcom,sm8250: Add Eliza sound cardRavi Hothi
Add bindings for Eliza sound card, which is compatible with the existing SM8450. Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260703073434.2589657-3-ravi.hothi@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-08ASoC: dt-bindings: qcom: Add Eliza LPASS macro codecsRavi Hothi
Add bindings for Qualcomm Eliza LPASS RX, TX, VA and WSA macro codecs, which are compatible with the existing SM8550 generation. Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Link: https://patch.msgid.link/20260703073434.2589657-2-ravi.hothi@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-08Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging to get updates from v7.2-rc2 into drm-misc-next. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2026-07-08dt-bindings: riscv: sort multi-letter Z extensions alphanumericallyGuodong Xu
The multi-letter extension enum is documented as being sorted alphanumerically (see the "multi-letter extensions, sorted alphanumerically" comment), but several Z entries have drifted out of order. Reorder the affected entries so the multi-letter Z list is sorted alphanumerically again. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Guodong Xu <docular.xu@gmail.com> Link: https://patch.msgid.link/20260701-rva23u64-hwprobe-v2-v5-1-2c61f94a695a@gmail.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
2026-07-07dt-bindings: arm: qcom: Add SM7325 Xiaomi 12 Lite 5G (taoyao)Stanislav Zaikin
Xiaomi 12 Lite 5G (xiaomi,taoyao) is a smartphone based on the SM7325 SoC. Signed-off-by: Stanislav Zaikin <zstaseg@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260608143329.252033-2-zstaseg@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07Merge branch ↵Bjorn Andersson
'20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com' into clk-for-7.3 Merge Shikra RPM and global clock controller bindings through topic branch, to allow constants to be made available to DeviceTree branches as well.
2026-07-07dt-bindings: clock: qcom: Add Qualcomm Shikra SoC Global Clock ControllerImran Shaik
Add device tree bindings for the global clock controller on Qualcomm Shikra SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: clock: qcom,rpmcc: Add Qualcomm Shikra SoC RPMCCImran Shaik
Add bindings documentation for RPM clock controller on Qualcomm Shikra SoC. The Qualcomm Shikra RPMCC has the clocks same as Agatti (QCM2290) RPMCC. Hence, add support to use the QCM2290 RPMCC compatible as fallback for Shikra RPMCC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608-shikra-gcc-rpmcc-clks-v5-1-94cefe092ee3@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: cache: qcom,llcc: Document Maili SoCJingyi Wang
Add documentation for the Last Level Cache Controller (LLCC) bindings for Qualcomm Maili SoC which is fully compatible with the one found on Qualcomm Hawi. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-maili-llcc-v2-1-dd24f05bc197@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: soc: qcom,aoss-qmp: Document the Maili AOSS side channelChunkai Deng
Document the Always-on Subsystem side channel on Qualcomm Maili SoC. Signed-off-by: Chunkai Deng <chunkai.deng@oss.qualcomm.com> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-maili-soc-binding-v2-3-21b5e9bd1aa5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: sram: Document qcom,maili-imem compatibleJingyi Wang
On Qualcomm Maili platform, IMEM is a block of SRAM shared across multiple IP blocks which can fall back to "mmio-sram". Document its compatible. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-maili-soc-binding-v2-2-21b5e9bd1aa5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: firmware: qcom,scm: Document SCM on Maili SOCJingyi Wang
Document SCM compatible for the Qualcomm Maili SoC. Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260604-maili-soc-binding-v2-1-21b5e9bd1aa5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: arm: qcom: Add Motorola Moto G2 (2014)David Wales
Document the Motorola Moto G2 (2014), which is a smartphone based on the Qualcomm MSM8226 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: David Wales <daviewales@disroot.org> Link: https://lore.kernel.org/r/20260605-device-motorola-titan-mainline-v4-1-08a7be31f05c@disroot.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07dt-bindings: rockchip: grf: Narrow allowed reboot modesKrzysztof Kozlowski
syscon-reboot-mode schema allows arbitrary "mode-.* properties but only a subset actually makes sense and is valid. Provide negative look-ahead pattern to disallow any modes not supported by the device, which tightens the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260701105849.197086-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-07dt-bindings: rockchip: pmu: Narrow definition of reboot-modeKrzysztof Kozlowski
The 'reboot-mode' child of PMU node must be a syscon-reboot-mode one, so add missing $ref to enforce the validation and disallow other reboot-mode handlers. Defining 'type: object' is on the other hand not necessary when other schema is referenced. This can be further restricted to match hardware/firmware: syscon-reboot-mode schema allows arbitrary "mode-.* properties but only a subset actually makes sense and is valid. Provide negative look-ahead pattern to disallow any modes not supported by the device, which tightens the binding. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260701105849.197086-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-07dt-bindings: serial: maxim,max310x: describe per-channel rs485 subnodesTapio Reijonen
The MAX310x is a family of one- (max3107, max3108), two- (max3109) and four-channel (max14830) UARTs. The binding pulls in /schemas/serial/rs485.yaml at the chip level, describing a single set of RS-485 properties - enough for the single-channel parts, but a multi-channel chip can wire RS-485 differently on each channel. Split the binding per compatible: - single-channel parts (max3107, max3108): the chip node is itself the serial port and carries the RS-485 properties, as before; - multi-channel parts (max3109, max14830): the chip node is only a container and is no longer a serial node; each channel is a "serial@N" subnode that carries the standard serial.yaml/rs485.yaml properties (and may host a serial slave device). max3109 has channels 0-1, max14830 has 0-3. This avoids a chip node that is simultaneously a serial node and the parent of serial nodes. The driver still reads chip-level RS-485 for single-channel and legacy device trees, so existing users are unaffected. Signed-off-by: Tapio Reijonen <tapio.reijonen@vaisala.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260615-b4-max310x-rs485-dt-v3-2-7e79f064bdd7@vaisala.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-07dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip ↵Raviteja Laggyshetty
interconnect in Maili SoC Document the RPMh Network-On-Chip interconnect for the Qualcomm Maili SoC. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260622-maili_icc-v2-1-18b5ac08c04f@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm ↵Raviteja Laggyshetty
Shikra SoC Document the EPSS L3 interconnect provider binding for Qualcomm Shikra SoC. The Shikra EPSS L3 block is similar to existing Qualcomm EPSS/OSM L3 providers, but supports only up to 12 frequency lookup table entries. Co-developed-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Odelu Kukatla <odelu.kukatla@oss.qualcomm.com> Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260603-shikra_epss_l3-v3-1-3c2e0b796e78@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07Merge branch 'icc-x1e80100' into icc-nextGeorgi Djakov
This series enables QoS configuration for QNOC type device which can be found on X1E80100 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-x1e80100 dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS interconnect: qcom: x1e80100: enable QoS configuration Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-0-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoSRaviteja Laggyshetty
Some interconnect nodes on X1E80100 have QoS registers located inside a block whose interface is clock-gated. For those nodes, driver must enable the corresponding clock(s) before accessing the registers. Add the 'clocks' property so the driver can obtain and enable the required clock(s). Only interconnects that have clock-gated QoS register interface use this property; it is not applicable to all interconnect nodes. Signed-off-by: Raviteja Laggyshetty <raviteja.laggyshetty@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-1-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07dt-bindings: bus: Convert DA8XX MSTPRI to DT schemaEduard Bostina
Convert the Texas Instruments DA8XX Master Peripheral Priority Registers bindings to DT schema. Documentation: OMAP-L138 (DA850) http://www.ti.com/lit/ug/spruh82c/spruh82c.pdf Signed-off-by: Eduard Bostina <egbostina@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260630124631.2991596-1-egbostina@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-07-07dt-bindings: interconnect: qcom,sc8280xp-rpmh: Add reg and clocks for QoSXilin Wu
Add the register range and clock properties needed for programming NoC QoS configuration on SC8280XP. Require a register range for the real NoC providers, require QoS clocks for aggre1_noc and aggre2_noc, and keep the virtual clk_virt and mc_virt providers without MMIO resources or clocks. Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260507-sc8280xp-qos-v1-1-15135858cd98@radxa.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2026-07-07dt-bindings: PCI: qcom: Document Hawi and Maili PCIe ControllersMatthew Leung
Add a dedicated schema for the PCIe controllers found on the Hawi and Maili platforms. Signed-off-by: Matthew Leung <matthew.leung@oss.qualcomm.com> [mani: added MAINTAINERS entry and squashed the Maili patch] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260625-hawi-pcie-v4-1-1a578603cd86@oss.qualcomm.com
2026-07-06dt-bindings: clock: qcom: Add Hawi video clock controllerLin Li
Add device tree bindings for the video clock controller on Qualcomm Hawi SoC. Signed-off-by: Lin Li <zhuolin.li@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702-hawi-videocc-v1-1-6c1e640b0954@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-06Merge branch '20260617-evacc_glymur-v2-2-905108dacaaa@oss.qualcomm.com' into ↵Bjorn Andersson
arm64-for-7.3 Merge the Glymur EVA clock controller binding from topic branch, to gain access to the clock defines.
2026-07-06dt-bindings: clock: qcom: Add EVA clock and reset controller for Glymur SoCTaniya Das
Add the device tree bindings for the enhanced video analytics(EVA) clock controller which is required on Qualcomm Glymur SoC. The controller provides clocks, resets and power domains for the EVA subsystem. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-2-905108dacaaa@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-07Merge tag 'drm-misc-next-2026-07-02' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next drm-misc-next for 7.3: UAPI Changes: Cross-subsystem Changes: Core Changes: - bridge: Add atomic_create_state callback and helpers, drop atomic_reset - dp: Add support for DSC max delta BPP - edid: Parse panel type from DisplayID 2.x Display Parameters - sysfb: Improve panel, stride and framebuffer size validation Driver Changes: - hibmc: Improvements to the plane formats handling, switch to gem-shmem - nouveau: race fixes, misc improvements - bridges: - Convert all bridges to atomic_create_state - panels: - panel-edp: New quirks for BOE NE160QDM-NY1, MB116AS01 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patch.msgid.link/20260702-powerful-successful-raptor-eded34@houat
2026-07-06regulator: qcom_usb_vbus: add pm4125 VBUS regulator supportMark Brown
Rakesh Kota <rakesh.kota@oss.qualcomm.com> says: Add support for PM4125 USB VBUS regulator. Unlike PM8150B which uses a current-limit selector, PM4125 uses a 2-bit VBOOST voltage selector supporting 4.25 V, 4.5 V, 4.75 V and 5.0 V output. Link: https://patch.msgid.link/20260706-add_pm4125-vbus-reg-v3-0-999d78a87b81@oss.qualcomm.com
2026-07-06regulator: dt-bindings: qcom,usb-vbus-regulator: add qcom,pm4125-vbus-regRakesh Kota
The pm4125 PMIC uses a different USB VBUS register layout than pm8150b. It uses a 2-bit VBOOST voltage selector supporting output voltages of 4.25 V, 4.5 V, 4.75 V and 5.0 V, instead of a current-limit selector. Move qcom,pm4125-vbus-reg from the pm8150b fallback items list into the standalone enum since the driver handles it with its own match-data and register layout. Make regulator-min/max-microamp conditional so they are only required for current-limit variants (pm8150b, pm6150, pm7250b, pmi632). Add an if/then condition for qcom,pm4125-vbus-reg requiring regulator-min/ max-microvolt instead, and update the pm4125 example accordingly. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Rakesh Kota <rakesh.kota@oss.qualcomm.com> Link: https://patch.msgid.link/20260706-add_pm4125-vbus-reg-v3-1-999d78a87b81@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-07dt-bindings: arm: sunxi: Add NetCube Systems OpenNMC (dobermann)Lukas Schmid
The OpenNMC is an open replacement for APC SmartSlot management cards based on the Nagami System-on-Module. Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260606205452.2386930-2-lukas.schmid@netcube.li Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-07-06Merge tag 'v7.2-rc2' into togregJonathan Cameron
Linux 7.2-rc2 Done to resolve conflicts with header reorg around mod_devicetable.h and provide a base for other inflight series that touch the includes.
2026-07-06mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v7.2-rc[n] into the next branch, to allow them to get tested together with the mmc changes that are targeted for the next release. Signed-off-by: Ulf Hansson <ulfh@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-30 16:53:24 +0000