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2025-04-15dt-bindings: gpu: img: Future-proofing enhancementsMatt Coster
The first compatible strings added for the AXE-1-16M are not sufficient to accurately describe all the IMG Rogue GPUs. The current "img,img-axe" string refers to the entire family of Series AXE GPUs, but this is primarily a marketing term and does not denote a level of hardware similarity any greater than just "Rogue". The more specific "img,img-axe-1-16m" string refers to individual AXE-1-16M GPU. For example, unlike the rest of the Series AXE GPUs, the AXE-1-16M only uses a single power domain. The situation is actually slightly worse than described in the first paragraph, since many "series" (such as Series BXS found in the TI AM68 among others and added later in this series) contain cores with both Rogue and Volcanic architectures. Besides attempting to move away from vague groupings defined only by marketing terms, we want to draw a line between properties inherent to the IP core and choices made by the silicon vendor at integration time. For instance, the number of power domains is a property of the IP core, whereas the decision to use one or multiple clocks is a vendor one. In the original compatible strings, we must use "ti,am62-gpu" to constrain both of these properties since the number of power domains cannot be fixed for "img,img-axe". Work is currently underway to add support for volcanic-based Imagination GPUs, for which bindings will be added in "img,powervr-volcanic.yaml". As alluded to previously, the split between rogue and volcanic cores is non-obvious at times, so add a generic top-level "img,img-rogue" compatible string here to allow for simpler differentiation in devicetrees without referring back to the bindings. The currently supported GPU (AXE-1-16M) only requires a single power domain. Subsequent patches will add support for BXS-4-64 MC1, which has two power domains. Add infrastructure now to allow for this. Also allow the dma-coherent property to be added to IMG Rogue GPUs, which are DMA devices. The decision for coherency is made at integration time and this property should be applied wherever it accurately describes the vendor integration. Note that the new required properties for power domains are conditional on the new base compatible string to avoid an ABI break. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-1-eda620c5865f@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2025-04-15dt-bindings: interconnect: Add EPSS L3 compatible for SA8775PRaviteja Laggyshetty
Add Epoch Subsystem (EPSS) L3 interconnect provider binding on SA8775P SoCs. The L3 instance on the SA8775P SoC is similar to those on SoCs like SM8250 and SC7280. These SoCs use the PERF register instead of L3_REG for programming the performance level, which is managed in the data associated with the target-specific compatibles. Since the hardware remains the same across all EPSS-supporting SoCs, the generic compatible is retained for all SoCs. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com> Link: https://lore.kernel.org/r/20250415095343.32125-2-quic_rlaggysh@quicinc.com Signed-off-by: Georgi Djakov <djakov@kernel.org>
2025-04-15dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5Xianwei Zhao
Amlogic A5 SoCs uses the same pintrl controller as A4 SoCs. There is no need for an extra compatible line in the driver, but add A5 compatible line for documentation. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://lore.kernel.org/20250403-a5-pinctrl-v3-1-a8c067e22295@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-15dt-bindings: media: mediatek: mdp3: Add compatibles for MT8188 MDP3AngeloGioacchino Del Regno
Add compatible strings for the FG, HDR, RSZ, STITCH, TCC, TDSHP and WROT hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241218105320.38980-3-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-15dt-bindings: display: mediatek: Add compatibles for MT8188 MDP3AngeloGioacchino Del Regno
Add compatible strings for the AAL, COLOR, MERGE and PADDING hardware components found in MediaTek's MT8188 SoC. This hardware is compatible with MT8195. Acked-by: Nicolas Dufresne <nicolas.dufresne@collabora.com> Acked-by: Chun-Kuang Hu <chunkuang.hu@mediatek.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241218105320.38980-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-15dt-bindings: memory: mtk-smi: Add support for MT6893AngeloGioacchino Del Regno
Add support for the Smart Multimedia Interface's Common and Local Arbiter HW as found in the MediaTek Dimensity 1200 (MT6893) SoC. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410143958.475846-2-angelogioacchino.delregno@collabora.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-14dt-bindings: net: ti: k3-am654-cpsw-nuss: evaluate fixed-link propertySiddharth Vadapalli
Since the fixed-link (phyless) mode of operation is supported by the CPSW MAC, include "fixed-link" in the set of properties to be evaluated. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Link: https://patch.msgid.link/20250411060917.633769-3-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-14dt-bindings: net: ethernet-controller: add 5000M speed to fixed-linkSiddharth Vadapalli
A link speed of 5000 Mbps is a valid speed for a fixed-link mode of operation. Hence, update the bindings to include the same. Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Link: https://patch.msgid.link/20250411060917.633769-2-s-vadapalli@ti.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-04-14dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controllerInochi Amaoto
Like SG2042, SG2044 also uses an external MSI controller to provide MSI interrupt for PCIe controllers. The difference between these two MSI controllers are: 1. SG2044 acks the interrupt by writing 0, SG2042 by setting the bit related to the interrupt. 2. SG2044 uses interrupt number modulo 32 as MSI message data, but SG2042 uses the bit related to the interrupt. Add support for the SG2044 MSI controller. Signed-off-by: Inochi Amaoto <inochiama@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Chen Wang <wangchen20@iscas.ac.cn> # SG2042 Reviewed-by: Chen Wang <unicorn_wang@outlook.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/all/20250413224922.69719-2-inochiama@gmail.com
2025-04-14Add support for Loongson-1 AC97Mark Brown
Merge series from Keguang Zhang <keguang.zhang@gmail.com>: Add the driver and dt-binding document for Loongson-1 AC97. Add the dt-binding document for Realtek ALC203 Codec. Add DT support for the AC97 generic codec driver.
2025-04-14dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893AngeloGioacchino Del Regno
Add a compatible for the MediaTek Dimensity 1200 (MT6893) SoC's DVFSRC hardware, introducing capability to communicate with it. Even though this SoC uses the same basic version of the DVFSRC IP as MT8195, the vcore-vdram parameters are different, hence no fallback compatibility is possible. Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250410144019.475930-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-04-14dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocolPeng Fan
Add i.MX SCMI Extension protocols bindings for: - Logic Machine Management(LMM) Protocol intended for boot, shutdown, and reset of other logical machines (LM). It is usually used to allow one LM to manager another used as an offload or accelerator engine.. - CPU Protocol. allows an agent to start or stop a CPU. It is used to manage auxiliary CPUs in an LM (e.g. additional cores in an AP cluster). Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Peng Fan <peng.fan@nxp.com> Message-Id: <20250408-imx-lmm-cpu-v4-2-4c5f4a456e49@nxp.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2025-04-14dt-bindings: pinctrl: renesas: Document RZ/V2N SoCLad Prabhakar
Add documentation for the pin controller found on the Renesas RZ/V2N (R9A09G056) SoC. The RZ/V2N PFC differs slightly from the RZ/G2L family and is almost identical to the RZ/V2H(P) SoC, except that the RZ/V2H(P) SoC has an additional dedicated pin. To account for this, a SoC-specific compatible string, 'renesas,r9a09g056-pinctrl', is introduced for the RZ/V2N SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-10-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14dt-bindings: clock: renesas: Document RZ/V2N SoC CPGLad Prabhakar
Document the device tree bindings for the Renesas RZ/V2N (R9A09G056) SoC Clock Pulse Generator (CPG). Update `renesas,rzv2h-cpg.yaml` to include the compatible string for RZ/V2N SoC and adjust the title and description accordingly. Additionally, introduce `renesas,r9a09g056-cpg.h` to define core clock constants for the RZ/V2N SoC. Note the existing RZ/V2H(P) family-specific clock driver will be reused for this SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-7-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14dt-bindings: soc: renesas: Document SYS for RZ/V2N SoCLad Prabhakar
Add the RZ/V2N (R9A09G056) variant to the existing RZ/V2H(P) System Controller (SYS) binding, as both IPs are very similar. However, they have different SoC IDs, and the RZ/V2N does not have PCIE1 configuration registers, unlike the RZ/V2H(P) SYS IP. To handle these differences, introduce a new compatible string `renesas,r9a09g056-sys`. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVKLad Prabhakar
Document the Renesas RZ/V2N (R9A09G056) SoC variants, distinguishing between configurations with and without specific hardware features such as GPU, ISP, and cryptographic extensions. Also, document the "renesas,rzv2n-evk" compatible string for the RZ/V2N EVK board. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250407191628.323613-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-14dt-bindings: pwm: Add Loongson PWM controllerBinbin Zhou
Add Loongson PWM controller binding with DT schema format using json-schema. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://lore.kernel.org/r/57e0cbd4b7ce37da94094205e28a2ec2256c7175.1743403075.git.zhoubinbin@loongson.cn Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2025-04-13ASoC: dt-bindings: Add bindings for Richtek rt9123pChiYuan Huang
Document the ASoC Richtek rt9123p. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/0c80e1c6165fee5e9884d541167eee0a7f676c06.1744245663.git.cy_huang@richtek.com Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-13ASoC: dt-bindings: Add bindings for Richtek rt9123ChiYuan Huang
Document the ASoC Richtek rt9123. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/4a0b67438f82e7d8ed9968cc90acf419fc9c22cf.1744245663.git.cy_huang@richtek.com Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-13ASoC: dt-bindings: Add Realtek ALC203 CodecKeguang Zhang
Add devicetree binding document for Realtek ALC203 codec. Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Link: https://patch.msgid.link/20250409-loongson1-ac97-v2-2-65d5db96a046@gmail.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-13ASoC: dt-bindings: Add Loongson-1 AC97 ControllerKeguang Zhang
Add devicetree binding document for Loongson-1 AC97 controller. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Keguang Zhang <keguang.zhang@gmail.com> Link: https://patch.msgid.link/20250409-loongson1-ac97-v2-1-65d5db96a046@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-04-11dt-bindings: soc: fsl: fsl,ls1028a-reset: Fix maintainer entryGeert Uytterhoeven
make dt_binding_check: Documentation/devicetree/bindings/soc/fsl/fsl,ls1028a-reset.yaml: maintainers:0: 'Frank Li' does not match '@' from schema $id: http://devicetree.org/meta-schemas/base.yaml# Fix this by adding Frank's email address. Fixes: 9ca5a7d9d2e05de6 ("dt-bindings: soc: fsl: Add fsl,ls1028a-reset for reset syscon node") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://lore.kernel.org/r/185e1e06692dc5b08abcde2d3dd137c78e979d08.1744301283.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-11dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sciThierry Bultel
RSCI of RZ/T2H SoC (a.k.a r9a09g077), as a lot of similarities with SCI in other Renesas SoC like G2L, G3S, V2L; However, it has a different set of registers, and in addition to serial, this IP also supports SCIe (encoder), SmartCard, i2c and spi. This is why the 'renesas,sci' fallback for generic SCI does not apply for it. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Link: https://lore.kernel.org/r/20250403212919.1137670-4-thierry.bultel.yh@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: serial: 8250: support an optional second clockAlex Elder
The SpacemiT UART driver requires a bus clock to be enabled in addition to the primary function clock. Add the option to specify two clocks for an 8250-compatible UART, named "core" and "bus". If both are needed, require them to be named. Signed-off-by: Alex Elder <elder@riscstar.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250409192213.1130181-2-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: serial: snps-dw-apb-uart: Simplify DMA-less RZ/N1 ruleGeert Uytterhoeven
There is no need to repeat all SoC-specific compatible values in the rule for DMA-less RZ/N1 variants. Use wildcard "{}" instead, to ease maintenance. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/90c7aa143beb6a28255b24e8ef8c96180d869cbb.1744271974.git.geert+renesas@glider.be Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: timer: renesas,tpu: remove obsolete bindingKuninori Morimoto
Commit 1c4b5ecb7ea1 ("remove the h8300 architecture") removed Renesas TPU timer driver. Let's remove its binding. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Cc: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/877c3vnq0k.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-11dt-bindings: usb: usbmisc-imx: add support for i.MX95 platformXu Yang
Add compatible string "fsl,imx95-usbmisc" for i.MX95 platform and restriction on reg property. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20250318150908.1583652-2-xu.yang_2@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: usb: chipidea: Add i.MX95 compatible string 'fsl,imx95-usb'Xu Yang
The i.MX95 USB2.0 controller is mostly compatible with i.MX7D, except it requires a second interrupt for wakeup handling. Add the compatible string for the i.MX95 platform, add the iommus property, and enforce the interrupt property restriction. Keep the same restriction for existing compatible strings. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Link: https://lore.kernel.org/r/20250318150908.1583652-1-xu.yang_2@nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: usb: smsc,usb3503: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250324125142.81910-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: usb: dwc3: Allow connector in USB controller nodeMatthias Schiffer
Allow specifying the connector directly in the USB controller node, as allow in other USB controller bindings and commonly used for "gpio-usb-b-connector". Linux already supports this without driver changes. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250325131848.127438-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: usb: qcom,dwc3: Add SM8750 compatibleWesley Cheng
SM8750 uses the Synopsys DWC3 controller. Add this to the compatibles list to utilize the DWC3 QCOM and DWC3 core framework. Other than a revision bump to DWC3 controller rev2.00a, the controller on SM8750 does not add any additional vendor specific features compared to previous chipsets. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250409-sm8750_usb_master-v4-3-6ec621c98be6@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: Add compatible for MSM8960Rudraksha Gupta
Document the QFPROM on MSM8960. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Rudraksha Gupta <guptarud@gmail.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-14-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: Add compatible for IPQ5018Sricharan Ramabadhran
Document the QFPROM block found on IPQ5018 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-13-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: fixed-cell: increase bits start value to 31Dmitry Baryshkov
If NVMEM uses a data stride bigger than a byte, the starting bit of the cell might be bigger than a byte (e.g. if the data comes in the second byte of the 4-byte word). Allow the staring bit to be 8 or greater to reflect such usecases. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-8-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: Add compatible for MS8937Barnabás Czémán
Document the QFPROM block found on MSM8937. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-7-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: qfprom: Add X1E80100 compatibleAkhil P Oommen
Document compatible string for the QFPROM on X1E80100 platform. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-6-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: rockchip,otp: Add compatible for RK3576Heiko Stuebner
Document the OTP memory found on Rockchip RK3576 SoC. The RK3576 uses the same set of clocks as the px30/rk3308 but has one reset more, so adapt the binding to handle this variant as well. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-4-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: nvmem: rockchip,otp: add missing limits for clock-namesHeiko Stuebner
The clocks property correctly declares minItems and maxItems for its variants, but clock-names does not. Both properties are always used together, so should declare the same limits. Suggested-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Tested-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20250411112251.68002-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: phy: qcom: uniphy-pcie: Add ipq5018 compatibleNitheesh Sekar
The IPQ5018 SoC contains a Gen2 1 and 2-lane PCIe UNIPHY which is the same as the one found in IPQ5332. As such, add IPQ5018 compatible. Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250326-ipq5018-pcie-v7-1-e1828fef06c9@outlook.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-11dt-bindings: media: add support for video hardware on QCS615 platformRenjiang Han
QCS615 uses the same video core as SC7180. Therefore, add qcom,qcs615-venus compatible to qcom,sc7180-venus.yaml to enable video hardware support on QCS615 platform. Make qcom,qcs615-venus fallback to qcom,sc7180-venus to ensure compatibility with existing configurations. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Renjiang Han <quic_renjiang@quicinc.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-11dt-bindings: media: qcom,sm8550-iris: document SA8775p IRIS acceleratorVikash Garodia
Document the IRIS video decoder and encoder accelerator found in the SA8775p platform. SA8775p and SM8550 are irisv3 with same core and bindings, hence SA8775p is made fallback to SM8550. QCS8300 is a downscaled version of irisv3 and have different hardware capabilities. SM8650 is an irisv3 with different (higher) number of reset lines compared to SM8550. QCS8300 is yet to come in future posting, while SM8650 is posted as https://lore.kernel.org/all/20250305-topic-sm8x50-iris-v10-v2-1-bd65a3fc099e@linaro.org/ Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-11dt-bindings: media: Add qcom,x1e80100-camssBryan O'Donoghue
Add bindings for qcom,x1e80100-camss in order to support the camera subsystem for x1e80100 as found in various Co-Pilot laptops. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-11dt-bindings: media: camss: Restrict bus-type propertyLuca Weiss
The CSIPHY of Qualcomm SoCs support both D-PHY and C-PHY standards for CSI-2, but not any others so restrict the bus-type property describing this to the supported values. The only exception here is MSM8916 which only supports D-PHY. C-PHY was introduced with newer SoCs. Do note, that currently the Linux driver only supports D-PHY. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2025-04-11ASoC: dt-bindings: Update example for enabling USB offload on SM8250Wesley Cheng
Add an example on enabling of USB offload for the Q6DSP. The routing can be done by the mixer, which can pass the multimedia stream to the USB backend. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Wesley Cheng <quic_wcheng@quicinc.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20250409194804.3773260-22-quic_wcheng@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-04-11dt-bindings: phy: brcmstb-usb-phy: Add support for bcm74110Justin Chen
bcm74110 brcmstb usb phy adds further power savings during suspend states. Signed-off-by: Justin Chen <justin.chen@broadcom.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250402185159.2976920-2-justin.chen@broadcom.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-10dt-bindings: display: simple: Add NLT NL13676BC25-03F panelAntonin Godard
Add NLT NL13676BC25-03F 15.6" LCD-TFT LVDS panel compatible string. Signed-off-by: Antonin Godard <antonin.godard@bootlin.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250318-b4-add-nlt-nl13676bc25-03f-v1-1-67e0f8cf2e6f@bootlin.com Signed-off-by: Louis Chauvet <louis.chauvet@bootlin.com>
2025-04-10dt-bindings: vendor-prefixes: Add EcoNetCaleb James DeLisle
Add the "econet" vendor prefix for SoC maker Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250330170306.2584136-2-cjd@cjdns.fr Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-04-10dt-bindings: phy: samsung,usb3-drd-phy: add exynos7870-usbdrd-phy compatibleKaustabh Chakraborty
Add the compatible string "samsung,exynos7870-usbdrd-phy" to the documentation. The devicetree node requires two clocks, named "phy" and "ref" (same as clocks required by Exynos5). Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250410-exynos7870-usbphy-v2-2-2eb005987455@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-10dt-bindings: phy: rockchip: Add missing "phy-supply" propertyRob Herring (Arm)
Several Rockchip PHYs use the "phy-supply" property, but don't document it. Add it to the current known users. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250407165607.2937088-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-04-10dt-bindings: display: rockchip,vop: Drop assigned-clocksRob Herring (Arm)
assigned-clock properties are implicitly allowed in any node with 'clocks' and don't have to be specified. The max here also appears to be wrong as there's a case with 4 entries. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250404214030.401629-1-robh@kernel.org
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