summaryrefslogtreecommitdiff
path: root/Documentation/devicetree
AgeCommit message (Collapse)Author
2025-02-26dt-bindings: display: qcom,sm8650-mdss: explicitly document mdp0-mem and ↵Neil Armstrong
cpu-cfg interconnect paths The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2 makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is required, so explicitly document the mdp0-mem/cpu-cfg interconnect paths and complete the example with the missing interconnect paths. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/637051/ Link: https://lore.kernel.org/r/20250213-topic-sm8x50-mdss-interconnect-bindings-fix-v4-2-3fa0bc42dd38@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-02-26dt-bindings: display: qcom,sm8550-mdss: explicitly document mdp0-mem and ↵Neil Armstrong
cpu-cfg interconnect paths The mdp1-mem is not supported on the SM8550 SoCs, and having maxItems=2 makes the bindings not clear if mdp0-mem/mdp1-mem or mdp0-mem/cpu-cfg is required, so explicitly document the mdp0-mem/cpu-cfg interconnect and add the cpu-cfg path in the example. Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/637050/ Link: https://lore.kernel.org/r/20250213-topic-sm8x50-mdss-interconnect-bindings-fix-v4-1-3fa0bc42dd38@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-02-26dt-bindings: display/msm/dsi-phy: Add header with exposed clock IDsKrzysztof Kozlowski
DSI phys, from earliest (28 nm) up to newest (3 nm) generation, provide two clocks. The respective clock ID is used by drivers and DTS, so it should be documented as explicit ABI. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Acked-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/634146/ Link: https://lore.kernel.org/r/20250127132105.107138-1-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2025-02-26dt-bindings: interrupt-controller: Add Sophgo SG2042 MSIChen Wang
Add binding for Sophgo SG2042 MSI controller. Signed-off-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/all/44de02977624be334ba6328acfdbb2a375f2071f.1740535748.git.unicorn_wang@outlook.com
2025-02-25Merge tag 'v6.14-rc4' into nextDmitry Torokhov
Sync up with the mainline.
2025-02-25dt-bindings: display/lvds-codec: add ti,sn65lvds822Ahmad Fatoum
Add compatible strings for TI SN65LVDS822, a FlatLink LVDS receiver. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.kernel.org/r/20250106-skov-dt-updates-v2-5-4504d3f00ecb@pengutronix.de Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-25dt-bindings: input: matrix_keypad: add settle time after enabling all columnsMarkus Burri
Matrix keypads with high capacity need a longer settle time after enabling all columns. Add an optional property to specify the settle time. Signed-off-by: Markus Burri <markus.burri@mt.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Manuel Traut <manuel.traut@mt.com> Link: https://lore.kernel.org/r/20250110054906.354296-6-markus.burri@mt.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-02-25dt-bindings: input: matrix_keypad: convert to YAMLMarkus Burri
Convert the gpio-matrix-keypad bindings from text to DT schema. Signed-off-by: Markus Burri <markus.burri@mt.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Manuel Traut <manuel.traut@mt.com> Link: https://lore.kernel.org/r/20250110054906.354296-4-markus.burri@mt.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-02-25Enable DMIC for Genio 700/510 EVKMark Brown
Merge series from "Nícolas F. R. A. Prado" <nfraprado@collabora.com>: This series enables the dual digital microphones present on the Genio 700 and 510 EVK boards.
2025-02-25dt-bindings: input: Correct indentation and style in DTS exampleKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250107125844.226466-1-krzysztof.kozlowski@linaro.org Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-02-25ASoC: dt-bindings: fsl: Reference common DAIMark Brown
Merge series from Shengjiu Wang <shengjiu.wang@nxp.com>: Reference common DAI properties for fsl,easrc and fsl,imx-asrc
2025-02-25ASoC: dt-bindings: mediatek,mt8188-mt6359: Add DMIC backend to dai-linkNícolas F. R. A. Prado
MT8188 platforms also have DMIC DAIs, which were previously undescribed. Add DMIC_BE as a possible backend for the dai-link property. Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20250225-genio700-dmic-v2-7-3076f5b50ef7@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-25Fix RK3588 power domain problemsMark Brown
Merge series from Sebastian Reichel <sebastian.reichel@collabora.com>: This introduces devm_of_regulator_get without the _optional suffix, since that is more sensible for the Rockchip usecase.
2025-02-25ASoC: dt-bindings: fsl,imx-asrc: Reference common DAI propertiesShengjiu Wang
Reference the dai-common.yaml schema to allow '#sound-dai-cells' and "sound-name-prefix' to be used. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250224090413.727911-3-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-25ASoC: dt-bindings: fsl,easrc: Reference common DAI propertiesShengjiu Wang
Reference the dai-common.yaml schema to allow '#sound-dai-cells' and "sound-name-prefix' to be used. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250224090413.727911-2-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-25Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging to get fixes from v6.14-rc4. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2025-02-25dt-bindings: display: simple: Add BOE AV123Z7M-N17 panelMaud Spierings
Add support for the BOE AV123Z7M-N17 12.3" LVDS panel. Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250224-initial_display-v1-2-5ccbbf613543@gocontroll.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250224-initial_display-v1-2-5ccbbf613543@gocontroll.com
2025-02-25dt-bindings: display: simple: add BOE AV101HDT-A10 panelMaud Spierings
add a compatible string for the BOE AV101HDT-A10 10.1" LVDS panel Signed-off-by: Maud Spierings <maudspierings@gocontroll.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250224-initial_display-v1-1-5ccbbf613543@gocontroll.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20250224-initial_display-v1-1-5ccbbf613543@gocontroll.com
2025-02-25dt-bindings: usb: mediatek,mtk-xhci: Add port for SuperSpeed EPAngeloGioacchino Del Regno
Add a port used to connect the SuperSpeed output endpoint to a Type-C connector. Note that the MediaTek XHCI controllers are always in front of a different controller handling the USB HS (usually, MTU3), so the only port that this controller provides is SuperSpeed, while the HighSpeed one comes from elsewhere. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250220105514.43107-2-angelogioacchino.delregno@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-02-25dt-bindings: usb: mtu3: Add ports propertyMacpaul Lin
Define the ports property in the mediatek,mtu3 device tree binding schema. Include definitions for port@0 and port@1, specifying their roles as High Speed (HS) and Super Speed (SS) data buses, respectively. Suggested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Alexandre Mergnat <amergnat@baylibre.com> Link: https://lore.kernel.org/r/20250220142230.2530583-1-macpaul.lin@mediatek.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-02-25Merge tag 'v6.14-rc4' into drm-nextDave Airlie
Backmerge Linux 6.14-rc4 at the request of tzimmermann so misc-next can base on rc4. Signed-off-by: Dave Airlie <airlied@redhat.com>
2025-02-24dt-bindings: input/touchscreen: imagis: add compatible for ist3038hAndras Sebok
IST3038H is a touchscreen IC which seems mostly compatible with IST3038C except that it reports a different chip ID value. Signed-off-by: Andras Sebok <sebokandris2009@gmail.com> Link: https://lore.kernel.org/r/20250224090354.102903-4-sebokandris2009@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-02-24scsi: ufs: dt-bindings: Document Rockchip UFS host controllerShawn Lin
Document Rockchip UFS host controller for RK3576 SoC. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1738736156-119203-2-git-send-email-shawn.lin@rock-chips.com Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
2025-02-24dt-bindings: PCI: brcmstb: Update bindings for PCIe on BCM2712Stanimir Varbanov
Update PCIe controller bindings with BCM2712 support. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20250224083559.47645-3-svarbanov@suse.de [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: interrupt-controller: Add BCM2712 MSI-X bindingsStanimir Varbanov
Add bindings for BCM2712 MSI-X interrupt peripheral controller. Signed-off-by: Stanimir Varbanov <svarbanov@suse.de> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Tested-by: Ivan T. Ivanov <iivanov@suse.de> Link: https://lore.kernel.org/r/20250224083559.47645-2-svarbanov@suse.de [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Add SAR2130P compatibleDmitry Baryshkov
Add support for using the PCI controller in the PCIe Endpoint mode on the SAR2130P platform. This is needed, as it is not possible to use a compatible fallback on any other platform since SAR2130P uses slightly different set of clocks. Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-5-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Consolidate DMA vs non-DMA casesDmitry Baryshkov
On Qualcomm platforms here are two major kinds of PCIe Endpoint controllers: ones which use eDMA and IOMMU and the ones which do not (e.g., SDX55 or SDX65). As such, it doesn't make sense to duplicate similar properties all over the place. Thus, merge these two cases into a single conditional clause. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-4-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Enable DMA for SM8450Dmitry Baryshkov
Qualcomm SM8450 platform can (and should) be using DMA for the PCIe Endpoint transfers. Thus, extend the MMIO regions and interrupts in order to acommodate for the DMA resources, mark iommus property as required for the platform. Upstream devicetree doesn't provide support for the Endpoint mode of the PCIe controller, so while this is an ABI break, it doesn't break any of the supported platforms. Fixes: 63e445b746aa ("dt-bindings: PCI: qcom-ep: Add support for SM8450 SoC") Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-3-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Describe optional IOMMUDmitry Baryshkov
Some of Qualcomm platforms have an IOMMU unit between the PCIe IP and DDR. For example, the SA8775P specifies the iommu alththough it is not a part of bindings. Thus, change the schema in order to require the IOMMU for SA8775P and forbid it from being used on SDX55 (SM8450 will be handled in a later patch). This fixes the following warning: pcie-ep@1c10000: Unevaluated properties are not allowed ('iommus' was unexpected) Fixes: 9d3d5e75f31c ("dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-2-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24dt-bindings: PCI: qcom-ep: Describe optional dma-coherent propertyDmitry Baryshkov
Qualcomm SA8775P supports cache coherency on the PCIe Endpoint controller. Thus, allow "dma-coherent" property to be used for this device. This fixes a part of the following error (the second part is fixed in the next commit): pcie-ep@1c10000: Unevaluated properties are not allowed ('dma-coherent', 'iommus' were unexpected) Fixes: 4b220c6fa9f3 ("arm64: dts: qcom: sa8775p: Mark PCIe EP controller as cache coherent") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20250221-sar2130p-pci-v3-1-61a0fdfb75b4@linaro.org [kwilczynski: commit log] Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2025-02-24ASoC: dt-bindings: imx-card: Add playback-only and capture-only propertyShengjiu Wang
Refer to audio graph card, add playback-only and capture-only property for imx-audio-card.yaml for the case that only playback or capture is supported. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com> Reviewed-by: Iuliana Prodan <iuliana.prodan@nxp.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250217021715.284951-2-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-02-24dt-bindings: atmel-sysreg: Add SAMA7D65 Chip IDRyan Wanner
Add compatible string for SAMA7D65 SoC ChipID dt-bindings. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/008e4e49c9fd315cc96a185662b31eca1a64a614.1739555984.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-02-24Merge tag 'v6.14-rc4' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into HEAD Linux 6.14-rc4
2025-02-23dt-bindings: arm: rockchip: Add Radxa ROCK 4D boardDetlev Casanova
The board is based on the Rockchip rk3576 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Detlev Casanova <detlev.casanova@collabora.com> Link: https://lore.kernel.org/r/20250218160714.140709-2-detlev.casanova@collabora.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-22dt-bindings: iio: Add adis16550 bindingsRobert Budai
Document the ADIS16550 device devicetree bindings. Co-developed-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com> Co-developed-by: Ramona Gradinariu <ramona.gradinariu@analog.com> Signed-off-by: Ramona Gradinariu <ramona.gradinariu@analog.com> Signed-off-by: Robert Budai <robert.budai@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250217105753.605465-5-robert.budai@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-02-22dt-bindings: crypto: qcom-qce: Document the X1E80100 crypto engineAbel Vesa
Document the crypto engine on the X1E80100 Platform. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-22dt-bindings: rng: add binding for Rockchip RK3588 RNGNicolas Frattaroli
The Rockchip RK3588 SoC has two hardware RNGs accessible to the non-secure world: an RNG in the Crypto IP, and a standalone RNG that is new to this SoC. Add a binding for this new standalone RNG. It is distinct hardware from the existing rockchip,rk3568-rng, and therefore gets its own binding as the two hardware IPs are unrelated other than both being made by the same vendor. The RNG is capable of firing an interrupt when entropy is ready. The reset is optional, as the hardware does a power-on reset, and functions without the software manually resetting it. Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2025-02-21dt-bindings: gpu: mali-bifrost: Add Allwinner H616 compatibleAndre Przywara
The Allwinner H616 SoC has a Mali-G31 MP2 GPU, which is of the Mali Bifrost family. Add the SoC specific compatible string and pair it with the bifrost fallback compatible. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20250221005802.11001-4-andre.przywara@arm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-21dt-bindings: trivial-devices: Add ti,tps53681Michal Simek
Describe TI TPS5381 a dual-channel multiphase step-down controller supporting per-phase and per-channel output telemetry. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/26aac15b8f0fdbcc2633d3843e216e6c8d30bb31.1740054443.git.michal.simek@amd.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-21dt-bindings: net: Add Realtek MDIO controllerChris Packham
Add dtschema for the MDIO controller found in the RTL9300 Ethernet switch. The controller is slightly unusual in that direct MDIO communication is not possible. We model the MDIO controller with the MDIO buses as child nodes and the PHYs as children of the buses. The mapping of switch port number to MDIO bus/addr requires the ethernet-ports sibling to provide the mapping via the phy-handle property. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-21dt-bindings: net: Add switch ports and interrupts to RTL9300Chris Packham
Add bindings for the ethernet-switch and interrupt properties for the RTL9300. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-3-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-21dt-bindings: net: Move realtek,rtl9301-switch to netChris Packham
Initially realtek,rtl9301-switch was placed under mfd/ because it had some non-switch related blocks (specifically i2c and reset) but with a bit more review it has become apparent that this was wrong and the binding should live under net/. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Acked-by: Lee Jones <lee@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250218195216.1034220-2-chris.packham@alliedtelesis.co.nz Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-02-21Merge tag 'soc-fixes-6.14' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "Two people stepped up as platform co-maintainers: Andrew Jeffery for ASpeed and Janne Grunau for Apple. The rockchip platform gets 9 small fixes for devicetree files, addressing both compile-time warnings and board specific bugs. One bugfix for the optee firmware driver addresses a reboot-time hang. Two drivers need improved Kconfig dependencies to allow wider compile- testing while hiding the drivers on platforms that can't use them. ARM SCMI and loongson-guts drivers get minor bugfixes" * tag 'soc-fixes-6.14' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: soc: loongson: loongson2_guts: Add check for devm_kstrdup() tee: optee: Fix supplicant wait loop platform: cznic: CZNIC_PLATFORMS should depend on ARCH_MVEBU firmware: imx: IMX_SCMI_MISC_DRV should depend on ARCH_MXC MAINTAINERS: arm: apple: Add Janne as maintainer MAINTAINERS: Mark Andrew as M: for ASPEED MACHINE SUPPORT firmware: arm_scmi: imx: Correct tx size of scmi_imx_misc_ctrl_set arm64: dts: rockchip: adjust SMMU interrupt type on rk3588 arm64: dts: rockchip: disable IOMMU when running rk3588 in PCIe endpoint mode dt-bindings: rockchip: pmu: Ensure all properties are defined arm64: defconfig: Enable TISCI Interrupt Router and Aggregator arm64: dts: rockchip: Fix lcdpwr_en pin for Cool Pi GenBook arm64: dts: rockchip: fix fixed-regulator renames on rk3399-gru devices arm64: dts: rockchip: Disable DMA for uart5 on px30-ringneck arm64: dts: rockchip: Move uart5 pin configuration to px30 ringneck SoM arm64: dts: rockchip: change eth phy mode to rgmii-id for orangepi r1 plus lts arm64: dts: rockchip: Fix broken tsadc pinctrl names for rk3588
2025-02-21dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2H(P) SoCLad Prabhakar
Add a compatible string for the Renesas RZ/V2H(P) SoC variants that include a Mali-G31 GPU. These variants share the same restrictions on interrupts, clocks, and power domains as the RZ/G2L SoC, so extend the existing schema validation accordingly. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20250218115922.407816-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-02-21Merge tag 'mtd/fixes-for-6.14-rc4' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd fixes from Miquel Raynal: "The two most important fixes in this list are probably the SST write failure and the Qcom raw NAND controller probe failure which are due to some refactoring, otherwise there has been a series of misc fixes on the Cadence raw NAND controller driver and especially on the DMA side" * tag 'mtd/fixes-for-6.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: mtd: rawnand: cadence: fix unchecked dereference mtd: spi-nor: sst: Fix SST write failure dt-bindings: mtd: cadence: document required clock-names mtd: rawnand: qcom: fix broken config in qcom_param_page_type_exec mtd: rawnand: cadence: fix incorrect device in dma_unmap_single mtd: rawnand: cadence: use dma_map_resource for sdma address mtd: rawnand: cadence: fix error code in cadence_nand_init()
2025-02-21dt-bindings: clock: add clock definitions for Ralink SoCsSergio Paracuellos
Add clock missing definitions for RT2880, RT305X, RT3352, RT3383, RT5350, MT7620 and MT76X8 Ralink SoCs. Update bindings to clarify clock depending on these new introduced constants so consumer nodes can easily use the correct one in DTS files matching properly what is being used in driver code (clock IDs are implicitly used there). Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: arm: coresight-tmc: Add "memory-region" propertyLinu Cherian
memory-region 0: Reserved trace buffer memory TMC ETR: When available, use this reserved memory region for trace data capture. Same region is used for trace data retention after a panic or watchdog reset. TMC ETF: When available, use this reserved memory region for trace data retention synced from internal SRAM after a panic or watchdog reset. memory-region 1: Reserved meta data memory TMC ETR, ETF: When available, use this memory for register snapshot retention synced from hardware registers after a panic or watchdog reset. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linu Cherian <lcherian@marvell.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20250212114918.548431-2-lcherian@marvell.com
2025-02-21dt-bindings: mips: mips-cm: Add a new compatible string for EyeQ6Gregory CLEMENT
The CM3.5 used on EyeQ6 reports that Hardware Cache Initialization is complete, but in reality it's not the case. It also incorrectly indicates that Hardware Cache Initialization is supported. This new compatible string allows warning about this broken feature that cannot be detected at runtime. Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: mips: Document mti,mips-cmGregory CLEMENT
Add device tree binding documentation for MIPS Coherence Manager. This component enables support for SMP by providing each processor in the system with a uniform view of memory. The Coherence Manager is responsible for establishing the global ordering of requests from all elements of the system and sending the correct data back to the requester. Based on the work of Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2025-02-21dt-bindings: ata: Convert fsl,pq-sata to YAMLJ. Neuschäfer
Convert the Freescale PowerQUICC SATA controller binding from text form to YAML. The list of compatible strings reflects current usage. To clarify the description, I changed it to mention "each SATA controller" instead of each port. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Damien Le Moal <dlemoal@kernel.org> Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Link: https://lore.kernel.org/r/20250220-ppcyaml-ata-v3-1-5e727ab86247@posteo.net Signed-off-by: Niklas Cassel <cassel@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-21 07:40:36 +0000