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2026-06-30ASoC: dt-bindings: Convert cirrus,cs35l36 to DT schemaDavid Heidelberg
Convert CS35L36 Speaker Amplifier to yaml. Changes: - maintainers email to the generic Cirrus email - Both the codec and downstream worked just fine without VP-supply provided. Align with datasheet for similar models. - add dai-common.yaml to cover for '#sound-dai-cells', 'sound-name-prefix' - updated not yet implemented: cirrus,weak-fet-delay -> cirrus,classh-wk-fet-delay-ms (in both definition and example) cirrus,weak-fet-thld -> cirrus,weak-fet-thld-millivolt (only in the example) - added two required properties: cirrus,boost-ctl-millivolt cirrus,boost-peak-milliamp Assisted-by: OpenAI:gpt-4 Reviewed-by: David Rhodes <David.Rhodes@cirrus.com> Co-developed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260624-dt-cirrus-cs35l36-v3-1-ec451d5a2908@ixit.cz Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30spi: dt-bindings: snps,dw-apb-ssi: add 'power-domains' propertyWolfram Sang
This SPI controller likely belongs to a power domain for all the SoCs listed. For sure, it belongs to one on the Renesas RZ/N1 SoC, so enable the property to be able to describe its power domain in DTs. Suggested-by: Herve Codina <herve.codina@bootlin.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260626180326.9593-3-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30spi: dt-bindings: snps,dw-apb-ssi: drop superfluous RZ/N1 entryWolfram Sang
Commit 164c05f03ffa ("spi: Convert DW SPI binding to DT schema") added an RZ/N1 entry which was not in the original txt-file. It doesn't follow the usual "<soc entry>, <soc family entry>" style for Renesas SoCs which was properly added later with commit 029d32a892a8 ("spi: dw-apb-ssi: Integrate Renesas RZ/N1 SPI controller"). In that commit, removing the bogus entry was overlooked and is finally done now. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260626180326.9593-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30dt-bindings: gpu: img,powervr-*: Remove Matt Coster as maintainerMatt Coster
I'm leaving Imagination; remove myself as a maintainer. A separate patch leaves a personal forwarding address in the .mailmap. Acked-by: Matt Coster <opensource@mtcoster.net> Acked-by: Alessio Belle <alessio.belle@imgtec.com> Link: https://patch.msgid.link/20260629-goodbye-v1-2-3bab53a80c53@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2026-06-30dt-bindings: arm: xen: Convert to DT schemaTejas Mutalikdesai
Convert the Xen ARM device tree binding documentation from the legacy plain-text format (Documentation/devicetree/bindings/arm/xen.txt) to the DT schema format, as required by the modern DT binding process. The "hypervisor" node is named without a unit-address. The name is part of the Xen ABI and is matched verbatim by the kernel using strcmp() in arch/arm/xen/enlighten.c and arch/arm64/kernel/acpi.c. Allow a unit-address so this can be addressed and the dtc warnings can be avoided in the example. Signed-off-by: Tejas Mutalikdesai <tejasmutalikdesai@gmail.com> Link: https://patch.msgid.link/20260618151147.9438-1-tejasmutalikdesai@gmail.com [robh: Allow a unit-address] Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30dt-bindings: PCI: renesas,r9a08g045-pcie: Add RZ/V2H(P) supportLad Prabhakar
Add support for the PCIe controller found on the Renesas RZ/V2H(P) SoC. The RZ/V2H(P) controller is similar to the RZ/G3E variant but includes additional registers and configuration bits for PCIe lane control. It supports multilink operation configured as either a single x4 link or two independent x2 link controllers. Unlike earlier SoCs supported by this driver which only feature a single PCIe controller, the RZ/V2H(P) SoC implements two controllers. Both instances rely on the system controller (SYSC) for configuration, but the required registers reside at different offsets for each controller. To correctly identify the controller instance and map the corresponding system controller registers, update the "renesas,sysc" property to a phandle-array. For the RZ/V2H(P) SoC, require an accompanying cell to specify the controller instance index (0 or 1). For all earlier SoCs, strictly restrict the property to a single phandle with zero argument cells. Additionally, make the "num-lanes" property mandatory for this SoC and restrict its values according to the hardware capabilities. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20260629220932.861445-2-prabhakar.mahadev-lad.rj@bp.renesas.com
2026-06-30dt-bindings: pinctrl: qcom,pmic-gpio: Document PMG1110 GPIO supportFenglin Wu
Update the binding documentation to include the compatible string for PMG1110 PMIC which is used on Maili platform. Signed-off-by: Fenglin Wu <fenglin.wu@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Link: https://patch.msgid.link/20260610-pmg1110-gpio-v1-1-a9c50cd8b5d9@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-06-30dt-bindings: Drop incorrect usage of double '::'Krzysztof Kozlowski
There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Conor Dooley <conor.dooley@microchip.com> Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Acked-by: Mark Brown <broonie@kernel.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Link: https://patch.msgid.link/20260623054842.21831-4-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30dt-bindings: clock: Drop incorrect usage of double '::'Krzysztof Kozlowski
There is no use of double colon '::' in YAML. OTOH, the literal style block, e.g. using '|' treats all characters as content [1] therefore single use of ':' in descriptions is perfectly fine, whenever '|' is used. Cleanup existing code, so the confusing style won't be re-used in new contributions. Link: https://yaml.org/spec/1.2.2/#literal-style [1] Acked-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://patch.msgid.link/20260623054842.21831-3-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2026-06-30dt-bindings: pinctrl: aspeed,ast2700-soc1: Add JTAGM1TRST groupBilly Tsai
The TRST signal of the JTAG master is optional and may not be wired on every design, but it is only selectable as part of the JTAGM1 group, which forces the D12 ball to be muxed whenever the JTAG master is used. Add a separate JTAGM1TRST group so boards can enable TRST independently of the other JTAG master signals. Signed-off-by: Billy Tsai <billy_tsai@aspeedtech.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-06-30regulator: rtq2208: Remove the unnecessary MTP_SEL propertyMark Brown
ChiYuan Huang <cy_huang@richtek.com> says: This patch series remove the 'richtek,mtp-sel-high' property usage. Link: https://patch.msgid.link/cover.1782444299.git.cy_huang@richtek.com
2026-06-30regulator: dt-bindings: rtq2208: Label mtp-sel-high property as deprecatedChiYuan Huang
Since it can be identified by hardware register, label the unnecessary property 'richtek,mtp-sel-high' as deprecated. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://patch.msgid.link/594ebe167b33ca885c040984624e4b5d1382c0e2.1782444299.git.cy_huang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-30dt-bindings: PCI: qcom,pcie-ipq9574: Add IPQ5210 compatibleVaradarajan Narayanan
Add the IPQ5210 compatible using IPQ9574 as fallback. Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> [mani: commit log] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610-ipq9650_pcie_binding-v2-2-69e27a1fbf1c@oss.qualcomm.com
2026-06-30dt-bindings: PCI: qcom,pcie-ipq9574: Add IPQ9650 compatibleKathiravan Thirumoorthy
Add the IPQ9650 PCIe compatible to the IPQ9574 binding, as the IPQ9650 controller is compatible with IPQ9574 and uses it as the fallback. While at it, make the global interrupt as required for IPQ9650. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610-ipq9650_pcie_binding-v2-1-69e27a1fbf1c@oss.qualcomm.com
2026-06-30dt-bindings: clock: renesas,versaclock7: Update maintainerBiju Das
Alex' email is bouncing. Update the maintainers list with my contact details to take over the schema maintenance. While at it, extend the entry in MAINTAINERS to the Versaclock 3 clock driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250905143441.7082-1-biju.das.jz@bp.renesas.com Link: https://patch.msgid.link/20260623162039.153291-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-30dt-bindings: clock: renesas: Add audio clock inputs for RZ/V2H familyJohn Madieu
RZ/V2H, RZ/V2N, and RZ/G3E support two optional external audio clock inputs (AUDIO_CLKB and AUDIO_CLKC) that can be used by the Audio Clock Generator (ADG) to derive internal audio clocks. The third ADG input (AUDIO_CLKA) is fed internally by the AUDIO_EXTAL pin and does not need a separate binding entry. Update the bindings to allow these optional clocks for all RZ/V2H family SoCs. Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260525110603.4018170-2-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-06-30Merge drm/drm-next into drm-misc-nextThomas Zimmermann
Backmerging to get drm-misc-next to v7.2-rc1. Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
2026-06-30dt-bindings: iio: dac: ad5686: rework on power suppliesRodrigo Alencar
Add supplies for VDD, VLOGIC and VREF input voltage pins. The vcc-supply property is deprecated, once it does not really exist as none of the devices describe any power input with that name. VCC is also misleading as it sounds like the input power supply, but it is being used as an external voltage reference, which should be called VREF. Certain devices require vref-supply to be available once an internal reference voltage is absent. For correct operation vdd and vlogic supplies are required. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5686: add reset/ldac/gain supportRodrigo Alencar
Add GPIO property for RESET, LDAC and GAIN pin. RESET is active-low, LDAC is used to load DAC channels with values from input registers and GAIN can double the voltage in output channels. The gain-gpios property is not available to all supported parts. The adi,range-double property indicates that GAIN pin is hardwired to high in case gain-gpios is not set, otherwise it sets the initial value for the gain setting. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5696: rework on power suppliesRodrigo Alencar
Add supplies for VDD, VLOGIC and VREF input voltage pins. The vcc-supply property is deprecated, once it does not really exist as none of the devices describe any power input with that name. VCC is also misleading as it sounds like the input power supply, but it is being used as an external voltage reference, which should be called VREF. Certain devices require vref-supply to be available once an internal reference voltage is absent. For correct operation vdd and vlogic supplies are required. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: dac: ad5696: add reset/ldac/gain supportRodrigo Alencar
Add GPIO property for RESET, LDAC and GAIN pin. RESET is active-low, LDAC is used to load DAC channels with values from input registers and GAIN can double the voltage in output channels. The gain-gpios property is not available to all supported parts. The adi,range-double property indicates that GAIN pin is hardwired to high in case gain-gpios is not set, otherwise it sets the initial value for the gain setting. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: magnetometer: add QST QMC5883L SensorSiratul Islam
Add devicetree binding for the QST QMC5883L 3-Axis Magnetic Sensor connected via I2C. Used enum so that more devices could use this binding Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Siratul Islam <siratul.islam@linux.dev> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: add entry for qstcorpSiratul Islam
Add an entry for QST Corporation Limited Link: https://www.qstcorp.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Siratul Islam <siratul.islam@linux.dev> Link: https://www.qstcorp.com/ Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: adc: hx711: add RATE GPIO propertyPiyush Patle
Document the optional RATE pin GPIO used to select the HX711 output data rate. Update the example to show the property in use. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-30dt-bindings: iio: adc: hx711: add VSUP and DVDD supply propertiesPiyush Patle
Document the optional VSUP supply used by the HX711 on-chip regulator. Also document the DVDD digital supply. DVDD is a board-supplied digital input rail (figure 1 of the datasheet shows it as a separate supply, not merely a bypass capacitor point) that was missing from the original binding. Signed-off-by: Piyush Patle <piyushpatle228@gmail.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@intel.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-29dt-bindings: arm: fsl: add TQMa8MPxS boardPaul Gerber
TQMa8MPxS is a SOM family using NXP i.MX8MP CPU family. MB-SMARC-2 is an evaluation mainbord for this SOM The SOM needs a mainboard, therefore we provide two compatibles here: "tq,imx8mp-<SOM>" for the module and "tq,imx8mp-<SOM>-<SBC>" Signed-off-by: Paul Gerber <paul.gerber@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-29dt-bindings: soc: imx: fsl,imx93-media-blk-ctrl: Allow LVDS Display Bridge ↵Liu Ying
child node i.MX93 SoC mediamix blk-ctrl contains one LDB_CTRL register and one LVDS register which control video output through a LVDS interface. Allow the LVDS Display Bridge(LDB) child node and add the child node to example. i.MX93 LDB child node(bridge@20) is an addressable node, while i.MX93 Parallel Display Format Configuration(PDFC) child node(dpi-bridge) is a non-addressable node. Mixing the addressable and non-addressable child nodes is allowed according to discussion [1]. Link: https://lore.kernel.org/all/n6akxiayi3g6gxcqhreb4iaohmeokoalnqup6h5r2fwdt4zijt@u2wyps55ayqm/ [1] Signed-off-by: Liu Ying <victor.liu@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2026-06-29dt-bindings: iio: frequency: add adf41513Rodrigo Alencar
DT-bindings for ADF41513, an ultralow noise PLL frequency synthesizer that can be used to implement local oscillators (LOs) as high as 26.5 GHz. Some properties are based upon an existing PLL device properties (e.g. ADF4350). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Rodrigo Alencar <rodrigo.alencar@analog.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2026-06-29regulator: dt-bindings: qcom,sdm845-refgen-regulator: Document IPQ9650Kathiravan Thirumoorthy
IPQ9650 has two REFGEN blocks which provide reference current to the PCIe, USB and UNIPHY PHYs. Unlike other supported platforms, IPQ9650 requires the REFGEN clocks to be enabled explicitly. Document the IPQ9650 compatible and the required clocks for it. While at it, move the allOf block after the 'required' property section. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://patch.msgid.link/20260617-ipq9650_refgen-v4-2-c505ea6c6661@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29spi: dt-bindings: st,stm32-qspi: Add power-domains propertyPatrice Chotard
STM32 QSPI may be in a power domain. Allow a single 'power-domains' entry for STM32 QSPI. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260618-add_power_domain_for_qpsi-v1-1-4d7e57bcfb9a@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29ASoC: dt-bindings: mtk-btcvsd-snd: Convert to DT SchemaLuca Leonardo Scorcia
Convert the mtk-btcvsd-snd.txt DT binding to DT Schema format. Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260615185810.11804-1-l.scorcia@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29spi: dt-bindings: octeon: Convert to DT schemaNinad Naik
Convert octeon-3010 to DT schema Signed-off-by: Ninad Naik <ninadnaik07@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260618180149.475658-1-ninadnaik07@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-06-29dt-bindings: clock: Add ESWIN eic7700 HSP clock and reset generatorXuyang Dong
Add bindings for the high-speed peripherals clock and reset generator on the ESWIN EIC7700 HSP. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Xuyang Dong <dongxuyang@eswincomputing.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-06-29dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5Dinh Nguyen
The stmmac hardware on Agilex5 supports 8 TX/RX queue pairs and is dma-coherent. Update the schema to handle the hardware differences between SoC variants. Also make 'interrupts' and 'interrupt-names' as required properties. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- v2: Set the top level interrupts to include the widest contraints(1-17) Just have 1 list of all interrupt-names Update commit message to include 'interrupts' and 'interrupt-names' as required properties Change minItems 1 to maxItems 1 for non agilex5 variants Add same constraint for interrupt-names
2026-06-29dt-bindings: input: sun4i-lradc-keys: Add A100/A133 compatibleAlexander Sverdlin
The Allwinner A100/A133 SoCs have an LRADC which is compatible with the versions in existing SoCs. Add a compatible string for A100, with the R329 fallback. Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260623204824.691832-5-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29dt-bindings: arm: sunxi: Add Baijie HelperBoard A133 compatibleAlexander Sverdlin
Baijie HelperBoard A133 is a development board around their A133 Core board. Introduce a compatible for both the Core and the development boards. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://patch.msgid.link/20260623204824.691832-4-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29dt-bindings: vendor-prefixes: Add Shenzhen Baijie Technology Co., Ltd.Alexander Sverdlin
Shenzhen Baijie Technology Co., Ltd. focuses on R&D and production of embedded products as well as customization of embedded solutions. Link: https://szbaijie.com/ Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Paul Kocialkowski <paulk@sys-base.io> Signed-off-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Link: https://patch.msgid.link/20260623204824.691832-3-alexander.sverdlin@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-06-29dt-bindings: gpu: img,powervr-*: Add maintainer entriesMatt Coster
These entries were previously unaligned with MAINTAINERS, but will be even more so now that entries are being changed there. Bring them in sync by replacing the list here with the updated one from MAINTAINERS. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Binns <frank.binns@imgtec.com> Reviewed-by: Alessio Belle <alessio.belle@imgtec.com> Acked-by: Luigi Santivetti <luigi.santivetti@imgtec.com> Link: https://patch.msgid.link/20260626-maintainer-updates-v2-3-e1b3f246c44c@imgtec.com Signed-off-by: Matt Coster <matt.coster@imgtec.com>
2026-06-29dt-bindings: interrupt-controller: realtek,rtl-intc: Allow 2 interrupt cellsMarkus Stockhausen
The Realtek Otto SoC interrupt controller supports hardware interrupt routing to multiple parent CPU interrupt lines. To utilize this multi-domain support, peripheral devices need a way to explicitly specify their desired parent interrupt line in the device tree. Update the "#interrupt-cells" property to accept either 1 or 2 cells. 1 cell: Specifies the hardware interrupt index, implicitly routing it to the first available parent (maintaining backward compatibility). 2 cells: The first cell specifies the hardware interrupt index and the second cell specifies the targeted parent interrupt index. Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260605211646.2101652-2-markus.stockhausen@gmx.de
2026-06-29dt-bindings: arm: altera: Add Agilex72 SoCFPGA compatible stringsNazim Amirul
Add the SoC and board compatible strings for the Intel SoCFPGA Agilex72 platform. Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2026-06-29dt-bindings: soc: samsung: exynos-sysreg: Add hsi0 for ExynosAutov920Sanghoon Bae
Add hsi0 compatible on samsung,exynos-sysreg To support ExynosAutov920 PCIe settings: - PCIe PHY power control - PLL settings for PCIe - PCIe device direction (RC/EP) Signed-off-by: Sanghoon Bae <sh86.bae@samsung.com> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260610050326.2903402-2-sh86.bae@samsung.com Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-06-29dt-bindings: clock: Add Amlogic A9 AO clock controllerJian Hu
Add the Always-On clock controller dt-bindings for the Amlogic A9 SoC family. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Jian Hu <jian.hu@amlogic.com> Link: https://patch.msgid.link/20260623-a9_aoclk-v5-1-c7cb1ff9ebf1@amlogic.com Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
2026-06-29Merge tag 'v7.2-rc1' of ↵Bartosz Golaszewski
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into gpio/for-next Linux 7.2-rc1
2026-06-28dt-bindings: arm: qcom: sort compatibles alphabetically by base SoCKathiravan Thirumoorthy
The compatible entries in qcom.yaml were not in alphabetical order by their base SoC compatible string (the last const: qcom,* in each block), making the file harder to audit and maintain. Sort the entries for better maintenance. No functional change; reordering only. Assisted-by: Claude:claude-sonnet-4-6 Suggested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260625-reorg_qcom_binding-v1-1-f2c6501f7401@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-28dt-bindings: soc: qcom: smd-rpm: Add Shikra rpm-smd compatibleKomal Bajaj
Add compatible for the Qualcomm Shikra rpm-smd device. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260508-shikra_mailbox_and_rpm_changes-v3-1-698f8e5fb339@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-27Merge tag 'rtc-7.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux Pull RTC updates from Alexandre Belloni: "Most of the work and improvements are for features of the m41t93. The ds1307 also gets support for OSF (Oscillator Stop Flag) for new variants. The pcap driver is being removed as the Motorola EZX support was removed a while ago. Subsystem: - add rtc_read_next_alarm() to read next expiring timer Drivers: - ds1307: handle OSF for ds1337/ds1339/ds3231, add clock provider for ds1307, fix wday for rx8130 - m41t93: DT support, alarm, clock provider, watchdog support - mv: add suspend/resume support for wakeup - pcap: remove driver - renesas-rtca3: many fixes" * tag 'rtc-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux: (36 commits) rtc: ds1307: update reference to removed CONFIG_RTC_DRV_DS1307_HWMON platform/x86: amd-pmc: Fix S0i3 wakeup with alarmtimer rtc: s35390a: fix typo in comment rtc: cmos: unregister HPET IRQ handler on probe failure rtc: ds1307: Fix off-by-one issue with wday for rx8130 dt-bindings: rtc: ds1307: Add epson,rx8901 rtc: bq32000: add delay between RTC reads rtc: m41t93: Add watchdog support rtc: m41t93: Add square wave clock provider support rtc: m41t93: Add alarm support rtc: m41t93: migrate to regmap api for register access rtc: m41t93: add device tree support dt-bindings: rtc: Add ST m41t93 rtc: ds1307: add support for clock provider in ds1307 rtc: mv: add suspend/resume support for wakeup rtc: aspeed: add AST2700 compatible dt-bindings: rtc: add ASPEED AST2700 compatible rtc: interface: fix typos in rtc_handle_legacy_irq() documentation rtc: msc313: fix NULL deref in shared IRQ handler at probe rtc: remove unused pcap driver ...
2026-06-26dt-bindings: input: Document Imagis ISA1200 haptic motor driverSvyatoslav Ryhel
Document the Imagis ISA1200 haptic motor driver, used primarily in mobile handheld devices and capable of supporting up to two motors. The exact datasheet for the ISA1200 is not available; all data was modeled based on available downstream kernel sources for various devices and fragments of information scattered across the internet. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260617070528.35006-2-clamor95@gmail.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2026-06-26Merge tag 'spi-fix-v7.2-merge-window' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A fairly unremarkable collection of fixes that came in over the merge window, plus a new device ID for the DesignWare controller in the StarFive JHB100 SoC. There's a couple of core fixes included, one avoiding freeing an empty resource in error handling cases and another which fixes a NULL dereference which could be triggered by using an abnormal device registration flow like driver_override" * tag 'spi-fix-v7.2-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: imx: reconfigure for PIO when DMA cannot be started spi: dw: Add support for snps,dwc-ssi-2.00a spi: dt-bindings: snps,dw-apb-ssi: Add starfive,jhb100-spi spi: rpc-if: Use correct device for hardware reinitialization on resume spi: acpi: Free resource list at appropriate time spi: dw: fix wrong BAUDR setting after resume spi: uniphier: Fix completion initialization order before devm_request_irq() spi: Add NULL check for spi_get_device_id() in spi_get_device_match_data()
2026-06-26Merge tag 'devicetree-fixes-for-7.2-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Drop unnecessary type reference from khadas,mcu "fan-supply" - Fix clocks in Renesas R-Mobile APE6 example - Add missing Unisoc SC2730 PMIC regulators schema - Fix Amlogic thermal example - kernel-doc fix for of_map_id() - Handle negative index in of_fwnode_get_reference_args() * tag 'devicetree-fixes-for-7.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: mfd: khadas,mcu: Drop type reference from "fan-supply" dt-bindings: clock: renesas: div6: Use ZT/ZTR trace clock in R-Mobile APE6 example regulator: dt-bindings: Add Unisoc SC2730 PMIC dt-bindings: thermal: amlogic: Correct 'reg' in the example dt-bindings: thermal: amlogic: Fix missing header in the example of: Fix RST inline emphasis warnings in of_map_id() kernel-doc of: property: Fix of_fwnode_get_reference_args() with negative index
2026-06-26dt-bindings: gpio: realtek: Add realtek,rtd1625-gpioTzuyi Chang
Add the device tree bindings for the Realtek DHC (Digital Home Center) RTD1625 GPIO controllers. The RTD1625 GPIO controller features a per-pin register architecture that differs significantly from previous generations. It utilizes separate register blocks for GPIO configuration and interrupt control. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Tzuyi Chang <tychang@realtek.com> Signed-off-by: Yu-Chun Lin <eleanor.lin@realtek.com> Link: https://patch.msgid.link/20260622092335.1166876-2-eleanor.lin@realtek.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-30 23:55:51 +0000