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2025-01-03Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.13-rc6). No conflicts. Adjacent changes: include/linux/if_vlan.h f91a5b808938 ("af_packet: fix vlan_get_protocol_dgram() vs MSG_PEEK") 3f330db30638 ("net: reformat kdoc return statements") Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-01-03dt-bindings: mfd: mediatek: mt6397: Add bindings for MT6328Yassine Oudjana
Add compatible strings for the MT6328 PMIC. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241018081050.23592-3-y.oudjana@protonmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-03docs: dt: unittest: Correct SELFTEST to UNITTESTDirk Behme
The Kconfig switch is CONFIG_OF_UNITTEST. Not OF_SELFTEST. Correct this. While at it replace the outdated file list with a link to the directory as proposed by Rob Herring. Cc: Gaurav Minocha <gaurav.minocha.os@gmail.com> Cc: Rob Herring <robh@kernel.org> Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Link: https://lore.kernel.org/r/20241029054042.958775-1-dirk.behme@de.bosch.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-01-03Merge tag 'renesas-r9a09g047-dt-binding-defs-tag2' into renesas-dts-for-v6.14Geert Uytterhoeven
Renesas RZ/G3E Pin Control DT Binding Definitions Pin control DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files.
2025-01-03dt-bindings: pinctrl: renesas: Document RZ/G3E SoCBiju Das
Add documentation for the pin controller found on the Renesas RZ/G3E (R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has more pins(P00-PS3). Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241216195325.164212-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-01-03Merge remote-tracking branch 'pm/opp/linux-next' into HEADRob Clark
Merge pm/opp tree to get dev_pm_opp_get_bw() Signed-off-by: Rob Clark <robdclark@chromium.org>
2025-01-03Merge tag 'drm-misc-fixes-2025-01-02' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-fixes drm-misc-fixes for v6.13-rc6: - Only fixes for adv7511 driver, including a use-after-free. Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/f58429b7-5f11-4b78-b577-de32b41299ea@linux.intel.com
2025-01-02dt-bindings: vendor-prefixes: add SiflowerChuanhong Guo
Shanghai Siflower Communication Co. is a manufacturer for home router SoCs. Add a vendor prefix for it. Link: http://www.siflower.com.cn/en Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241223034350.215375-1-gch981213@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-30dt-bindings: display: mediatek: dp: Reference common DAI propertiesFei Shao
The MediaTek DP hardware supports audio and exposes a DAI, so the '#sound-dai-cells' property is needed for describing the DAI links. Reference the dai-common.yaml schema to allow '#sound-dai-cells' to be used, and filter out non-DP compatibles as MediaTek eDP in the same binding doesn't support audio. This fixes dtbs_check error: '#sound-dai-cells' does not match any of the regexes: 'pinctrl-[0-9]+' Signed-off-by: Fei Shao <fshao@chromium.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patchwork.kernel.org/project/dri-devel/patch/20241105090207.3892242-1-fshao@chromium.org/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2024-12-30dt-bindings: nvmem: qfprom: Add compatible for QCS8300Jingyi Wang
Document QFPROM compatible for Qualcomm QCS8300. It provides access functions for QFPROM data to rest of the drivers via nvmem interface. Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-12-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: Add compatible for IPQ5424Manikanta Mylavarapu
Document the QFPROM block found on IPQ5424 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-11-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: Add compatible for MS8917Barnabás Czémán
Document the QFPROM block found on MSM8917. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-10-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30dt-bindings: nvmem: rmem: Add mobileye,eyeq5-bootloader-configThéo Lebrun
On Mobileye EyeQ5, the bootloader will put MAC addresses into memory. Declare that as reserved memory to be used by the kernel, exposing nvmem cells. That region has a 12-byte header and a 4-byte trailing CRC. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20241230143035.265518-3-srinivas.kandagatla@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-30Merge branch 'for-v6.14/dt-bindings-clk-samsung' into next/dt64Krzysztof Kozlowski
2024-12-30dt-bindings: cros-ec: Remove google,cros-kbd-led-backlightTzung-Bi Shih
After applying 4c03a44e2668 ("arm64: dts: mediatek: mt8195-cherry: Remove keyboard-backlight node"), there are no users for using the OF match. Instead, the device is added via drivers/mfd/cros_ec_dev.c by 970c3a6b7aa3 ("mfd: cros_ec: Register keyboard backlight subdevice"). Remove the DT bindings. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20241206031405.1711996-3-tzungbi@kernel.org Signed-off-by: Tzung-Bi Shih <tzungbi@kernel.org>
2024-12-28dt-bindings: iio: accel: adxl345: add interrupt-namesLothar Rubusch
Add interrupt-names INT1 and INT2 for the two interrupt lines of the sensor. When one of the two interrupt lines is connected, the interrupt as its interrupt-name, need to be declared in the devicetree. The driver then configures the sensor to indicate its events on either INT1 or INT2. If no interrupt is configured, then no interrupt-name should be configured, and vice versa. In this case the sensor runs in FIFO BYPASS mode. This allows sensor measurements, but none of the sensor events. Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20241225181338.69672-4-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: accel: adxl345: make interrupts not a required propertyLothar Rubusch
Remove interrupts from the list of required properties. The ADXL345 does not need interrupts for basic accelerometer functionality. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lothar Rubusch <l.rubusch@gmail.com> Link: https://patch.msgid.link/20241225181338.69672-3-l.rubusch@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi323: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-4-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi270: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Reviewed-by: Alex Lanzano <lanzano.alex@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-3-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: imu: bmi160: add boolean type for drive-open-drainVasileios Amoiridis
Add missing type description "boolean" for the drive-open-drain property. Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241219234745.58723-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: Add ROHM BD79703Matti Vaittinen
The ROHM BD79703 is a 8-bit, 6 channel DAC. Describe the dt-bindings. Signed-off-by: Matti Vaittinen <mazziesaccount@gmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/51ed31c494ea7385940b59500e8592d12558e291.1734608215.git.mazziesaccount@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: light: Document TI OPT4060 RGBW sensorPer-Daniel Olsson
Add devicetree bindings for the OPT4060 RGBW color sensor. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Per-Daniel Olsson <perdaniel.olsson@axis.com> Link: https://patch.msgid.link/20241218104836.2784523-2-perdaniel.olsson@axis.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-28dt-bindings: iio: pressure: bmp085: Add SPI interfaceVasileios Amoiridis
The BMP{2,3,5}80 and BME280 devices have an SPI interface, so include it in the device-tree. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241209233845.29539-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-27dt-bindings: pinctrl: Add rk3562 pinctrl supportKever Yang
Add the compatible string for the rk3562 SoC. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/20241224093522.3815562-1-kever.yang@rock-chips.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-27dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindingsKrishna Kurapati
Update dt-bindings to add primary controller of QCS615 to USB DWC3 controller list. Although this controller has a QUSB2 Phy, it belongs to a generation of SoCs like SDM670/SDM845/SM6350 where DP/DM is used for wakeup instead of qusb2_phy interrupt. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241224084621.4139021-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-27dt-bindings: pinctrl: add binding for MT7988 SoCFrank Wunderlich
This adds bindings for MT7988 pinctrl driver. Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/20241217085435.9586-4-linux@fw-web.de Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-26dt-bindings: arm: qcom: Document Huawei Matebook E Go (sc8280xp)Pengyu Luo
Add compatible for the SC8280XP-based Huawei Matebook E Go, using its codename, gaokun3, which means it is the 3rd gen gaokun. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Link: https://lore.kernel.org/r/20241220160530.444864-2-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add Xiaomi Redmi 5ABarnabás Czémán
Document Xiaomi Remi 5A (riva). Add qcom,msm8917 for msm-id, board-id allow-list. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20241221-msm8917-v11-3-901a74db4805@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add Microsoft Windows Dev Kit 2023Jens Glathe
Add compatible values for the Microsoft Windows Dev Kit (WDK2023) with its codename "blackrock". The Dev kit is a small desktop box based on the mainboard of the Surface pro 9 5G, intended for developers to test/build arm64-based Windows software. Link: https://learn.microsoft.com/en-us/windows/arm/dev-kit/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-jg-blackrock-for-upstream-v9-1-385bb46ca122@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: arm: qcom: Add HP Omnibook X 14Jens Glathe
Add compatible values for the HP Omnibook X Laptop 14-fe0750ng, using "hp,omnibook-x14" The laptop is based on the Snapdragon X Elite (x1e80100) SoC. PDF link: https://www8.hp.com/h20195/V2/GetPDF.aspx/c08989140 Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Link: https://lore.kernel.org/r/20241202-hp-omnibook-x14-v3-1-0fcd96483723@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26dt-bindings: soc: ti: pruss: Add clocks for ICSSGMD Danish Anwar
The ICSSG module has 7 clocks for each instance. These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK, ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK These clocks are described in AM64x TRM Section 6.4.3 Table 6-398. Add these clocks to the dt binding of ICSSG. Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM) Signed-off-by: MD Danish Anwar <danishanwar@ti.com> Reviewed-by: Roger Quadros <rogerq@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241113110955.3876045-2-danishanwar@ti.com Signed-off-by: Nishanth Menon <nm@ti.com>
2024-12-26Merge tag 'sound-6.13-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound Pull sound fixes from Takashi Iwai: "A collection of small fixes. Nothing really stands out, fortunately. - Follow-up fixes for the new compress offload API extension - A few ASoC SOF, AMD and Mediatek quirks and fixes - A regression fix in legacy SH driver cleanup - Fix DMA mapping error handling in the helper code - Fix kselftest dependency" * tag 'sound-6.13-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: ALSA: sh: Fix wrong argument order for copy_from_iter() selftests/alsa: Fix circular dependency involving global-timer ALSA: memalloc: prefer dma_mapping_error() over explicit address checking ALSA: compress_offload: improve file descriptors installation for dma-buf ALSA: compress_offload: use safe list iteration in snd_compr_task_seq() ALSA: compress_offload: avoid 64-bit get_user() ALSA: compress_offload: import DMA_BUF namespace ASoC: mediatek: disable buffer pre-allocation ASoC: rt722: add delay time to wait for the calibration procedure ASoC: SOF: Intel: hda-dai: Do not release the link DMA on STOP ASoC: dt-bindings: realtek,rt5645: Fix CPVDD voltage comment ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21QA and 21QB ASoC: Intel: sof_sdw: Fix DMI match for Lenovo 21Q6 and 21Q7 ASoC: amd: ps: Fix for enabling DMIC on acp63 platform via _DSD entry
2024-12-25dt-bindings: clock: qcom-rpmhcc: Add RPMHCC bindings for QCS615Taniya Das
Add bindings and update documentation for clock rpmh driver on QCS615 SoCs. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Link: https://lore.kernel.org/r/20241022-qcs615-clock-driver-v4-1-3d716ad0d987@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: clock: qcom,x1e80100-gcc: Add X1P42100Konrad Dybcio
X1P42100 is based on X1E80100 and largely reuses the X1E80100's GCC block, adding a couple wires here and there. Add a compatible for the X1P4 with a fallback to X1E80100. There are some additions in the smaller one, that will be added in the future. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-1-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25Merge branch '20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com' ↵Bjorn Andersson
into clk-for-6.14 Merge the X1P42100 GPUCC binding through a topic branch to make available for the DeviceTree branch as well.
2024-12-25dt-bindings: clock: qcom,x1e80100-gpucc: Extend for X1P42100Konrad Dybcio
To make it easier for X1P4 and X1E to share a common device tree base, extend the existing latter's GPUCC bindings and reuse them on the former platform. While not in the same file, it only makes sense to introduce the new compatible in this commit as well. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241221-topic-x1p4_clk-v1-2-dbaeccb74884@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: arm: qcom: Add X1P42100 SoC & CRDKonrad Dybcio
The X1 family is split into two parts: the 10- and 12-core parts are variants of the same silicon with different fusing, whereas the 8-core ones are a separate design. Thankfully, the software interface is only barely different, letting us reuse much of the existing X1 work. Add X1P42100 SoC (and the CRD based on it) as a representative of the 8-core series. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-2-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: arm: qcom-soc: Extend X1E prefix match for X1PKonrad Dybcio
The X1 series includes SoCs like X1P42100. Extend the pattern x1e match to x1[ep] to also include these. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20241221-topic-x1p4_soc-v1-1-55347831d73c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-25dt-bindings: phy: qcom,qmp-pcie: document the SM8350 two lanes PCIe PHYNeil Armstrong
Document the two lanes PCIe PHY found on SM8350 SoCs along the already documented single lane PCIe PHY. This fixes: /soc@0/phy@1c0e000: failed to match any schema with compatible: ['qcom,sm8350-qmp-gen3x2-pcie-phy'] Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241204-topic-misc-sm8350-pcie-bindings-fix-v1-1-e8eaff1699d7@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-25dt-bindings: phy: qcom,ipq8074-qmp-pcie: Document the IPQ5424 QMP PCIe PHYsManikanta Mylavarapu
Document the PCIe phy on the IPQ5424 platform using the IPQ9574 bindings as a fallback, since the PCIe phy on the IPQ5424 is similar to IPQ9574. Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241213134950.234946-3-quic_mmanikan@quicinc.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: display: msm: dp: update maintainer entryAbhinav Kumar
Add myself as maintainer for dp controller yaml as to support review of the incoming changes. Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/626921/ Link: https://lore.kernel.org/r/20241202-dp_mst_bindings-v1-4-9a9a43b0624a@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-24dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindingsKrishna Kurapati
Update dt-bindings to add primary controller of QCS615 to USB DWC3 controller list. Although this controller has a QUSB2 Phy, it belongs to a generation of SoCs like SDM670/SDM845/SM6350 where DP/DM is used for wakeup instead of qusb2_phy interrupt. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241224084621.4139021-2-krishna.kurapati@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: mtd: cadence: convert cadence-nand-controller.txt to yamlNiravkumar L Rabara
Convert cadence-nand-controller.txt to yaml format. Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindingsHui-Ping Chen
Add dt-bindings for the Nuvoton MA35 SoC NAND Controller. Signed-off-by: Hui-Ping Chen <hpchen0nvt@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2024-12-24dt-bindings: dma: atmel: Convert to json schemaCharan Pedumuru
Convert old text based binding to json schema. Changes during conversion: - Add the required properties `clock` and `clock-names`, which were missing in the original binding. - Add a fallback for `microchip,sam9x7-dma` and `microchip,sam9x60-dma` as they are compatible with the dma IP core on `atmel,sama5d4-dma`. - Update examples and include appropriate file directives to resolve errors identified by `dt_binding_check` and `dtbs_check`. Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241205-xdma-v1-1-76a4a44670b5@microchip.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: st-stm32-dmamux: Add description for dma-cell valuesKen Sloat
The dma-cell values for the stm32-dmamux are used to craft the DMA spec for the actual controller. These values are currently undocumented leaving the user to reverse engineer the driver in order to determine their meaning. Add a basic description, while avoiding duplicating information by pointing the user to the associated DMA docs that describe the fields in depth. Signed-off-by: Ken Sloat <ksloat@cornersoftsolutions.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20241206115018.1155149-1-ksloat@cornersoftsolutions.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: adi,axi-dmac: deprecate adi,channels nodeDavid Lechner
Deprecate the adi,channels node in the adi,axi-dmac binding. Prior to IP version 4.3.a, this information was required. Since then, there are memory-mapped registers that can be read to get the same information. Acked-by: Nuno Sa <nuno.sa@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20241216-axi-dma-dt-yaml-v3-2-7b994710c43f@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: adi,axi-dmac: convert to yaml schemaDavid Lechner
Convert the AXI DMAC bindings from .txt to .yaml. Acked-by: Nuno Sa <nuno.sa@analog.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20241216-axi-dma-dt-yaml-v3-1-7b994710c43f@baylibre.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: Support channel page to nvidia,tegra210-admaMohan Kumar D
Multiple ADMA Channel page hardware support has been added from TEGRA186 and onwards. Update the DT binding to use any of the ADMA channel page address space region. Signed-off-by: Mohan Kumar D <mkumard@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241217074358.340180-2-mkumard@nvidia.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-12-24dt-bindings: dma: ti: k3-bcdma: Add J722S CSI BCDMAVaishnav Achath
J722S CSI BCDMA is similar to J721S2 CSI BCDMA and supports both RX and TX channels but has a different PSIL thread base ID which is currently handled in k3-udma driver. Add an entry for J722S CSIRX BCDMA. Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241127101627.617537-2-vaishnav.a@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-23 03:34:47 +0000