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2024-12-17dt-bindings: power: Convert raspberrypi,bcm2835-power to Dt schemaKaran Sanghavi
Convert the raspberrypi,bcm2835-power binding to Dt schema Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Karan Sanghavi <karansanghvi98@gmail.com> Link: https://lore.kernel.org/r/20241216-raspberrypi-bcm2835-power-v5-1-222fc244132b@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-17dt-bindings: pinctrl: qcom: update spi0 functionManikanta Mylavarapu
The GPIO configuration differs for the spi0 clk, cs, miso, mosi pins. Therefore, split the spi0 pin group and document each pin function. Fixes: b88752d3133b ("dt-bindings: pinctrl: qcom: add IPQ5424 pinctrl") Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> Link: https://lore.kernel.org/20241217091308.3253897-2-quic_mmanikan@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-17dt-bindings: clock: Add SAMA7D65 PMC compatible stringDharma Balasubiramani
Add the `microchip,sama7d65-pmc` compatible string to the existing binding, since the SAMA7D65 PMC shares the same properties and clock requirements as the SAMA7G5. Export MCK3 and MCK5 to be accessed and referenced in DT to assign to the clocks property for sama7d65 SoC. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/5252a28531deaee67af1edd8e72d45ca57783464.1733505542.git.Ryan.Wanner@microchip.com [claudiu.beznea: use tabs instead of spaces in include/dt-bindings/clock/at91.h] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-17dt-bindings: clocks: atmel,at91sam9x5-sckc: add sama7d65Dharma Balasubiramani
Add bindings for SAMA7D65's slow clock controller. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/b7a8a22a571f6fc2be56a25f26757f37fa8d2bb3.1733505542.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-17dt-bindings: atmel-sysreg: add sama7d65 RAM and PITDharma Balasubiramani
Add SAMA7D65 RAM controller, PIT64 DT bindings. Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/96e64f01eee264ad0ac4c720a7a1cab4f95c206b.1733505542.git.Ryan.Wanner@microchip.com [claudiu.beznea: add missing space] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-17dt-bindings: ARM: at91: Document Microchip SAMA7D65 CuriosityRomain Sioen
Document device tree binding of the Microchip SAMA7D65 Curiosity board. Signed-off-by: Romain Sioen <romain.sioen@microchip.com> Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com> Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Link: https://lore.kernel.org/r/d5a22763a2081daa0d2155e2c05b7dc0eb468610.1733505542.git.Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2024-12-16dt-bindings: net: wireless: Describe ath12k PCI module with WSIRaj Kumar Bhagat
The QCN9274 WiFi device supports WSI (WLAN Serial Interface). WSI is used to exchange specific control information across radios using a doorbell mechanism. This WSI connection is essential for exchanging control information among these devices. The WSI interface in the QCN9274 includes TX and RX ports, which are used to connect multiple WSI-supported devices together, forming a WSI group. Describe QCN9274 PCI wifi device with WSI interface. Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241211153432.775335-2-kvalo@kernel.org Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>
2024-12-16dt-bindings: timer: fsl,imxgpt: Document fsl,imx35-gptFabio Estevam
The i.MX35 General Purpose Timer is compatible with i.MX31. Document the fsl,imx35-gpt compatible. This fixes the following dt-schema warning: timer@53f90000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx35-gpt', 'fsl,imx31-gpt'] is too long 'fsl,imx1-gpt' was expected 'fsl,imx21-gpt' was expected 'fsl,imx27-gpt' was expected 'fsl,imx31-gpt' was expected 'fsl,imx35-gpt' is not one of ['fsl,imx25-gpt', 'fsl,imx50-gpt', 'fsl,imx51-gpt', 'fsl,imx53-gpt', 'fsl,imx6q-gpt'] 'fsl,imx6dl-gpt' was expected 'fsl,imx35-gpt' is not one of ['fsl,imx6sl-gpt', 'fsl,imx6sx-gpt', 'fsl,imx8mp-gpt', 'fsl,imxrt1050-gpt', 'fsl,imxrt1170-gpt'] 'fsl,imx35-gpt' is not one of ['fsl,imx6ul-gpt', 'fsl,imx7d-gpt'] 'fsl,imx6sx-gpt' was expected Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241202132147.587799-2-festevam@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-16dt-bindings: timer: fsl,imxgpt: Fix the fsl,imx7d-gpt fallbackFabio Estevam
imx7s.dtsi correctly describes the GPT node as: compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; Document the fallback compatible to be "fsl,imx6dl-gpt" in the bindings. This fixes the following dt-schema warnings: timer@302f0000: compatible: 'oneOf' conditional failed, one must be fixed: ['fsl,imx7d-gpt', 'fsl,imx6dl-gpt'] is too long 'fsl,imx1-gpt' was expected 'fsl,imx21-gpt' was expected 'fsl,imx27-gpt' was expected 'fsl,imx31-gpt' was expected 'fsl,imx7d-gpt' is not one of ['fsl,imx25-gpt', 'fsl,imx50-gpt', 'fsl,imx51-gpt', 'fsl,imx53-gpt', 'fsl,imx6q-gpt'] 'fsl,imx6dl-gpt' was expected 'fsl,imx7d-gpt' is not one of ['fsl,imx6sl-gpt', 'fsl,imx6sx-gpt', 'fsl,imx8mp-gpt', 'fsl,imxrt1050-gpt', 'fsl,imxrt1170-gpt'] 'fsl,imx6sx-gpt' was expected Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241202132147.587799-1-festevam@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2024-12-16Merge tag 'iio-fixes-for-6.13a' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-linus Jonathan writes: IIO: 1st set of fixes for 6.13 cycle. The usual mixed back of fixes for ancient and recent bugs A number of these were from an audit by Javier Carrasco of places we may leak stack data via holes in structures passed to userspace that were not explicitly zeroed. Very helpful effort after we found a similar bug in review of new code. This affected: - dummy driver - kionix,kmx61 - murrata,zpa2326 - rockchip,saradc - rohm,bh1745 - veml,vcnl4035 - ti,ads1119 - ti,ads8688 - ti,tmp0006 Other fixes: core,inkern - Underflow fo reference count issue in error path of iio_channel_get_all() for devices we haven't yet gotten. tests - Kconfig typo fix so it's possible to tell what test is being enabled. - Check for allocation failures. adi,ad4695 - Ensure timing requirement wrt to final clock edge vs next conversion signal are met by adding an additional SPI transfer. adi,ad7124 - Ensure channels are disabled at probe to avoid wrong data if channel 0 is not the first one read. adi,ad7173 - Fix handing of multiple devices by not editing a single static structure and instead making a per instance copy. adi,ad9467 - Fix handing of multiple devices by not editing a single static structure and instead making a per instance copy. adi,ad9832 - Off by one error on input verification for phase control adi,ad9834 - Off by one error on input verification for phase control. atmel,at91 - In an error path don't use a variable that hasn't been initialized yet. invensense,icm42600 - SPI burst write does not work for some icm426000 chips, disable it. - Ensure correct handling of timestamps after resume. st,sensors - Add back accidentally dropped IIS2MDC compatible in binding doc. st,stm32-dfsdm: - label property was accidentally made a required property. Make it optional again to fix use of older DT. ti,ads1119 - Use a fixed size for the channel data rather than an integer, bringing the code inline with the advertised 16 bit channel size and avoiding userspace misinterpreting the data. ti,ads124s08 - Use _cansleep gpio calls as no reason to prevent sleeping and it was stopping a new board design working (trivial fix). ti,ads1298 - Add a check on failure of devm_kasprintf() * tag 'iio-fixes-for-6.13a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (27 commits) iio: adc: ti-ads1119: fix sample size in scan struct for triggered buffer iio: temperature: tmp006: fix information leak in triggered buffer iio: inkern: call iio_device_put() only on mapped devices iio: adc: ad9467: Fix the "don't allow reading vref if not available" case iio: adc: at91: call input_free_device() on allocated iio_dev iio: adc: ad7173: fix using shared static info struct iio: adc: ti-ads124s08: Use gpiod_set_value_cansleep() iio: adc: ti-ads1119: fix information leak in triggered buffer iio: pressure: zpa2326: fix information leak in triggered buffer iio: adc: rockchip_saradc: fix information leak in triggered buffer iio: imu: kmx61: fix information leak in triggered buffer iio: light: vcnl4035: fix information leak in triggered buffer iio: light: bh1745: fix information leak in triggered buffer iio: adc: ti-ads8688: fix information leak in triggered buffer iio: dummy: iio_simply_dummy_buffer: fix information leak in triggered buffer iio: test: Fix GTS test config dt-bindings: iio: st-sensors: Re-add IIS2MDC magnetometer iio: adc: ti-ads1298: Add NULL check in ads1298_init iio: adc: stm32-dfsdm: handle label as an optional property iio: adc: ad4695: fix buffered read, single sample timings ...
2024-12-16Merge 6.13-rc3 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-16Merge 6.13-rc3 into tty-nextGreg Kroah-Hartman
We need the serial fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2024-12-16ASoC: dt-bindings: realtek,rt5645: Fix CPVDD voltage commentChen-Yu Tsai
Both the ALC5645 and ALC5650 datasheets specify a recommended voltage of 1.8V for CPVDD, not 3.5V. Fix the comment. Cc: Matthias Brugger <matthias.bgg@gmail.com> Fixes: 26aa19174f0d ("ASoC: dt-bindings: rt5645: add suppliers") Fixes: 83d43ab0a1cb ("ASoC: dt-bindings: realtek,rt5645: Convert to dtschema") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20241211035403.4157760-1-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-12-16dt-bindings: pinctrl: qcom: Add MSM8917 pinctrlBarnabás Czémán
Add device tree bindings documentation for Qualcomm MSM8917 pinctrl driver. Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/20241215-msm8917-v9-2-bacaa26f3eef@mainlining.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-16dt-bindings: gpio: brcmstb: permit gpio-line-names propertyDave Stevenson
gpio-line-names is a generic property that can be supported by any GPIO controller, so permit it through the binding. It is permitted to have a variable number of GPIOs per node based on brcm,gpio-bank-widths, so define an arbitrary maximum number of items based on current users. Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241212-dt-bcm2712-fixes-v3-3-44a7f3390331@raspberrypi.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2024-12-15dt-bindings: net: dp83822: Add support for GPIO2 clock outputDimitri Fedrau
The GPIO2 pin on the DP83822 can be configured as clock output. Add binding to support this feature. Signed-off-by: Dimitri Fedrau <dimitri.fedrau@liebherr.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2024-12-15dt-bindings: display/msm: Add SM6150 MDSS & DPULi Liu
Document the MDSS and DPU hardware found on the Qualcomm SM6150 platform. Signed-off-by: Li Liu <quic_lliu6@quicinc.com> Signed-off-by: Fange Zhang <quic_fangez@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/628003/ Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-3-2d875a67602d@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-15dt-bindings: display/msm: dsi-controller-main: Document SM6150Li Liu
Document general compatibility of the DSI controller on SM6150. Signed-off-by: Li Liu <quic_lliu6@quicinc.com> Signed-off-by: Fange Zhang <quic_fangez@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/628002/ Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-2-2d875a67602d@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-15dt-bindings: display/msm: Add SM6150 DSI phyLi Liu
Add new compatible for SM6150 with dsi_phy_14nm_36mA_regulators Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Li Liu <quic_lliu6@quicinc.com> Signed-off-by: Fange Zhang <quic_fangez@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/627999/ Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-1-2d875a67602d@quicinc.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
2024-12-14Merge tag 'usb-6.13-rc3' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB driver fixes from Greg KH: "Here are some small USB driver fixes for some reported issues. Included in here are: - typec driver bugfixes - u_serial gadget driver bugfix for much reported and discussed issue - dwc2 bugfixes - midi gadget driver bugfix - ehci-hcd driver bugfix - other small bugfixes All of these have been in linux-next for over a week with no reported issues" * tag 'usb-6.13-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: usb: typec: ucsi: Fix connector status writing past buffer size usb: typec: ucsi: Fix completion notifications usb: dwc2: Fix HCD port connection race usb: dwc2: hcd: Fix GetPortStatus & SetPortFeature usb: dwc2: Fix HCD resume usb: gadget: u_serial: Fix the issue that gs_start_io crashed due to accessing null pointer usb: misc: onboard_usb_dev: skip suspend/resume sequence for USB5744 SMBus support usb: dwc3: xilinx: make sure pipe clock is deselected in usb2 only mode usb: core: hcd: only check primary hcd skip_phy_initialization usb: gadget: midi2: Fix interpretation of is_midi1 bits usb: dwc3: imx8mp: fix software node kernel dump usb: typec: anx7411: fix OF node reference leaks in anx7411_typec_switch_probe() usb: typec: anx7411: fix fwnode_handle reference leak usb: host: max3421-hcd: Correctly abort a USB request. dt-bindings: phy: imx8mq-usb: correct reference to usb-switch.yaml usb: ehci-hcd: fix call balance of clocks handling routines
2024-12-14dt-bindings: clock: samsung: Add Exynos990 SoC CMU bindingsIgor Belwon
Add dt-schema documentation for the Exynos990 SoC CMU. This clock management unit has a topmost block (CMU_TOP) that generates top clocks for other blocks. Currently the only other block implemented is CMU_HSI0, which provides clocks for the USB part of the SoC. Also, device-tree binding definitions added for these blocks: - CMU_TOP - CMU_HSI0 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241209-exynos990-cmu-v4-1-57f07080f9e4@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-13dt-bindings: power: supply: ltc4162-l-charger: Add ltc4162-f/s and ltc4015Kim Seer Paller
Add LTC4162-F/S and LTC4015 to the supported devices of LTC4162-L. They share a common set of registers. The only differences lie in the resolution value of the scaling factor for battery voltage and battery current measurement, input voltage, and input current for different battery chemistries. The differences also include the calculation of setting and getting the actual voltage applied to the charge voltage, as well as getting the die temperature. This add compatible entries for ltc4162-f/s and ltc4015 and include datasheets for new devices. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Kim Seer Paller <kimseer.paller@analog.com> Link: https://lore.kernel.org/r/20241213023746.34168-2-kimseer.paller@analog.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2024-12-13dt-bindings: arm: blaize: Add Blaize BLZP1600 SoCNikolaos Pasaloukos
Add device tree bindings for the Blaize BLZP1600 CB2 development board (carrier board). This board integrates a Blaize BLZP1600 SoM (System on Module) which is based on the Blaize BLZP1600 SoC. The Blaize BLZP1600 SoC integrates a dual core ARM Cortex A53 cluster and a Blaize Graph Streaming Processor for AI and ML workloads, plus a suite of connectivity and other peripherals. Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com> Reviewed-by: Matt Redfearn <matt.redfearn@blaize.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-13dt-bindings: Add Blaize vendor prefixNikolaos Pasaloukos
Blaize, Inc. (www.blaize.com) is a SoC manufacturer with integrated programmable Graph-Streaming-Processors for AI and ML. Signed-off-by: Nikolaos Pasaloukos <nikolaos.pasaloukos@blaize.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-12-13dt-bindings: arm: qcom,coresight-static-replicator: Add property for source ↵Tao Zhang
filtering The is some "magic" hard coded filtering in the replicators, which only passes through trace from a particular "source". Add a new property "filter-source" to label a phandle to the coresight trace source device matching the hard coded filtering for the port. Signed-off-by: Tao Zhang <quic_taozha@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20241213100731.25914-2-quic_taozha@quicinc.com
2024-12-13Merge tag 'renesas-r9a09g047-dt-binding-defs-tag1' into renesas-dts-for-v6.14Geert Uytterhoeven
Renesas RZ/G3E DT Binding Definitions DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047) SoC, shared by driver and DT source files.
2024-12-13dt-bindings: clock: renesas: Document RZ/G3E SoC CPGBiju Das
Document the device tree bindings for the Renesas RZ/G3E SoC Clock Pulse Generator (CPG). Also define constants for the core clocks of the RZ/G3E SoC. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-5-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13dt-bindings: soc: renesas: Document RZ/G3E SMARC SoM and Carrier-II EVKBiju Das
Document the Renesas RZ/G3E SMARC Carrier-II EVK board which is based on the Renesas RZ/G3E SMARC SoM. The RZ/G3E SMARC Carrier-II EVK consists of an RZ/G3E SoM module and a SMARC Carrier-II carrier board. The SoM module sits on top of the carrier board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-4-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13dt-bindings: soc: renesas: Document Renesas RZ/G3E SoC variantsBiju Das
Document Renesas RZ/G3E (R9A09G047) SoC variants. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20241203105005.103927-3-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13dt-bindings: display: simple: Document Multi-Inno Technology MI0700A2T-30 panelMarek Vasut
Add Multi-Inno Technology MI0700A2T-30 7" 800x480 LVDS panel compatible string. Signed-off-by: Marek Vasut <marex@denx.de> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20241125013413.160725-1-marex@denx.de Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241125013413.160725-1-marex@denx.de
2024-12-13dt-bindings: display: panel-lvds: Add compatible for AUO G084SN05 V9Fabio Estevam
The AUO G084SN05 V9 is an 8.4" 800x600 LVDS display. Add a compatible entry for this LVDS display model. Signed-off-by: Fabio Estevam <festevam@denx.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241210105705.116116-1-festevam@gmail.com Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20241210105705.116116-1-festevam@gmail.com
2024-12-13dt-bindings: arm: aspeed: add IBM SBP1 boardNaresh Solanki
Document the new compatibles used on IBM SBP1. Signed-off-by: Naresh Solanki <naresh.solanki@9elements.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241104092220.2268805-1-naresh.solanki@9elements.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13dt-bindings: arm: aspeed: add Mt. Jefferson boardChanh Nguyen
Document Ampere's Mt. Jefferson BMC board compatible. Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20241021083702.9734-2-chanh@os.amperecomputing.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-12-13dt-bindings: power: reset: atmel,sama5d2-shdwc: add sam9x7Varshini Rajendran
Add shutdown controller DT bindings. Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241010120425.93102-1-varshini.rajendran@microchip.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2024-12-13Merge tag 'drm-misc-next-2024-12-05' of ↵Dave Airlie
https://gitlab.freedesktop.org/drm/misc/kernel into drm-next [airlied: handle module ns conflict] drm-misc-next for 6.14: UAPI Changes: Cross-subsystem Changes: Core Changes: - Remove driver date from drm_driver Driver Changes: - amdxdna: New driver! - ivpu: Fix qemu crash when using passthrough - nouveau: expose GSP-RM logging buffers via debugfs - panfrost: Add MT8188 Mali-G57 MC3 support - panthor: misc improvements, - rockchip: Gamma LUT support - tidss: Misc improvements - virtio: convert to helpers, add prime support for scanout buffers - v3d: Add DRM_IOCTL_V3D_PERFMON_SET_GLOBAL - vc4: Add support for BCM2712 - vkms: Improvements all across the board - panels: - Introduce backlight quirks infrastructure - New panels: KDB KD116N2130B12 Signed-off-by: Dave Airlie <airlied@redhat.com> From: Maxime Ripard <mripard@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20241205-agile-straight-pegasus-aca7f4@houat
2024-12-12Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski
Cross-merge networking fixes after downstream PR (net-6.13-rc3). No conflicts or adjacent changes. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2024-12-12dt-bindings: leds: cznic,turris-omnia-leds: Allow interrupts propertyMarek Behún
Extend the cznic,turris-omnia-leds binding with interrupts property, specifying the global LED brightness changed by button press interrupt. Signed-off-by: Marek Behún <kabel@kernel.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20241111100355.6978-6-kabel@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
2024-12-12dt-bindings: leds: qcom,spmi-flash-led: Add pm660l compatibleRichard Acayan
Add the compatible for the flash LED controller on the PM660L PMIC. Signed-off-by: Richard Acayan <mailingradian@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20241112024050.669578-7-mailingradian@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-12-12dt-bindings: media: add the stm32mp25 compatible of DCMIPPAlain Volmat
Add the stm32mp25 compatible for the DCMIPP. The stm32mp25 distinguish with the stm32mp13 by the fact that: - supports also csi inputs in addition to parallel inputs - requires an addition csi clock to be present Add also access-controllers, an optional property that allows a peripheral to refer to one or more domain access controller(s). Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2024-12-12dt-bindings: media: add description of stm32 csiAlain Volmat
Add the stm32 csi controller description. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Alain Volmat <alain.volmat@foss.st.com> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2024-12-12regulator: dt-bindings: mt6315: Drop regulator-compatible propertyChen-Yu Tsai
The "regulator-compatible" property has been deprecated since 2012 in commit 13511def87b9 ("regulator: deprecate regulator-compatible DT property"), which is so old it's not even mentioned in the converted regulator bindings YAML file. It should not have been used for new submissions such as the MT6315. Drop the property from the MT6315 regulator binding and its examples. Fixes: 977fb5b58469 ("regulator: document binding for MT6315 regulator") Fixes: 6d435a94ba5b ("regulator: mt6315: Enforce regulator-compatible, not name") Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patch.msgid.link/20241211052427.4178367-2-wenst@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-12-12dt-bindings: arm: mediatek: Add MT8186 Chinchou ChromebookZhengqiao Xia
Add an entry for the MT8186 based Chinchou Chromebook, also known as the ASUS Chromebook CZ12 Flip (CZ1204F) and CZ12(CZ1204C). Signed-off-by: Zhengqiao Xia <xiazhengqiao@huaqin.corp-partner.google.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20241212062046.22509-2-xiazhengqiao@huaqin.corp-partner.google.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2024-12-12media: dt-bindings: Add qcom,sc7280-camssVikram Sharma
Add bindings for qcom,sc7280-camss to support the camera subsystem on the SC7280 platform. Signed-off-by: Suresh Vankadara <quic_svankada@quicinc.com> Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com> Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
2024-12-11dt-bindings: clock: qcom,sc7280-lpasscorecc: add top-level constraintsKrzysztof Kozlowski
Properties with variable number of items per each device are expected to have widest constraints in top-level "properties:" block and further customized (narrowed) in "if:then:". Add missing top-level constraints for reg, clocks and clock-names. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240817094605.27185-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-11dt-bindings: clock: qcom,sc7280-lpasscorecc: order properties to match ↵Krzysztof Kozlowski
convention By convention we expect first "compatible", then "reg" and then rest. Order properties to match convention and what is in "required:" block. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240817094605.27185-1-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-11dt-bindings: iio: adc: adi,ad4000: Add PulSARMarcelo Schmitt
Extend the AD4000 series device tree documentation to also describe PulSAR devices. The single-channel series of PulSAR devices is similar to the AD4000 series except PulSAR devices sample at slower rates and don't have a configuration register. Because PulSAR devices don't have a configuration register, they don't support all features of AD4000 devices and thus fewer interfaces are provided to user space. Also, while AD4000 may have their SDI pin connected to SPI host MOSI line, PulSAR SDI pin is never connected to MOSI. Some devices within the PulSAR series are just faster versions of others. >From fastest to slowest, AD7980, AD7988-5, AD7686, AD7685, and AD7988-1 are all 16-bit pseudo-differential pin-for-pin compatible ADCs. Devices that only vary on the sample rate are documented with a common fallback compatible. Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/cc05f1471c409ab38722cd0e80fd5857ff9ce5db.1733147444.git.marcelo.schmitt@analog.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: bosch,bme680: Move from trivial-devices and add suppliesVasileios Amoiridis
Move dt-binding for BME680 out of trivial-devices.yaml and extend it by adding the missing supplies. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Vasileios Amoiridis <vassilisamir@gmail.com> Link: https://patch.msgid.link/20241202192341.33187-2-vassilisamir@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: accel: fxls8962af: add wakeup-source propertySean Nyekjaer
Add a wakeup-source property to the binding to describe whether the wakeup interrupts from the accelerometer can wake the system from suspend. Signed-off-by: Sean Nyekjaer <sean@geanix.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20241203-fxlsdt-v2-1-ef523461b507@geanix.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: adc: adi,ad7{124,173,192,780}: Allow specifications of a ↵Uwe Kleine-König
gpio for irq line For the AD7124 chip and some of its cousins the logical irq line (R̅D̅Y̅) is physically on the same pin as the spi MISO output (DOUT) and so reading a register might trigger an interrupt. For correct operation it's critical that the actual state of the pin can be read to judge if an interrupt event is a real one or just a spurious one triggered by toggling the line in its MISO mode. Allow specification of an "rdy-gpios" property that references a GPIO that can be used for that purpose. While this is typically the same GPIO also used (implicitly) as interrupt source, it is still supposed that the interrupt is specified as before and usual. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/7fc92a8539e55802d514332e70ee836a3ed08b66.1733504533.git.u.kleine-koenig@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2024-12-11dt-bindings: iio: adc: renesas,rzg2l-adc: Document RZ/G3S SoCClaudiu Beznea
Document the ADC IP available on the RZ/G3S SoC. The ADC IP on the RZ/G3S differs slightly from the one found on the RZ/G2L. The identified differences are as follows: - different number of channels (one being used for temperature conversion); consequently, various registers differ; the temperature channel support was not available for the RZ/G2L variant; the #io-channel-cells property was added to be able to request the temperature channel from the thermal driver - different default sampling periods - the RZ/G3S variant lacks the ADVIC register. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Link: https://patch.msgid.link/20241206111337.726244-13-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-23 07:08:29 +0000