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2025-09-05ARM: dts: am33xx-l4: fix UART compatibleBruno Thomsen
Fixes the following dtschema check warning: serial@0 (ti,am3352-uart): compatible: 'oneOf' conditional failed, one must be fixed: ['ti,am3352-uart', 'ti,omap3-uart'] is too long 'ti,am3352-uart' is not one of ['ti,am64-uart', 'ti,j721e-uart'] 'ti,am654-uart' was expected from schema $id: http://devicetree.org/schemas/serial/8250_omap.yaml# Signed-off-by: Bruno Thomsen <bruno.thomsen@gmail.com> Reviewed-by: Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/r/20250721173741.6369-1-bruno.thomsen@gmail.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-09-05ARM: AM33xx: Implement TI advisory 1.0.36 (EMU0/EMU1 pins state on reset)Alexander Sverdlin
There is an issue possible where TI AM33xx SoCs do not boot properly after a reset if EMU0/EMU1 pins were used as GPIO and have been driving low level actively prior to reset [1]. "Advisory 1.0.36 EMU0 and EMU1: Terminals Must be Pulled High Before ICEPick Samples The state of the EMU[1:0] terminals are latched during reset to determine ICEPick boot mode. For normal device operation, these terminals must be pulled up to a valid high logic level ( > VIH min) before ICEPick samples the state of these terminals, which occurs [five CLK_M_OSC clock cycles - 10 ns] after the falling edge of WARMRSTn. Many applications may not require the secondary GPIO function of the EMU[1:0] terminals. In this case, they would only be connected to pull-up resistors, which ensures they are always high when ICEPick samples. However, some applications may need to use these terminals as GPIO where they could be driven low before reset is asserted. This usage of the EMU[1:0] terminals may require special attention to ensure the terminals are allowed to return to a valid high-logic level before ICEPick samples the state of these terminals. When any device reset is asserted, the pin mux mode of EMU[1:0] terminals configured to operate as GPIO (mode 7) will change back to EMU input (mode 0) on the falling edge of WARMRSTn. This only provides a short period of time for the terminals to return high if driven low before reset is asserted... If the EMU[1:0] terminals are configured to operate as GPIO, the product should be designed such these terminals can be pulled to a valid high-logic level within 190 ns after the falling edge of WARMRSTn." We've noticed this problem with custom am335x hardware in combination with recently implemented cold reset method (commit 6521f6a195c70 ("ARM: AM33xx: PRM: Implement REBOOT_COLD")). It looks like the problem can affect other HW, for instance AM335x Chiliboard, because the latter has LEDs on GPIO3_7/GPIO3_8 as well. One option would be to check if the pins are in GPIO mode and either switch to output active high, or switch to input and poll until the external pull-ups have brought the pins to the desired high state. But fighting with GPIO driver for these pins is probably not the most straight forward approch in a reboot handler. Fortunately we can easily control pinmuxing here and rely on the external pull-ups. TI recommends 4k7 external pull up resistors [2] and even with quite conservative estimation for pin capacity (1 uF should never happen) the required delay shall not exceed 5ms. [1] Link: https://www.ti.com/lit/pdf/sprz360 [2] Link: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/866346/am3352-emu-1-0-questions Cc: stable@vger.kernel.org Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Link: https://lore.kernel.org/r/20250717152708.487891-1-alexander.sverdlin@siemens.com Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-09-05ARM: dts: ti: omap4: Use generic "ethernet" as node nameKrzysztof Kozlowski
Common name for Ethernet controllers is "ethernet", not "eth", also recommended by Devicetree specification in "Generic Names Recommendation". Verified lack of impact using dtx_diff. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717142212.92333-2-krzysztof.kozlowski@linaro.org Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-09-04vdso: Drop Kconfig GENERIC_VDSO_DATA_STOREThomas Weißschuh
All users of the generic vDSO library also use the generic vDSO datastore. Remove the now unnecessary Kconfig symbol. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Link: https://lore.kernel.org/all/20250826-vdso-cleanups-v1-9-d9b65750e49f@linutronix.de
2025-09-04vdso: Drop kconfig GENERIC_VDSO_32Thomas Weißschuh
This configuration is never used. Remove it. Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20250826-vdso-cleanups-v1-7-d9b65750e49f@linutronix.de
2025-09-04ARM: VDSO: Remove cntvct_ok global variableRasmus Villemoes
The cntvct_ok variable has not had any external user since commit c7a18100bdff ("lib/vdso: Avoid highres update if clocksource is not VDSO capable"). It also only has one user in vdso.c, once during init, so rather than having the caller of patch_vdso() initialize cntvct_ok, just call cntvct_functional() directly and avoid the global variable entirely. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Vincenzo Frascino <vincenzo.frascino@arm.com> Link: https://lore.kernel.org/all/20250826-vdso-cleanups-v1-2-d9b65750e49f@linutronix.de
2025-09-03Merge tag 'soc-fixes-6.17-2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "These are mainly devicetree fixes for the rockchip and nxp platforms on arm64, addressing mistakes in the board and soc specific descriptions. In particular the newly added Rock 5T board required multiple bugfixes for PCIe and USB, while on the i.MX platform there are a number of regulator related fixes. The only other platforms with devicetree fixes are at91 with a fixup for SD/MMC and a change to enable all the available UARTS on the Axiado reference board. Also on the at91 platform, a Kconfig change addresses a regression that stopped the DMA engine from working in 6.17-rc. Three drivers each have a simple bugfix, stopping incorrect behavior in op-tee firmware, the tee subsystem and the qualcomm mdt_loader. Two trivial MAINTAINERS file changes are needed to make sure that patches reach the correct maintainer, but don't change the actual responsibilities" * tag 'soc-fixes-6.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (27 commits) ARM: dts: microchip: sama7d65: Force SDMMC Legacy mode ARM: at91: select ARCH_MICROCHIP arm64: dts: rockchip: fix second M.2 slot on ROCK 5T arm64: dts: rockchip: fix USB on RADXA ROCK 5T MAINTAINERS: exclude defconfig from ARM64 PORT arm64: dts: axiado: Add missing UART aliases MAINTAINERS: Update Nobuhiro Iwamatsu's email address arm64: dts: rockchip: Add vcc-supply to SPI flash on Pinephone Pro arm64: dts: rockchip: fix es8388 address on rk3588s-roc-pc arm64: dts: rockchip: Fix Bluetooth interrupts flag on Neardi LBA3368 arm64: dts: rockchip: correct network description on Sige5 arm64: dts: rockchip: Minor whitespace cleanup ARM: dts: rockchip: Minor whitespace cleanup arm64: dts: rockchip: Add supplies for eMMC on rk3588-orangepi-5 arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 plus arm64: dts: imx95: Fix JPEG encoder node assigned clock arm64: dts: imx95-19x19-evk: correct the phy setting for flexcan1/2 arm64: dts: imx8mp: Fix missing microSD slot vqmmc on Data Modul i.MX8M Plus eDM SBC arm64: dts: imx8mp: Fix missing microSD slot vqmmc on DH electronics i.MX8M Plus DHCOM arm64: dts: imx8mp-tqma8mpql: remove virtual 3.3V regulator ...
2025-09-03Merge tag 'at91-fixes-6.17' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes Microchip AT91 fixes for v6.17 This update includes: - adaptation to the SDHCI capabilities on sama7d65 curiosity board DT as SDHCI quirks are not in place yet. SD/MMC don't work without these - addition of one Kconfig symbol that is already used in DMA tree for 6.17. XDMA cannot be selected if not present. * tag 'at91-fixes-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: microchip: sama7d65: Force SDMMC Legacy mode ARM: at91: select ARCH_MICROCHIP Link: https://lore.kernel.org/r/20250903173403.113604-1-nicolas.ferre@microchip.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-03ARM: dts: BCM5301X: Add support for Buffalo WXR-1750DHPTaishi Shimizu
Add initial device tree support for the Buffalo WXR-1750DHP, a consumer Wi-Fi router based on the Broadcom BCM4708A0 SoC. Hardware specifications: * Processor: Broadcom BCM4708A0 dual-core @ 800 MHz * RAM: DDR3 256 MB * Ethernet Switch: Broadcom BCM53011 integrated via SRAB * NAND Flash: 128 MB (8-bit ECC) * SPI Flash: None * Ports: 4 LAN Ports, 1 WAN Port * USB: 1x USB 3.0 Type-A port Signed-off-by: Taishi Shimizu <s.taishi14142@gmail.com> Link: https://lore.kernel.org/r/20250713071826.726682-3-s.taishi14142@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-09-03ARM: dts: microchip: sama7d65: Force SDMMC Legacy modeRyan Wanner
The SDMMC in this IP currently only supports legacy mode due to a hardware quirk, setting the flags to reflect the limitation. Fixes: deaa14ab6b06 ("ARM: dts: microchip: add support for sama7d65_curiosity board") Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20250819170528.126010-1-Ryan.Wanner@microchip.com Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2025-09-03ARM: at91: select ARCH_MICROCHIPRobert Marko
Like with the ARM64 Microchip platforms, lets add a generic ARCH_MICROCHIP symbol and select it so that drivers that are reused for multiple product generation or lines, can just depend on it instead of adding each SoC symbol as their dependencies. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com> Acked-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20250813174720.540015-3-robert.marko@sartura.hr Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2025-09-03ARM: dts: stm32: add Hardware debug port (HDP) on stm32mp15Clément Le Goffic
Add the hdp devicetree node for stm32mp15 SoC family Keep the node disabled as HDP needs the pinctrl SoC configuration to be able to output its mux output signal outside of the SoC, on the SoC pad. This configuration is provided in the board dtsi file through 'pinctrl-*' properties as well as HDP mux configuration. Thus, if needed, HDP should be enabled in board dtsi file. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://lore.kernel.org/r/20250711-hdp-upstream-v7-5-faeecf7aaee1@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: stm32: add Hardware debug port (HDP) on stm32mp13Clément Le Goffic
Add the hdp devicetree node for stm32mp13 SoC family. Keep the node disabled as HDP needs the pinctrl SoC configuration to be able to output its mux output signal outside of the SoC, on the SoC pad. This configuration is provided in the board dtsi file through 'pinctrl-*' properties as well as HDP mux configuration. Thus, if needed, HDP should be enabled in board dtsi file. Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://lore.kernel.org/r/20250711-hdp-upstream-v7-4-faeecf7aaee1@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: stm32: Add leds for CM4 on stm32mp15xx-ed1 and stm32mp15xx-dkxAntonio Borneo
Add to the node m4_rproc the pinctrl property corresponding to the orange LED. The GPIO is reserved for the coprocessor Cortex-M4 and will be ignored by Linux. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Link: https://lore.kernel.org/r/20250610152309.299438-5-antonio.borneo@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: stm32: Add pinmux for CM4 leds pinsAntonio Borneo
The GPIO H7 on boards stm32mp15xx-dkx and the GPIO D8 on boards stm32mp15xx-ed1 are used by the coprocessor Cortex-M4. Linux running on Cortex-A should not use the GPIO and should left it available for the coprocessor. Add two pinmux groups, one for each families of boards, setting the GPIO function as Reserved (RSVD). Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Link: https://lore.kernel.org/r/20250610152309.299438-4-antonio.borneo@foss.st.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03sched: Unify the SCHED_{SMT,CLUSTER,MC} KconfigPeter Zijlstra
Like many Kconfig symbols, SCHED_{SMT,CLUSTER,MC} are duplicated across arch/*/Kconfig. Try and clean up a little. Suggested-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Shrikanth Hegde <sshegde@linux.ibm.com> Tested-by: Shrikanth Hegde <sshegde@linux.ibm.com> # powerpc Link: https://lkml.kernel.org/r/20250826094358.GG3245006@noisy.programming.kicks-ass.net
2025-09-03ARM: dts: stm32: Drop redundant status=okayKrzysztof Kozlowski
Device nodes are enabled by default, so remove confusing or duplicated enabling of few nodes. No practical impact, verified with dtx_diff. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Marek Vasut <marek.vasut@mailbox.org> Link: https://lore.kernel.org/r/20250818143730.244379-2-krzysztof.kozlowski@linaro.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: stm32: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' or '{' characters. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250819131707.86657-3-krzysztof.kozlowski@linaro.org Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: stm32: stm32mp151c-plyaqm: Use correct dai-format propertyJihed Chaibi
The stm32-i2s binding inherits from the standard audio-graph-port schema for its 'port' subnode, audio-graph-port requires the use of the 'dai-format' property. The stm32mp151c-plyaqm dts file was using the non-standard name 'format'. Correct the property name to 'dai-format' to fix the dtbs_check validation error. Fixes: 9365fa46be358 ("ARM: dts: stm32: Add Plymovent AQM devicetree") Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Link: https://lore.kernel.org/r/20250830225115.303663-1-jihed.chaibi.dev@gmail.com Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-09-03ARM: dts: aspeed: Drop "sdhci" compatiblesRob Herring (Arm)
The "sdhci" compatible is not documented nor very useful on its own given the various features and quirks of SDHCI implementations. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250829211318.1335862-1-robh@kernel.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: Fix/add I2C device vendor prefixesRob Herring (Arm)
The ASpeed DTS files have various I2C devices with missing or incorrect vendor prefixes in their compatible strings. This hasn't really mattered and doesn't impact ABI compatibility as I2C devices get matched with their vendor prefix stripped. With this, the "maxim,max31790" nodes now validate and have some warnings. Remove the spurious "#address-cells" and "#size-cells" properties to fix the warnings. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> [arj: Fix conflicts with fe42f567c387 ("ARM: dts: aspeed: Minor whitespace cleanup")] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: Minor whitespace cleanupKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' or '{' characters. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250819131743.86905-2-krzysztof.kozlowski@linaro.org Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: clemente: add Meta Clemente BMCLeo Wang
Add linux device tree entry for Meta Clemente compute-tray BMC using AST2600 SoC. Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-3-8970d41f88b0@fii-foxconn.com [arj: Fix node ordering and whitespace] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: Add NCSI3 and NCSI4 pinctrl nodesLeo Wang
Add pinctrl nodes for NCSI3 and NCSI4 to the AST2600 pinctrl description, enabling support for RMII3 and RMII4 interfaces. Signed-off-by: Leo Wang <leo.jt.wang@gmail.com> Link: https://patch.msgid.link/20250813-add-support-for-meta-clemente-bmc-v11-2-8970d41f88b0@fii-foxconn.com [arj: Remove 'clemente' from commit subject] Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: add mp5990Peter Yin
Add support for the HSC MP5990 device on the Harma platform. This change updates the device tree to include the MP5990 HSC (Hot Swap Controller), allowing proper configuration and integration with the platform. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-4-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: revise gpio namePeter Yin
Update GPIO label definitions in the device tree to reflect the correct power and control signal names. This includes: - Rename "fcb0-activate" to "fcb1-activate" and "fcb2-activate" - Add labels for: - power-p3v3-standby - power-p1v8-good - power-pvdd33-s5 - power-pvdd18-s5 - power-asic-good - power-12v-memory-good - Replace unnamed GPIOs with appropriate labels such as: - irq-pvddcore0-ocp-alert - irq-pvddcore1-ocp-alert Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-3-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-03ARM: dts: aspeed: harma: add power monitor supportPeter Yin
Add INA238 device on I2C bus 4 for the PDB board power monitoring. Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com> Link: https://patch.msgid.link/20250828074955.542711-2-peteryin.openbmc@gmail.com Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-09-01ARM: dts: qcom: Use GIC_SPI for interrupt-map for readabilityKrzysztof Kozlowski
Decoding interrupt-map is tricky, because it consists of five components. Use known GIC_SPI define in final interrupt specifier component makes easier to read. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-15-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01ARM: dts: qcom: sdx55: Add default GIC address cellsKrzysztof Kozlowski
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: qcom-sdx55.dtsi:343.4-346.30: Warning (interrupt_map): /soc/pcie@1c00000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@17800000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-14-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01ARM: dts: qcom: ipq8064: Add default GIC address cellsKrzysztof Kozlowski
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: qcom-ipq8064.dtsi:1201.4-1204.29: Warning (interrupt_map): /soc/pcie@1b900000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@2000000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-13-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01ARM: dts: qcom: apq8064: Add default GIC address cellsKrzysztof Kozlowski
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: qcom-apq8064.dtsi:1353.4-1356.29: Warning (interrupt_map): /soc/pcie@1b500000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@2000000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-12-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01ARM: dts: qcom: ipq4019: Add default GIC address cellsKrzysztof Kozlowski
Add missing address-cells 0 to GIC interrupt node to silence W=1 warning: qcom-ipq4019.dtsi:431.4-434.30: Warning (interrupt_map): /soc/pcie@40000000:interrupt-map: Missing property '#address-cells' in node /soc/interrupt-controller@b000000, using 0 as fallback Value '0' is correct because: 1. GIC interrupt controller does not have children, 2. interrupt-map property (in PCI node) consists of five components and the fourth component "parent unit address", which size is defined by '#address-cells' of the node pointed to by the interrupt-parent component, is not used (=0). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-11-d54d44b74460@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-09-01arch: copy_thread: pass clone_flags as u64Simon Schuster
With the introduction of clone3 in commit 7f192e3cd316 ("fork: add clone3") the effective bit width of clone_flags on all architectures was increased from 32-bit to 64-bit, with a new type of u64 for the flags. However, for most consumers of clone_flags the interface was not changed from the previous type of unsigned long. While this works fine as long as none of the new 64-bit flag bits (CLONE_CLEAR_SIGHAND and CLONE_INTO_CGROUP) are evaluated, this is still undesirable in terms of the principle of least surprise. Thus, this commit fixes all relevant interfaces of the copy_thread function that is called from copy_process to consistently pass clone_flags as u64, so that no truncation to 32-bit integers occurs on 32-bit architectures. Signed-off-by: Simon Schuster <schuster.simon@siemens-energy.com> Link: https://lore.kernel.org/20250901-nios2-implement-clone3-v2-3-53fcf5577d57@siemens-energy.com Fixes: c5febea0956fd387 ("fork: Pass struct kernel_clone_args into copy_thread") Acked-by: Guo Ren (Alibaba Damo Academy) <guoren@kernel.org> Acked-by: Andreas Larsson <andreas@gaisler.com> # sparc Acked-by: David Hildenbrand <david@redhat.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> # m68k Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Christian Brauner <brauner@kernel.org>
2025-09-01ARM: s3c6400_defconfig: Drop MTD_NAND_S3C2410Krzysztof Kozlowski
MTD_NAND_S3C2410 driver was removed from the kernel, so cleanup defconfig as well. Link: https://lore.kernel.org/r/20250830-s3c-cleanup-nand-v1-4-05b99ef990fe@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-01Merge tag 'renesas-arm-soc-for-v6.18-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/arm Renesas ARM SoC updates for v6.18 - Use the SZ_256K definition. * tag 'renesas-arm-soc-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: shmobile: rcar-gen2: Use SZ_256K definition Link: https://lore.kernel.org/r/cover.1756468045.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01ARM: defconfig: pxa: Remove duplicate CONFIG_USB_GPIO_VBUS entryJihed Chaibi
The pxa_defconfig file defines CONFIG_USB_GPIO_VBUS twice, first as built-in ('y') and then as a module ('m'). The kconfig system correctly uses the last definition, but the duplication is confusing. Remove the obsolete configuration to resolve the ambiguity and clean up the configuration. Fixes: 2002f3968714 ("ARM: refresh defconfig files") Signed-off-by: Jihed Chaibi <jihed.chaibi.dev@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'sti-dt-for-v6.18-round1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into soc/dt STi dt fixes: - Drop STiH407/10-B2120 DT boards and bindings. - Remove remaining STiH415/6 reference from STi machine. - Fix phy-names value for stih407-family.dtsi. * tag 'sti-dt-for-v6.18-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: sti: drop B2120 board support ARM: sti: removal of stih415/stih416 related entries dt-bindings: arm: sti: drop B2120 board support ARM: dts: sti: rename SATA phy-names Link: https://lore.kernel.org/r/e4703e99-e44e-41d2-b744-a12ed4cb6692@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'renesas-dts-for-v6.18-tag1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt Renesas DTS updates for v6.18 - Add initial support for the RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs and their evaluation boards, - Add SPI support for the RZ/V2H SoC, - Add DMAC and I3C support for the RZ/G3E SoC, - Add I3C support for the RZ/G3S SoCs, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.18-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (31 commits) arm64: dts: renesas: Minor whitespace cleanup arm64: dts: renesas: sparrow-hawk: Set VDDQ18_25_AVB voltage on EVTB1 arm64: dts: renesas: sparrow-hawk: Invert microSD voltage selector on EVTB1 arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Enable I2C0 and I2C1 support arm64: dts: renesas: r9a09g077: Add pinctrl node arm64: dts: renesas: r9a09g087: Add DT nodes for SCI channels 1-5 arm64: dts: renesas: r9a09g077: Add DT nodes for SCI channels 1-5 arm64: dts: renesas: r9a09g047: Add I3C node arm64: dts: renesas: r9a08g045: Add I3C node arm64: dts: renesas: sparrow-hawk: Update thermal trip points arm64: dts: renesas: rzg2: Increase CANFD clock rates arm64: dts: renesas: rcar-gen3: Increase CANFD clock rates ARM: dts: renesas: porter: Fix CAN pin group ARM: dts: renesas: r7s72100: Add boot phase tags arm64: dts: renesas: sparrow-hawk: Describe generic SPI NOR support arm64: dts: renesas: rzg2lc-smarc: Disable CAN-FD channel0 arm64: dts: renesas: r9a09g047: Add DMAC nodes arm64: dts: renesas: r9a09g057h48-kakip: Fix misplaced article arm64: dts: renesas: r9a09g087: Add SDHI nodes arm64: dts: renesas: r9a09g077: Add SDHI nodes ... Link: https://lore.kernel.org/r/cover.1756468048.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'ixp4xx-dts-v6.18' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into soc/dt IXP4xx DTS updates for v6.18: Add the Actiontec router MI424WR A/C and D device trees. Prerequisite DT bindings have been merged in networking and GPIO git trees: https://lore.kernel.org/netdev/175106401649.2079310.16035106613106076029.git-patchwork-notify@kernel.org/ https://lore.kernel.org/linux-gpio/175614780274.8817.4717113656972710108.b4-ty@linaro.org/ * tag 'ixp4xx-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: ARM: dts: Add ixp4xx Actiontec MI424WR device trees dt-bindings: arm: ixp4xx: List actiontec devices dt-bindings: Add Actiontec vendor prefix Link: https://lore.kernel.org/r/CACRpkdZoDCXgsTGzUUWABbp_r1Xjv7vp7_NjEnEWzMmDQG+UJQ@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'ux500-dts-v6.18' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into soc/dt Ux500 DTS changes for v6.18 - Fix a GPIO hog name. - Move custom wakeup GPIO to a proper GPIO IRQ line rising edge wakeup. * tag 'ux500-dts-v6.18' of https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik: ARM: dts: ste-ux500-samsung: dts bluetooth wakeup interrupt ARM: dts: st: ste-nomadik: Align GPIO hog name with bindings Link: https://lore.kernel.org/r/CACRpkdaGWVe7TNVz_L=gFh3AfzqnEq4rrOLo8x6gXUORA+MMpw@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'nuvoton-arm-6.18-devicetree-0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt Early Nuvoton ARM devicetree updates for 6.18 So far we have just the one fix from Krzysztof that switches some nodes to use generic names, as recommended by the spec. * tag 'nuvoton-arm-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: ARM: dts: nuvoton: Use generic "ethernet" as node name Link: https://lore.kernel.org/r/5e7e5d2cedb3bb232420ad720c857b95d8c02f21.camel@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-09-01Merge tag 'aspeed-6.18-devicetree-0' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt Early ASPEED devicetree updates for 6.18 Notable changes: - Meta's Wedge400 and Fuji boards have had parallel devicetrees added for a transition to a new static flash layout. The original layout is deprecated and I anticipate removing related devicetrees in future releases. New platforms: - Darwin (Meta) Darwin is Meta's rack switch platform with an AST2600 BMC integrated for health monitoring purpose. Updates and fixes: - GB200NVL (Nvidia): Networking, I2C, regulators, GPIOs - Wedge400, Fuji (Meta): Fix warnings from devicetree bindings - Use fixed-layout for NVMEM on Asrock platforms - Various: minor fixes for warnings from FSI devicetree bindings * tag 'aspeed-6.18-devicetree-0' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (24 commits) ARM: dts: aspeed: x570d4u: convert NVMEM content to layout syntax ARM: dts: aspeed: romed8hm3: convert NVMEM content to layout syntax ARM: dts: aspeed: e3c256d4i: convert NVMEM content to layout syntax ARM: dts: aspeed: e3c246d4i: convert NVMEM content to layout syntax ARM: dts: aspeed: Add missing "ibm,spi-fsi" compatibles ARM: dts: aspeed: Drop "fsi-master" compatibles ARM: dts: aspeed: Drop "no-gpio-delays" ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC dt-bindings: arm: aspeed: add Facebook Darwin board ARM: dts: aspeed: facebook-fuji: Include facebook-fuji-data64.dts ARM: dts: aspeed: Add Facebook Fuji-data64 (AST2600) Board dt-bindings: arm: aspeed: add Facebook Fuji-data64 board ARM: dts: aspeed: wedge400: Include wedge400-data64.dts ARM: dts: aspeed: Add Facebook Wedge400-data64 (AST2500) BMC dt-bindings: arm: aspeed: add Facebook Wedge400-data64 board ARM: dts: aspeed: Add facebook-bmc-flash-layout-128-data64.dtsi ARM: dts: aspeed: Move eMMC out of ast2600-facebook-netbmc-common.dtsi ARM: dts: aspeed: Fix DTB warnings in ast2600-facebook-netbmc-common.dtsi ARM: dts: aspeed: fuji: Fix DTB warnings ARM: dts: aspeed: wedge400: Fix DTB warnings ... Link: https://lore.kernel.org/r/cb634cffaf0db9d25fb3062f0eee41e03955321f.camel@codeconstruct.com.au Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-08-30ARM: dts: rockchip: add HDMI audio to rk3288-miqiAlex Bee
Add the sound and i2s nodes to enable HDMI audio output on the MiQi board. Signed-off-by: Alex Bee <knaerzche@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20250828163501.3829226-1-christianshewitt@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-30ARM: dts: rockchip: add CEC pinctrl to rk3288-miqiAlex Bee
Enable CEC control on the HDMI port for MiQi. Signed-off-by: Alex Bee <knaerzche@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/20250828165421.3829740-1-christianshewitt@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-30ARM: dts: microchip: sama7d65: add uart3 definition for flexcom3 peripheralNicolas Ferre
Add the definition of uart3 at the side of i2c3 for flexcom3. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Reviewed-by: Ryan Wanner <ryan.wanner@microchip.com> Link: https://lore.kernel.org/r/20250905092044.25429-1-nicolas.ferre@microchip.com [claudiu.beznea: moved atmel,usart-mode at the end of the node to comply with dts coding style] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-09-22ARM: dts: microchip: sama7d65: Add GPIO buttons and LEDsRyan Wanner
Add the USER button as a GPIO input as well as add the LEDs and enable the blue LED as a heartbeat. Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com> Link: https://lore.kernel.org/r/20250917210409.503830-1-Ryan.Wanner@microchip.com Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2025-08-30ARM: at91: pm: save and restore ACR during PLL disable/enableNicolas Ferre
Add a new word in assembly to store ACR value during the calls to at91_plla_disable/at91_plla_enable macros and use it. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> [cristian.birsan@microchip.com: remove ACR_DEFAULT_PLLA loading] Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com> Link: https://lore.kernel.org/r/20250827145427.46819-4-nicolas.ferre@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-08-30ARM: at91: pm: fix MCKx restore routineNicolas Ferre
The at91_mckx_ps_restore() assembly function is responsible for setting back MCKx system bus clocks after exiting low power modes. Fix a typo and use tmp3 variable instead of tmp2 to correctly set MCKx to previously saved state. Tmp2 was used without the needed changes in CSS and DIV. Moreover the required bit 7, telling that MCR register's content is to be changed (CMD/write), was not set. Fix function comment to match tmp variables actually used. Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Fixes: 28eb1d40fe57 ("ARM: at91: pm: add support for MCK1..4 save/restore for ulp modes") Link: https://lore.kernel.org/r/20250827145427.46819-3-nicolas.ferre@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> [claudiu.beznea: s/sate/state in commit description] Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-08-30ARM: at91: pm: fix .uhp_udp_mask specification for current SoCsNicolas Ferre
All SoCs using this structure field .uhp_udp_mask in configuration index 4 don't have the bit 7 specified: sam9x60 nor sam9x75. Remove this bit from the mask definition to match register layout. This mask is used in function at91_pm_verify_clocks(). Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20250827145427.46819-2-nicolas.ferre@microchip.com Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-08-29arm: configs: Remove obsolete assignments to CRYPTO_CHACHA20_NEONEric Biggers
Since v6.15, CRYPTO_CHACHA20_NEON is a hidden option and is selected automatically. Therefore, assigning a value to it in a defconfig no longer has any effect. Remove it from all files that did this. Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Link: https://lore.kernel.org/r/20250827151131.27733-2-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>
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