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2026-03-26arm64: dts: qcom: glymur-crd: Enable WLAN and BluetoothAbel Vesa
Both Glymur and Mahua CRDs feature a WCN7850 M.2 WLAN and Bluetooth combo card. So describe both the 0.9V and the 3.3V regulators, then WCN7850 PMU and the PCIe WLAN and the UART Bluetooth nodes. Do this in the Glymur CRD generic dtsi so that both Glymur and Mahua CRDs benefit from it towards enabling WLAN and Bluetooth functionality. Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Zijun Hu <zijun.hu@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260324-glymur-dts-crd-enable-bt-wlan-v2-1-6afcf1ac277a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: kodiak: Add LPASS I2S2 pinctrl definitionsVal Packett
Add the pinctrl definitions to configure gpio10-gpio13 of the lpass_tlmm for I2S output. Signed-off-by: Val Packett <val@packett.cool> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260323095247.92890-1-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: add IPQ5210 SoC and rdp504 board supportKathiravan Thirumoorthy
Add initial device tree support for the Qualcomm IPQ5210 SoC and rdp504 board. Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-ipq5210_boot_to_shell-v3-2-9c7360d19d10@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8750: Enable TSENS and thermal zonesManaf Meethalavalappu Pallikunhi
The sm8750 includes four TSENS instances, with a total of 47 thermal sensors distributed across various locations on the SoC. The TSENS max/reset threshold is configured to 130°C in the hardware. Enable all TSENS instances, and define the thermal zones with a hot trip at 120°C and critical trip at 125°C. Signed-off-by: Manaf Meethalavalappu Pallikunhi <quic_manafm@quicinc.com> Signed-off-by: Gaurav Kohli <gaurav.kohli@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-sm8750_tsens-v2-1-8a554e54dc1b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: mahua: Fix mahua bwmonPragnesh Papaniya
Delete the bwmon node that corresponds to non-existent cpu cluster 2 on Mahua SoCs. Fixes: 598eedb21ddd ("arm64: dts: qcom: Add Mahua SoC and CRD") Tested-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-2-9433f9d4c276@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: glymur: Add missing opp entryPragnesh Papaniya
Add missing opp entry that corresponds to highest ddr frequency for Glymur/Mahua SoCs. Fixes: e4945894c1cb ("arm64: dts: qcom: glymur: Add glymur BWMONs") Signed-off-by: Pragnesh Papaniya <pragnesh.papaniya@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-bwmon_fixes-v1-1-9433f9d4c276@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans: Correct QUP interrupt numbersViken Dadhaniya
Fix GIC_SPI interrupt numbers for QUPv3 SE6 nodes on Lemans SoC. Using incorrect interrupt lines can prevent IRQs from triggering and break I2C, SPI, and UART operation. Fixes: 34a407316b7d3 ("arm64: dts: qcom: sa8775p: Populate additional UART DT nodes") Fixes: 1b2d7ad5ac14d ("arm64: dts: qcom: sa8775p: add missing spi nodes") Fixes: ee2f5f906d69d ("arm64: dts: qcom: sa8775p: add missing i2c nodes") Cc: stable@vger.kernel.org Signed-off-by: Viken Dadhaniya <viken.dadhaniya@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260325-lemans-irq-num-v1-1-a470d544966a@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb5165-rb5: Drop redundant non-controllable suppliesKrzysztof Kozlowski
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. For the few regulators being actively used and supplied by removed dummies, change the supply to match the actual final source without these dummy intermediaries. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-5-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb4210-rb2: Drop redundant non-controllable suppliesKrzysztof Kozlowski
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-4-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb2210-rb1: Drop redundant non-controllable suppliesKrzysztof Kozlowski
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-3-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qcs615-ride: Drop redundant non-controllable suppliesKrzysztof Kozlowski
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-2-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans-ride: Drop redundant non-controllable suppliesKrzysztof Kozlowski
Drop completely redundant non-controllable chain of "regulator-fixed" supplies, which serve no purpose except growing DTS and kernel boot time. They represent no added value and because of being completely transparent for any users of DTS (except the bloat), they should not be represented in DTS, just like we do not represent every transistor there. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-supplies-v1-1-5071a7052ea9@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8650: Drop redundant VSYNC pin stateKrzysztof Kozlowski
The active and suspend pin state of VSYNC is exactly the same, so just use one node for both states. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-5-98e2ef430717@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8550: Drop redundant VSYNC pin stateKrzysztof Kozlowski
The active and suspend pin state of VSYNC is exactly the same, so just use one node for both states. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-4-98e2ef430717@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sdm845-axolotl: Drop redundant VSYNC pin stateKrzysztof Kozlowski
The active and suspend pin state of VSYNC is exactly the same, so just use one node for both states. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-3-98e2ef430717@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: msm8998: Drop redundant VSYNC pin stateKrzysztof Kozlowski
The active and suspend pin state of VSYNC is exactly the same, so just use one node for both states. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-2-98e2ef430717@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: msm8996: Drop redundant VSYNC pin stateKrzysztof Kozlowski
The active and suspend pin state of VSYNC is exactly the same, so just use one node for both states. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260310-qcom-dts-redundant-pins-v1-1-98e2ef430717@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: pq5332-rdp-common: Enable QPIC SPI NAND supportMd Sadre Alam
Enable QPIC SPI NAND flash controller support on the IPQ5332 reference design platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20260306113940.1654304-5-quic_mdalam@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: ipq5424-rdp466: Enable QPIC SPI NAND supportMd Sadre Alam
Enable QPIC SPI NAND flash controller support on the IPQ5424 RDP466 reference design platform. The RDP466 board features a SPI NAND flash device connected to the QPIC controller for primary storage. This patch enables the QPIC BAM DMA controller and SPI NAND interface of QPIC, and configures the necessary pin control settings for proper operation. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20260306113940.1654304-4-quic_mdalam@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: ipq5332: Add QPIC SPI NAND controller supportMd Sadre Alam
Add device tree nodes for QPIC SPI NAND flash controller support on IPQ5332 SoC. The IPQ5332 SoC includes a QPIC controller that supports SPI NAND flash devices with hardware ECC capabilities and DMA support through BAM (Bus Access Manager). Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260306113940.1654304-3-quic_mdalam@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: ipq5424: Add QPIC SPI NAND controller supportMd Sadre Alam
Add device tree nodes for QPIC SPI NAND flash controller support on IPQ5424 SoC. The IPQ5424 SoC includes a QPIC controller that supports SPI NAND flash devices with hardware ECC capabilities and DMA support through BAM (Bus Access Manager). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Link: https://lore.kernel.org/r/20260306113940.1654304-2-quic_mdalam@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans-evk: Enable the tertiary USB controllerSwati Agarwal
Enable the tertiary usb controller connected to micro usb port in OTG mode on Lemans EVK platform. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260306091355.1178333-5-swati.agarwal@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans: Add role-switch support and HS endpoint for ↵Swati Agarwal
tertiary USB controller Enable usb-role-switch for the tertiary USB controller on Lemans. Additionally, add a port node with an HS endpoint so the controller can be linked through the DT graph to the corresponding connector. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260306091355.1178333-4-swati.agarwal@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans-evk: Rename vbus regulator for Primary USB controllerSwati Agarwal
Rename vbus regulator for Primary USB controller as per Lemans EVK schematics. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260306091355.1178333-3-swati.agarwal@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans-evk: Enable GPIO expander interrupt for Lemans EVKSwati Agarwal
Enable PCA9538 expander as interrupt controller on Lemans EVK and configure the corresponding TLMM pins via pinctrl to operate as GPIO inputs with internal pull-ups. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Swati Agarwal <swati.agarwal@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260306091355.1178333-2-swati.agarwal@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8650: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-7-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8550: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-6-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8350: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-5-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm6350: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-4-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sdm845: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-3-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sc7280: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-2-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sc7180: Explicitly describe the IPA IMEM sliceKonrad Dybcio
As part of stepping away from crazy hardcoding in the driver, move define the slice explicitly and pass it to the IPA node. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260305-topic-ipa_mem_dts-v2-1-5cb5b90902bf@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: lemans-evk: Add IFP MezzanineUmang Chheda
The Interface Plus [IFP] Mezzanine is an hardware expansion add-on board designed to be stacked on top of Lemans EVK. It has following peripherals : - 4x Type A USB ports in host mode. - TC9563 PCIe switch, which has following three downstream ports (DSP) : - 1st DSP is routed to an M.2 E-key connector, intended for WLAN modules. - 2nd DSP is routed to an M.2 B-key connector, intended for cellular modems. - 3rd DSP with support for Dual Ethernet ports. - eMMC. - Additional 2.5GbE Ethernet PHY connected to native EMAC with support for MAC Address configuration via NVMEM. - EEPROM. - LVDS Display. - 2*mini DP. Add support for following peripherals : - TC9563 PCIe Switch. - Additional 2.5GbE Ethernet Port. - EEPROM. Enable support for USB hub, LVDS display and mini-DP later once dependent changes are available in lemans-evk core-kit. Written with inputs from : Mohd Ayaan Anwar <mohd.anwar@oss.qualcomm.com> - Ethernet. Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM. Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260304165925.1535938-2-umang.chheda@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: monaco-evk: Add IFP MezzanineUmang Chheda
The IFP Mezzanine is an hardware expansion add-on board designed to be stacked on top of Monaco EVK. It has following peripherals : - 4x Type A USB ports in host mode. - TC9563 PCIe switch, which has following three downstream ports (DSP) : - 1st DSP is routed to an M.2 E-Key connector, intended for WLAN modules. - 2nd DSP is routed to an M.2 B-key connector, intended for cellular modems. - 3rd DSP with support for Dual Ethernet ports. - EEPROM. - LVDS Display. - 2*mini DP. Add support for following peripherals : - TC9563 PCIe Switch. - EEPROM. Enable support for USB hub, LVDS display and mini-DP later once dependent changes are available in monaco-evk core-kit. Written with inputs from : Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> - PCIe Monish Chunara <monish.chunara@oss.qualcomm.com> - EEPROM. Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260303164314.886733-2-umang.chheda@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sc7280-chrome-common: disable VenusDmitry Baryshkov
Iris driver doesn't support non-PAS/TZ setup for setting up the Iris core. It's expected that the ABI that is going to be used in a long-term would be different from the defined venus-firmware subnode. Granted that the SC7280 Chromebooks were cancelled before reaching wide audience and granted the feature ABI changes, drop venus configuration for SC7280 ChromeOS devices. Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org> Cc: Douglas Anderson <dianders@chromium.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Douglas Anderson <dianders@chromium.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260131-venus-iris-flip-switch-v4-1-e10b886771e1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8150-hdk: describe WiFi/BT properlyDmitry Baryshkov
Properly describe the PMU present as a part of the onboard WCN3998 WiFi/BT chip. Enable Bluetooth part of the chip too. [ 5.479978] Bluetooth: hci0: setting up wcn399x [ 5.633763] Bluetooth: hci0: QCA Product ID :0x0000000a [ 5.645350] Bluetooth: hci0: QCA SOC Version :0x40010224 [ 5.650906] Bluetooth: hci0: QCA ROM Version :0x00001001 [ 5.665173] Bluetooth: hci0: QCA Patch Version:0x00006699 [ 5.679356] Bluetooth: hci0: QCA controller version 0x02241001 [ 5.691109] Bluetooth: hci0: QCA Downloading qca/crbtfw21.tlv [ 6.680102] Bluetooth: hci0: QCA Downloading qca/crnv21.bin [ 6.842948] Bluetooth: hci0: QCA setup on UART is completed [ 81.510709] ath10k_snoc 18800000.wifi: qmi chip_id 0x30224 chip_family 0x4001 board_id 0x55 soc_id 0x40060000 [ 81.521713] ath10k_snoc 18800000.wifi: qmi fw_version 0x32040163 fw_build_timestamp 2019-10-08 05:42 fw_build_id QC_IMAGE_VERSION_STRING=WLAN.HL.3.2.0-00355-QCAHLSWMTPLZ-1 [ 81.554143] ath10k_snoc 18800000.wifi: failed to fetch board data for bus=snoc,qmi-board-id=55,qmi-chip-id=30224,variant=Qualcomm_sm8150hdk from ath10k/WCN3990/hw1.0/board-2.bin [ 85.467464] ath10k_snoc 18800000.wifi: wcn3990 hw1.0 target 0x00000008 chip_id 0x00000000 sub 0000:0000 [ 85.478132] ath10k_snoc 18800000.wifi: kconfig debug 0 debugfs 0 tracing 0 dfs 0 testmode 0 [ 85.487223] ath10k_snoc 18800000.wifi: firmware ver api 5 features wowlan,mgmt-tx-by-reference,non-bmi crc32 b3d4b790 [ 85.758168] ath10k_snoc 18800000.wifi: htt-ver 3.73 wmi-op 4 htt-op 3 cal file max-sta 32 raw 0 hwcrypto 1 [ 85.901630] ath10k_snoc 18800000.wifi: invalid MAC address; choosing random Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-14-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sdm845-db845c: describe WiFi/BT properlyDmitry Baryshkov
The onboard WiFi / BT device, WCN3990, has a simple on-chip PMU, which further spreads generated voltage. Describe the PMU in the device tree. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-13-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sda660-ifc6560: describe WiFi/BT properlyDmitry Baryshkov
The onboard WiFi / BT device, WCN3990, has a simple on-chip PMU, which further spreads generated voltage. Describe the PMU in the device tree. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-12-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb4210-rb2: describe WiFi/BT properlyDmitry Baryshkov
The onboard WiFi / BT device, WCN3988, has a simple on-chip PMU, which further spreads generated voltage. Describe the PMU in the device tree. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-11-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: qrb2210-rb1: describe WiFi/BT properlyDmitry Baryshkov
The onboard WiFi / BT device, WCN3950, has a simple on-chip PMU, which further spreads generated voltage. Describe the PMU in the device tree. Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-wcn3990-pwrctl-v2-10-0386204328be@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: Add Redmi GoBarnabás Czémán
Redmi Go (tiare) is like Redmi 5A with small differences like charging, fuel gauge and different speaker codec. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260315-riva-common-v3-6-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: Add Redmi 4ABarnabás Czémán
Redmi 4A (rolex) is like Redmi 5A with small differences like charging, fuel gauge, different speaker codec configuration and display. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260315-riva-common-v3-5-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: msm8917-xiaomi-wingtech: Add goodix touchBarnabás Czémán
There are variants from MSM8917 wingtech xiaomis what are using goodix touch controller instead of focaltech. Add goodix node for make it able to use touch on all variants. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Link: https://lore.kernel.org/r/20260315-riva-common-v3-3-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: Make a common base from Redmi 5ABarnabás Czémán
Redmi 5A was made by wingtech like Redmi 4A (rolex) and Redmi GO (tiare). They are very similar, make a common base from riva for avoid unnecessary code duplications. Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260315-riva-common-v3-2-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: msm8917-xiaomi-riva: Fix board-id for all bootloaderBarnabás Czémán
Redmi 5A comes with multiple bootloader versions where the expected board-id is different. Change the board-id to unified form what works on both bootloader version. Fixes: 26633b582056 ("arm64: dts: qcom: Add Xiaomi Redmi 5A") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260315-riva-common-v3-1-897f130786ed@mainlining.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: milos-fairphone-fp6: Enable UFSLuca Weiss
Configure and enable the nodes for UFS, so that we can access the internal storage. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20260319-milos-ufs-v3-2-b7c60bdd0d48@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: milos: Add UFS nodesLuca Weiss
Add the nodes for the UFS PHY and UFS host controller, along with the ICE used for UFS. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20260319-milos-ufs-v3-1-b7c60bdd0d48@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: add basic devicetree for Ayaneo Pocket S2 gaming consoleKancyJoe
Add initial Device Tree for the Ayaneo Pocket S2 gaming console based on the Qualcomm Snapdragon 8 Gen 3 platform. The design is similar to a phone without the modem, the game control is handled via a standalone controller connected to a PCIe USB controller. Display panel support will be added in a second time. Signed-off-by: KancyJoe <kancy2333@outlook.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20260319-topic-sm8650-ayaneo-pocket-s2-base-v6-5-797bf96df771@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sm8650: Add sound DAI prefix for DPNeil Armstrong
Sound DAI devices exposing same set of mixers, e.g. each DisplayPort controller, need to add dedicated prefix for these mixers to avoid conflicts and to allow ALSA to properly configure given instance. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20260319-topic-sm8650-ayaneo-pocket-s2-base-v6-4-797bf96df771@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-03-26arm64: dts: qcom: sdm845-xiaomi-beryllium: Mark l1a regulator as powered ↵David Heidelberg
during boot The regulator must be on, since it provides the display subsystem and therefore the bootloader had turned it on before Linux booted. Fixes: 77809cf74a8c ("arm64: dts: qcom: Add support for Xiaomi Poco F1 (Beryllium)") Signed-off-by: David Heidelberg <david@ixit.cz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260320-beryllium-booton-v2-1-931d1be21eae@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-13 12:35:37 +0000