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2026-03-22arm64: dts: ti: k3-am68-phyboard-izar: Add LVDS-DisplayDominik Haller
Add an overlay to use a powertip,ph128800t006-zhc01 10.1" LVDS display. Signed-off-by: Dominik Haller <d.haller@phytec.de> Link: https://patch.msgid.link/20260320212349.420951-4-d.haller@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-22arm64: dts: ti: k3-am68-phycore-som: Add DSI->LVDS bridgeDominik Haller
Add the TI SN65DSI83 MIPI-DSI->LVDS bridge that can be populated on the phyCORE-AM68x/TDA4x. Signed-off-by: Dominik Haller <d.haller@phytec.de> Link: https://patch.msgid.link/20260320212349.420951-3-d.haller@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-22arm64: dts: ti: k3-am68-phyboard-izar: Assign dss clocksDominik Haller
Assign the dss clocks in the base dts so that display overlays can be used in any combination. Signed-off-by: Dominik Haller <d.haller@phytec.de> Link: https://patch.msgid.link/20260320212349.420951-2-d.haller@phytec.de Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-22arm64: dts: ti: am62-verdin: Enable pullup for eMMC data pinsFrancesco Dolcini
Verdin AM62 board does not have external pullups on eMMC DAT1-DAT7 pins. Enable internal pullups on DAT1-DAT7 considering: - without a host-side pullup, these lines rely solely on the eMMC device's internal pullup (R_int, 10kohm-150kohm per JEDEC), which may exceed the recommended 50kohm max for 1.8V VCCQ - JEDEC JESD84-B51 Table 200 requires host-side pullups (R_DAT, 10kohm-100kohm) on all data lines to prevent bus floating Fixes: 316b80246b16 ("arm64: dts: ti: add verdin am62") Cc: stable@vger.kernel.org Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Link: https://patch.msgid.link/20260320073032.10427-1-francesco@dolcini.it Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-03-22block/floppy: Don't use REALLY_SLOW_IO for delaysJuergen Gross
Instead of defining REALLY_SLOW_IO before including io.h, add the required additional calls of native_io_delay() to the related functions in arch/x86/include/asm/floppy.h. Drop REALLY_SLOW_IO now too as it has no users. [ bp: Merge the REALLY_SLOW_IO removal into this patch. ] Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://patch.msgid.link/20260119182632.596369-4-jgross@suse.com
2026-03-22x86/paravirt: Replace io_delay() hook with a boolJuergen Gross
The io_delay() paravirt hook is in no way performance critical and all users setting it to a different function than native_io_delay() are using an empty function as replacement. Allow replacing the hook with a bool indicating whether native_io_delay() should be called. [ bp: Massage commit message. ] Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://patch.msgid.link/20260119182632.596369-3-jgross@suse.com
2026-03-22x86/irqflags: Preemptively move include paravirt.h directive where it belongsJuergen Gross
Commit 22cc5ca5de52 ("x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT") moved some paravirt hooks from the CONFIG_PARAVIRT_XXL umbrella to CONFIG_PARAVIRT, but missed to move the associated "#include <asm/paravirt.h>" in irqflags.h from CONFIG_PARAVIRT_XXL to CONFIG_PARAVIRT. This hasn't resulted in build failures yet, as all use cases of irqflags.h had paravirt.h included via other header files, even without CONFIG_PARAVIRT_XXL being set. In order to allow changing those other header files, e.g. by no longer including paravirt.h, fix irqflags.h by moving inclusion of paravirt.h under the CONFIG_PARAVIRT umbrella. [ bp: Massage commit message. ] Fixes: 22cc5ca5de52 ("x86/paravirt: Move halt paravirt calls under CONFIG_PARAVIRT") Closes: https://lore.kernel.org/oe-kbuild-all/202601152203.plJOoOEF-lkp@intel.com/ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://patch.msgid.link/20260119182632.596369-2-jgross@suse.com
2026-03-21Merge tag 'driver-core-7.0-rc5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core Pull driver core fixes from Danilo Krummrich: - Generalize driver_override in the driver core, providing a common sysfs implementation and concurrency-safe accessors for bus implementations - Do not use driver_override as IRQ name in the hwmon axi-fan driver - Remove an unnecessary driver_override check in sh platform_early - Migrate the platform bus to use the generic driver_override infrastructure, fixing a UAF condition caused by accessing the driver_override field without proper locking in the platform_match() callback * tag 'driver-core-7.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/driver-core/driver-core: driver core: platform: use generic driver_override infrastructure sh: platform_early: remove pdev->driver_override check hwmon: axi-fan: don't use driver_override as IRQ name docs: driver-model: document driver_override driver core: generalize driver_override in struct device
2026-03-21Merge tag 'v7.1-rockchip-dts64-1' of ↵Krzysztof Kozlowski
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: RK3576-EVB2, OneThing Edge Cube New soc-peripherals: DisplayPort on RK3576 New overlays: TSx33 device-revisions, HD702E display/touchscreen on NanoPC-T4 And as always a number of per-board changes for added or enabled peripherals, added supplies, things moved to more fitting positions. * tag 'v7.1-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (28 commits) arm64: dts: rockchip: enable vicap dvp on wolfvision pf5 io expander arm64: dts: rockchip: Add analog audio switches to RK3576 EVB1 arm64: dts: rockchip: Enable GPU on rk3566-pinenote arm64: dts: rockchip: Make Jaguar PCIe-refclk pin use pull-up config arm64: dts: rockchip: add pinctrl for clk-generator GPIO on rk3588-tiger arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-tiger arm64: dts: rockchip: use gated-fixed-clock for pcie-refclk on rk3588-jaguar arm64: dts: rockchip: Enable displayport for rk3576 evb2 arm64: dts: rockchip: Add battery and charger on rk3566-pinenote arm64: dts: rockchip: Fix sdmmc pwren pinctrl for rk3576-evb2 arm64: dts: rockchip: Describe HDMI supplies for nanopi4 boards arm64: dts: rockchip: Clean up NanoPi-R2S Plus gmac2io arm64: dts: rockchip: add pwm-fan for NanoPC-T6 arm64: dts: rockchip: Add rk3576 evb2 board dt-bindings: arm: rockchip: Add rk3576 evb2 board arm64: dts: rockchip: Add overlay for FriendlyElec HD702E arm64: dts: rockchip: Move RK3399 eDP pinctrl to boards arm64: dts: rockchip: add overlay for qnap-ts133 device revision arm64: dts: rockchip: add overlay for qnap-ts233 device revision arm64: dts: rockchip: add overlay for qnap-ts433 device revision ... Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2026-03-21x86/um: fix vDSO installationThomas Weißschuh
The generic vDSO installation logic used by 'make vdso_install' requires that $(vdso-install-y) is defined by the top-level architecture Makefile and that it contains a path relative to the root of the tree. For UML neither of these is satisfied. Move the definition of $(vdso-install-y) to a place which is included by the arch/um/Makefile and use the full relative path. Fixes: f1c2bb8b9964 ("um: implement a x86_64 vDSO") Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Link: https://patch.msgid.link/20260318-um-vdso-install-v1-1-26a4ca5c4210@weissschuh.net Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21um: Remove CONFIG_FRAME_WARN from x86_64_defconfigTiwei Bie
The CONFIG_FRAME_WARN=1024 setting in x86_64_defconfig originates from arch/um/defconfig, which was split into i386_defconfig and x86_64_defconfig by commit e40f04d040c6 ("arch/um: make it work with defconfig and x86_64"). Currently, it's even smaller than the default on 32bit (i.e., 1280). It's no longer suitable for 64bit. Building with x86_64_defconfig triggers the following warning: lib/maple_tree.c: In function ‘mas_wr_bnode’: lib/maple_tree.c:3740:1: warning: the frame size of 1056 bytes is larger than 1024 bytes [-Wframe-larger-than=] 3740 | } | ^ Since we have a larger CONFIG_KERNEL_STACK_ORDER on 64bit (twice that of 32bit) by default, we could increase CONFIG_FRAME_WARN accordingly. Let's remove the CONFIG_FRAME_WARN=1024 setting from x86_64_defconfig and just use the default value (2048 for 64bit) defined in lib/Kconfig.debug, as we do for 32bit. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20260308060406.2772832-1-tiwei.btw@antgroup.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21um: Fix pte_read() and pte_exec() for kernel mappingsTiwei Bie
The pte_read() and pte_exec() helpers are only used during the TLB sync to determine the read/exec permissions for mmap. However, for kernel mappings, they will always return 0. This leads to kern_map() having to unconditionally set the exec flag to 1 and the read flag unexpectedly always being 0. Remove the unnecessary check for the _PAGE_USER bit in these helpers to ensure that the kernel mapping permissions can be correctly determined. Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20260302235224.1915380-3-tiwei.btw@antgroup.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21um: Fix potential race condition in TLB syncTiwei Bie
During the TLB sync, we need to traverse and modify the page table, so we should hold the page table lock. Since full SMP support for threads within the same process is still missing, let's disable the split page table lock for simplicity. Fixes: 1e4ee5135d81 ("um: Add initial SMP support") Signed-off-by: Tiwei Bie <tiwei.btw@antgroup.com> Link: https://patch.msgid.link/20260302235224.1915380-2-tiwei.btw@antgroup.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21um: avoid struct sigcontext redefinition with muslMarcel W. Wysocki
mcontext.c includes both <sys/ucontext.h> and <asm/sigcontext.h>. With musl libc, this causes a struct sigcontext redefinition error: <sys/ucontext.h> pulls in musl's <bits/signal.h>, which defines struct sigcontext directly. The kernel's <asm/sigcontext.h> then provides a second, conflicting definition of the same struct. With glibc this does not conflict because glibc's signal headers source their struct sigcontext from the kernel's own UAPI headers, so the include guard in <asm/sigcontext.h> makes the second inclusion a no-op. mcontext.c does not actually use struct sigcontext by name -- it only needs the FP-state types (_fpstate, _xstate, etc.) that are defined in <asm/sigcontext.h> independently of the sigcontext struct. Temporarily rename sigcontext to __kernel_sigcontext during the inclusion of <asm/sigcontext.h> so that the kernel's definition does not collide with musl's. The #undef restores normal name resolution immediately afterward. No functional change with glibc; fixes the build with musl. Signed-off-by: Marcel W. Wysocki <maci.stgn@gmail.com> Link: https://patch.msgid.link/20260215142803.1455757-2-maci.stgn@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21um: fix address-of CMSG_DATA() rvalue in stubMarcel W. Wysocki
The UML stub takes the address of CMSG_DATA(fd_msg): fd_map = (void *)&CMSG_DATA(fd_msg); CMSG_DATA() is specified by POSIX to return unsigned char *. Taking its address is semantically wrong -- the intent is to get a pointer to the control message data, which is exactly what CMSG_DATA() already returns. This happens to compile with glibc because glibc's primary CMSG_DATA definition accesses a flexible array member: #define CMSG_DATA(cmsg) ((cmsg)->__cmsg_data) An array lvalue can have its address taken, and &array yields the same address as array. However, glibc also has an alternative definition that uses pointer arithmetic (returning an rvalue), and musl's definition always uses pointer arithmetic: /* musl */ #define CMSG_DATA(cmsg) \ ((unsigned char *)(((struct cmsghdr *)(cmsg)) + 1)) Taking the address of an rvalue is a hard error in C, so the current code fails to compile with musl libc. Remove the erroneous & operator. The resulting code is correct regardless of the CMSG_DATA implementation -- it simply assigns the data pointer, which is what the subsequent code (fd_map[--num_fds]) expects. No functional change with glibc; fixes the build with musl. Signed-off-by: Marcel W. Wysocki <maci.stgn@gmail.com> Link: https://patch.msgid.link/20260215142803.1455757-1-maci.stgn@gmail.com Signed-off-by: Johannes Berg <johannes.berg@intel.com>
2026-03-21openrisc: mm: Fix section mismatch between map_page and __set_fixmapStafford Horne
This warning was reported by the kernel test robot: WARNING: modpost: vmlinux: section mismatch in reference: __set_fixmap+0x84 (section: .text.unlikely) -> map_page.isra.0 (section: .init.text) With commit 4735037b5d9b ("openrisc: Add text patching API support") the __set_fixmap function was moved out of the .init.text section. However, the map_page helper that it uses was not moved. This was not noticed on gcc 15.1.0 where map_page gets inlined unlike lkp@intel.com which uses gcc 10.5.0. Fix this by also moving the map_page helper function out of the init section. Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202603211503.E8mMETO3-lkp@intel.com/ Fixes: 4735037b5d9b ("openrisc: Add text patching API support") Signed-off-by: Stafford Horne <shorne@gmail.com>
2026-03-21Merge tag 'v7.0-rc4' into timers/core, to resolve conflictIngo Molnar
Resolve conflict between this change in the upstream kernel: 4c652a47722f ("rseq: Mark rseq_arm_slice_extension_timer() __always_inline") ... and this pending change in timers/core: 0e98eb14814e ("entry: Prepare for deferred hrtimer rearming") Signed-off-by: Ingo Molnar <mingo@kernel.org>
2026-03-21arm64: dts: hisilicon: hi3798cv200: Add missing dma-rangesShawn Guo
Reboot starts failing on Poplar since commit 8424ecdde7df ("arm64: mm: Set ZONE_DMA size based on devicetree's dma-ranges"), which effectively changes zone_dma_bits from 30 to 32 for arm64 platforms that do not properly define dma-ranges in device tree. It's unclear how Poplar reboot gets broken by this change exactly, but a dma-ranges limiting zone_dma to the first 1 GB fixes the regression. Fixes: 2f20182ed670 ("arm64: dts: hisilicon: add dts files for hi3798cv200-poplar board") Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2026-03-21arm64: dts: hisilicon: poplar: Correct PCIe reset GPIO polarityShawn Guo
The PCIe reset GPIO on Poplar is actually active low. The active high worked before because kernel driver didn't respect the setting from DT. This is changed since commit 1d26a55fbeb9 ("PCI: histb: Switch to using gpiod API"), and thus PCIe on Poplar got brken since then. Fix the problem by correcting the polarity. Fixes: 32fa01761bd9 ("arm64: dts: hi3798cv200: enable PCIe support for poplar board") Cc: stable@vger.kernel.org Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2026-03-20ARM: dts: BCM5301X: EA9200: specify partitionsRosen Penev
Some are needed to be specified so that linksys,ns-firmware works properly. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-6-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add LEDsRosen Penev
Allows control and configuration of device LEDs. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-4-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add USB GPIOsRosen Penev
Allows at least halt to turn the USB ports off. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-3-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: add WiFi buttonRosen Penev
Adds ability to configure the WiFi button. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260319035324.269905-2-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: broadcom: bcm2835-rpi: Move non simple-bus nodes to root levelRob Herring (Arm)
The 'gpu' and 'firmware' nodes are not MMIO devices, so they should not be under a 'simple-bus'. Additionally, the "raspberrypi,bcm2835-power" node is part of the firmware, so move it under the 'rpi-firmware' node. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260320154809.1246064-1-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63148: Add I2C blockLinus Walleij
The BCM63148 has a brcmper I2C block. The peripheral range needs to be extended to accommodate it. The Boot LUT is at offset + 0x10000 so extend it to cover at least that too, 128 KB. INTERRUPT_ID_I2C is at (ISR_TABLE3_OFFSET + 19) = 96+19 = 115, convert back to SPI IRQ 115-32 = 83. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-7-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63138: Add I2C blockLinus Walleij
The BCM63138 has a brcmper I2C block. The interrupt is at INTERRUPT_ID_I2C whic is (ISR_TABLE3_OFFSET + 19) = 96+115, convert back to SPI interrupt 115-32 = 83. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-6-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6878: Add I2C bus blockLinus Walleij
The BCM6878 has an brcmper I2C block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-5-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6855: Add I2C bus blocksLinus Walleij
The BCM6855 has two brcmper I2C blocks, the second one in the PERF1 area at 0xff85a800, this is covered by the current bus range. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-4-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6846: Add I2C bus blockLinus Walleij
The BCM6846 has a brcmper I2C block. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-3-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm63138: Fix DMA IRQLinus Walleij
INTERRUPT_ID_PL081 is (ISR_TABLE_3_OFFSET + 23) which is 96+3 = 119, convert back to SPI interrupt 119-32 = 87. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-2-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: bcm6878: Fix PL081 DMA block IRQLinus Walleij
SPI_TABLE_OFFSET_2 is 96 in 6878. 96+30 = 126. Convert back dtsi SPI interrupt 126 - 32 = 94 Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20260218-bcmbca-i2c-dts-v2-1-5373ef82c50c@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: AC5300: set WAN MAC from nvramRosen Penev
The WAN MAC is offset by 1. Set in dts to avoid having to handle this in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-5-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: AC3100: set WAN MAC from nvramRosen Penev
The WAN MAC is offset by 1. Set it to avoid having to do so in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-4-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: panamera: set WAN MAC from nvramRosen Penev
The MAC address from the stock firmware is offset by 1. Define it properly to avoid having to override it in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-3-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20ARM: dts: BCM5301X: EA9200: set WAN MAC from nvramRosen Penev
The MAC address from the stock firmware is offset by 1. Define it properly to avoid having to override it in userspace. Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://lore.kernel.org/r/20260225230827.21715-2-rosenp@gmail.com Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20x86/platform/uv: Handle deconfigured socketsKyle Meyer
When a socket is deconfigured, it's mapped to SOCK_EMPTY (0xffff). This causes a panic while allocating UV hub info structures. Fix this by using NUMA_NO_NODE, allowing UV hub info structures to be allocated on valid nodes. Fixes: 8a50c5851927 ("x86/platform/uv: UV support for sub-NUMA clustering") Signed-off-by: Kyle Meyer <kyle.meyer@hpe.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Steve Wahl <steve.wahl@hpe.com> Cc: stable@vger.kernel.org Link: https://patch.msgid.link/ab2BmGL0ehVkkjKk@hpe.com
2026-03-20riscv: dts: thead: th1520: add coefficients to the PVT nodeIcenowy Zheng
The manual of TH1520 contains a set of coefficients a little different to the driver default ones. Add them to the device tree node of PVT. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Signed-off-by: Icenowy Zheng <zhengxingda@iscas.ac.cn> Reviewed-by: Drew Fustini <fustini@kernel.org> Signed-off-by: Drew Fustini <fustini@kernel.org>
2026-03-20arm64: dts: broadcom: bcm2712: Move non simple-bus nodes to root levelRob Herring (Arm)
The 'gpu' and 'firmware' nodes are not MMIO devices, so they should not be under a 'simple-bus', but at the root level. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260320154809.1246064-2-robh@kernel.org Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2026-03-20x86/entry/vdso: Fix path of included gettimeofday.cVladimir Oltean
Commit in Fixes forgot to convert one include path to be relative to the kernel source directory after adding latter to flags-y. Fix it. [ bp: Rewrite commit message. ] Fixes: 693c819fedcd ("x86/entry/vdso: Refactor the vdso build") Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/r/20260307174406.1808981-1-vladimir.oltean@nxp.com
2026-03-20Merge tag 'arm64-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 fixes from Will Deacon: "There's a small crop of fixes for the MPAM resctrl driver, a fix for SCS/PAC patching with the AMDGPU driver and a page-table fix for realms running with 52-bit physical addresses: - Fix DWARF parsing for SCS/PAC patching to work with very large modules (such as the amdgpu driver) - Fixes to the mpam resctrl driver - Fix broken handling of 52-bit physical addresses when sharing memory from within a realm" * tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: arm64: realm: Fix PTE_NS_SHARED for 52bit PA support arm_mpam: Force __iomem casts arm_mpam: Disable preemption when making accesses to fake MSC in kunit test arm_mpam: Fix null pointer dereference when restoring bandwidth counters arm64/scs: Fix handling of advance_loc4
2026-03-20Merge tag 'hyperv-fixes-signed-20260319' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux Pull Hyper-V fixes from Wei Liu: - Fix ARM64 MSHV support (Anirudh Rayabharam) - Fix MSHV driver memory handling issues (Stanislav Kinsburskii) - Update maintainers for Hyper-V DRM driver (Saurabh Sengar) - Misc clean up in MSHV crashdump code (Ard Biesheuvel, Uros Bizjak) - Minor improvements to MSHV code (Mukesh R, Wei Liu) - Revert not yet released MSHV scrub partition hypercall (Wei Liu) * tag 'hyperv-fixes-signed-20260319' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux: mshv: Fix error handling in mshv_region_pin MAINTAINERS: Update maintainers for Hyper-V DRM driver mshv: Fix use-after-free in mshv_map_user_memory error path mshv: pass struct mshv_user_mem_region by reference x86/hyperv: Use any general-purpose register when saving %cr2 and %cr8 x86/hyperv: Use current_stack_pointer to avoid asm() in hv_hvcrash_ctxt_save() x86/hyperv: Save segment registers directly to memory in hv_hvcrash_ctxt_save() x86/hyperv: Use __naked attribute to fix stackless C function Revert "mshv: expose the scrub partition hypercall" mshv: add arm64 support for doorbell & intercept SINTs mshv: refactor synic init and cleanup x86/hyperv: print out reserved vectors in hexadecimal
2026-03-20x86/efi: efi_unmap_boot_services: fix calculation of ranges_to_free sizeMike Rapoport (Microsoft)
ranges_to_free array should have enough room to store the entire EFI memmap plus an extra element for NULL entry. The calculation of this array size wrongly adds 1 to the overall size instead of adding 1 to the number of elements. Add parentheses to properly size the array. Reported-by: Guenter Roeck <linux@roeck-us.net> Fixes: a4b0bf6a40f3 ("x86/efi: defer freeing of boot services memory") Signed-off-by: Mike Rapoport (Microsoft) <rppt@kernel.org> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
2026-03-20clocksource: Rewrite watchdog code completelyThomas Gleixner
The clocksource watchdog code has over time reached the state of an impenetrable maze of duct tape and staples. The original design, which was made in the context of systems far smaller than today, is based on the assumption that the to be monitored clocksource (TSC) can be trivially compared against a known to be stable clocksource (HPET/ACPI-PM timer). Over the years it turned out that this approach has major flaws: - Long delays between watchdog invocations can result in wrap arounds of the reference clocksource - Scalability of the reference clocksource readout can degrade on large multi-socket systems due to interconnect congestion This was addressed with various heuristics which degraded the accuracy of the watchdog to the point that it fails to detect actual TSC problems on older hardware which exposes slow inter CPU drifts due to firmware manipulating the TSC to hide SMI time. To address this and bring back sanity to the watchdog, rewrite the code completely with a different approach: 1) Restrict the validation against a reference clocksource to the boot CPU, which is usually the CPU/Socket closest to the legacy block which contains the reference source (HPET/ACPI-PM timer). Validate that the reference readout is within a bound latency so that the actual comparison against the TSC stays within 500ppm as long as the clocks are stable. 2) Compare the TSCs of the other CPUs in a round robin fashion against the boot CPU in the same way the TSC synchronization on CPU hotplug works. This still can suffer from delayed reaction of the remote CPU to the SMP function call and the latency of the control variable cache line. But this latency is not affecting correctness. It only affects the accuracy. With low contention the readout latency is in the low nanoseconds range, which detects even slight skews between CPUs. Under high contention this becomes obviously less accurate, but still detects slow skews reliably as it solely relies on subsequent readouts being monotonically increasing. It just can take slightly longer to detect the issue. 3) Rewrite the watchdog test so it tests the various mechanisms one by one and validating the result against the expectation. Signed-off-by: Thomas Gleixner <tglx@kernel.org> Tested-by: Borislav Petkov (AMD) <bp@alien8.de> Tested-by: Daniel J Blueman <daniel@quora.org> Reviewed-by: Jiri Wiesner <jwiesner@suse.de> Reviewed-by: Daniel J Blueman <daniel@quora.org> Link: https://patch.msgid.link/20260123231521.926490888@kernel.org Link: https://patch.msgid.link/87h5qeomm5.ffs@tglx
2026-03-20arm64: dts: renesas: rzt2h-rzn2h-evk: Fix GMAC pins sort orderGeert Uytterhoeven
Restore alphabetical sort order of the pin control subnodes by exchanging the gmac1-pins and gmac2-pins nodes. While at it, fix the index in an incorrect "GMAC2" comment. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://patch.msgid.link/4ce75f75a0569a4cc6f74dfda8b75f6f1a2495c1.1773842409.git.geert+renesas@glider.be
2026-03-20arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Add PHY interrupt supportLad Prabhakar
Add interrupt support for the GMAC1 and GMAC2 PHYs on the RZ/T2H EVK board. The PHYs are connected to the ICU via IRQ3 and IRQ13 lines respectively. Define RZT2H_IRQxx macros in the SoC DTSI to map the ICU IRQ_NS lines to their absolute ICU interrupt space offsets. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260312160407.3387840-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-20arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Add PHY interrupt supportLad Prabhakar
Add interrupt support for the GMAC1 and GMAC2 PHYs on the RZ/N2H EVK board. The PHYs are connected to the ICU via IRQ14 and IRQ15 lines respectively. Define RZN2H_IRQxx macros in the SoC DTSI to map the ICU IRQ_NS lines to their absolute ICU interrupt space offsets. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260312160407.3387840-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-20arm64: dts: renesas: r9a09g057h48-kakip: Add pixpaper display overlayWig Cheng
Add device tree overlay to support the MayQueen PixPaper e-paper display on the Renesas RZ/V2H EVK (KAKIP board). The display is connected via SPI0 interface and uses GPIO pins for reset, busy, and DC control. The overlay configures: - RSPI0 pinmux for SPI communication (MOSI, MISO, CLK, CE0), - PixPaper display device with proper GPIO assignments, - SPI frequency set to 1MHz for stable operation. This enables support for the Open-EP Community pixpaper-213-c module on the RZ/V2H platform. Signed-off-by: Wig Cheng <onlywig@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260124163611.3279104-1-onlywig@gmail.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-20arm64: dts: renesas: r9a09g087m44-rzn2h-evk: Clarify SD0 power jumper setupLad Prabhakar
Document the required JP23 jumper positions for supplying SD0 when selecting between the onboard eMMC and the SD card slot. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260123225957.1007089-4-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-20arm64: dts: renesas: r9a09g077m44-rzt2h-evk: Clarify SD0 power jumpersLad Prabhakar
Clarify the board setup requirements for using SDHI0 on the RZ/T2H EVK by documenting the CN78 jumper positions needed to supply SD0 power for either the default eMMC configuration or the SD card slot configuration. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260123225957.1007089-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-03-20arm64: dts: microchip: add EV23X71A boardRobert Marko
Microchip EV23X71A is an LAN9696 based evaluation board. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev> Acked-by: Daniel Machon <daniel.machon@microchip.com> Tested-by: Daniel Machon <daniel.machon@microchip.com> Link: https://lore.kernel.org/r/20260302112153.464422-7-robert.marko@sartura.hr Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>