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2026-06-13ixgbe: e610: remove redundant assignmentPiotr Kwapulinski
Remove unnecessary code. No functional impact. Signed-off-by: Piotr Kwapulinski <piotr.kwapulinski@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20260609213559.178657-6-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net/intel: Replace manual array size calculation with ARRAY_SIZEJakub Raczynski
There are still places in the code where manual calculation of array size exist, but it is good to enforce usage of single macro through the whole code as it makes code bit more readable. While at it, beautify condition surrounding it by reversing check and remove unnecessary casting. Signed-off-by: Jakub Raczynski <j.raczynski@samsung.com> Reviewed-by: Dan Carpenter <error27@gmail.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20260609213559.178657-5-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13iavf: iavf_virtchnl_completion: drop duplicate ether_addr_equal() testCorinna Vinschen
This is just a simple cleanup fix. Commit 35a2443d0910f ("iavf: Add waiting for response from PF in set mac") introduced a duplicate ether_addr_equal() check, so the current code tests the new MAC twice against the former MAC. Remove the outer ether_addr_equal() test, remnant of commit c5c922b3e09b ("iavf: fix MAC address setting for VFs when filter is rejected") Signed-off-by: Corinna Vinschen <vinschen@redhat.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Tested-by: Rafal Romanowski <rafal.romanowski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20260609213559.178657-4-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ice: remove redundant checks from PTP initNatalia Wochtman
Remove unnecessary condition checks in ice_ptp_setup_adapter() and ice_ptp_init(). They are duplicated in ice_pf_src_tmr_owned(). Change ice_ptp_setup_adapter() to return void. Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Natalia Wochtman <natalia.wochtman@intel.com> Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20260609213559.178657-3-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13idpf: Replace use of system_unbound_wq with system_dfl_wqMarco Crivellari
This patch continues the effort to refactor workqueue APIs, which has begun with the changes introducing new workqueues and a new alloc_workqueue flag: commit 128ea9f6ccfb ("workqueue: Add system_percpu_wq and system_dfl_wq") commit 930c2ea566af ("workqueue: Add new WQ_PERCPU flag") The point of the refactoring is to eventually alter the default behavior of workqueues to become unbound by default so that their workload placement is optimized by the scheduler. Before that to happen, workqueue users must be converted to the better named new workqueues with no intended behaviour changes: system_wq -> system_percpu_wq system_unbound_wq -> system_dfl_wq This way the old obsolete workqueues (system_wq, system_unbound_wq) can be removed in the future. Link: https://lore.kernel.org/all/20250221112003.1dSuoGyc@linutronix.de/ Suggested-by: Tejun Heo <tj@kernel.org> Signed-off-by: Marco Crivellari <marco.crivellari@suse.com> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Tested-by: Samuel Salin <Samuel.salin@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Link: https://patch.msgid.link/20260609213559.178657-2-anthony.l.nguyen@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: npc: cn20k: Allocate npc_priv and dstats dynamically.Ratheesh Kannoth
Replace the file-scope static npc_priv with a kcalloc'd struct filled from hardware bank/subbank geometry at init (num_banks is no longer a const compile-time constant; drop init_done and use a non-NULL npc_priv pointer for liveness). Thread npc_priv_get() / pointer access through the CN20K NPC code paths, extend teardown to kfree the root struct on failure and in npc_cn20k_deinit, and adjust MCAM section setup to use the discovered subbank count. Allocate MCAM debugfs dstats via devm_kzalloc instead of a static matrix, and use the allocated backing store consistently when computing deltas (including the counter rollover compare). Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-10-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2: cn20k: Respect NPC MCAM X2/X4 profile in flows and DFT allocRatheesh Kannoth
Default CN20K NPC rule allocation now keys off the active MCAM keyword width: use X4 with a bank-masked reference index when the silicon uses X4 keys, and X2 with the raw index otherwise (replacing the previous always-X2 / eidx + 1 behaviour). In the AF flow-install path, flows that need more than 256 key bits query the NPC profile; if the platform is fixed to X2 entries, fail with -EOPNOTSUPP instead of requesting X4. Otherwise select X4 for the MCAM alloc. On the PF, cache and pass the profile kw_type from npc_get_pfl_info through otx2_mcam_pfl_info_get(), and use it when allocating MCAM entries for RSS/defaults and when installing ethtool flows on CN20K, including masking the reference index for X4 slot layout. Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-9-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: npc: Support for custom KPU profile from filesystemRatheesh Kannoth
Flashing updated firmware on deployed devices is cumbersome. Provide a mechanism to load a custom KPU (Key Parse Unit) profile directly from the filesystem at module load time. When the rvu_af module is loaded with the kpu_profile parameter, the specified profile is read from /lib/firmware/kpu and programmed into the KPU registers. Add npc_kpu_profile_cam2 for the extended cam format used by filesystem-loaded profiles and support ptype/ptype_mask in npc_config_kpucam when profile->from_fs is set. Usage: 1. Copy the KPU profile file to /lib/firmware/kpu. 2. Build OCTEONTX2_AF as a module. 3. Load: insmod rvu_af.ko kpu_profile=<profile_name> Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-8-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2: cn20k: Coordinate default rules with NIX LF lifecycleRatheesh Kannoth
Add NIX_LF_DONT_FREE_DFT_IDXS so the PF can send NIX LF free during hw reinit or teardown without the AF freeing CN20K default NPC rule indexes while the driver still owns that state (otx2_init_hw_resources and otx2_free_hw_resources). On CN20K, allocate default NPC rules from NIX LF alloc before nix_interface_init, roll back with npc_cn20k_dft_rules_free on failure, and free from NIX LF free when the new flag is not set. Tighten rvu_mbox_handler_nix_lf_alloc error handling: use a single rc, propagate qmem_alloc and other errors, and set -ENOMEM only when kcalloc fails (remove the blanket -ENOMEM at the free_mem path). Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-7-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: npc: cn20k: add subbank search order controlRatheesh Kannoth
CN20K NPC MCAM is split into 32 subbanks that are searched in a predefined order during allocation. Lower-numbered subbanks have higher priority than higher-numbered ones. Add a runtime "srch_order" to control the order in which subbanks are searched during MCAM allocation. Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-6-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: npc: cn20k: debugfs enhancementsRatheesh Kannoth
Improve MCAM visibility and field debugging for CN20K NPC. - Extend "mcam_layout" to show enabled (+) or disabled state per entry so status can be verified without parsing the full "mcam_entry" dump. - Add "dstats" debugfs entry: for enabled MCAM indices, print hit deltas since the prior read by comparing hardware counters to a per-entry software baseline and advancing that baseline after each read (hardware counters are not cleared). - Add "mismatch" debugfs entry: lists MCAM entries that are enabled but not explicitly allocated, helping diagnose allocation/field issues. Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-3-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: enforce single RVU AF probeRatheesh Kannoth
On Octeon series SoCs, the AF is an integrated device within the SoC, and hardware resources such as NPC, NIX and related blocks are global and coordinated by the AF driver. Physical and virtual functions request those resources via AF mailbox messages, so two AF driver instances cannot both own that global state; firmware exposes only one AF PCI function at boot and any further octeontx2-af PCI probe returns -EBUSY so software matches the single-AF model. Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260609040453.711932-2-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net/stmmac: Apply MTL_MAX queue limit if config missingJakub Raczynski
When "snps,rx-queues-to-use" or "tx-queues-to-use" config in DTS is provided current code will apply U8_MAX value for queues_to_use if there is input of higher value. But actual maximum number of supported queues is set via macro MTL_MAX_RX_QUEUES and MTL_MAX_TX_QUEUES, which currently have value of 8. This value of U8_MAX will be capped to value provided by core in DMA capabilities (dma_conf), but it does so only if core provides it. This is true for XGMAC (dwxgmac2) and some GMAC (dwmac4), but not for (dwmac1000). This capping is at later stage in stmmac_hw_init(), and during stmmac_mtl_setup() we might parse fields outside allocated memory if queues_to_use is over defines MTL_MAX_ values, for example following rx_queues_cfg is array of size of MTL_MAX_RX_QUEUES. Fix this by capping value to MTL_MAX during config parsing. Reported-by: Sashiko <sashiko-bot@kernel.org> Signed-off-by: Jakub Raczynski <j.raczynski@samsung.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260611113358.3379518-3-j.raczynski@samsung.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net/stmmac: Apply TBS config only to used queuesJakub Raczynski
While opening stmmac driver, there is enabling of TBS (Time-Based Scheduling) option in dma config. Currently this is executed for all possible TX queues via MTL_MAX_TX_QUEUES macro, but actual number of queues used might differ. While setting this is generally harmless, since memory for MTL_MAX_TX_QUEUES is allocated, it is incorrect, because it prepares config for unused queues. Change this to apply tbs config only to tx_queues_to_use. Co-developed-by: Chang-Sub Lee <cs0617.lee@samsung.com> Signed-off-by: Chang-Sub Lee <cs0617.lee@samsung.com> Signed-off-by: Jakub Raczynski <j.raczynski@samsung.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260611113358.3379518-2-j.raczynski@samsung.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: airoha: Fix debugfs new-tuple display for IPv4 ROUTE entriesWayen.Yan
In airoha_ppe_debugfs_foe_show(), the second switch statement falls through from PPE_PKT_TYPE_IPV4_HNAPT/DSLITE to PPE_PKT_TYPE_IPV4_ROUTE, accessing hwe->ipv4.new_tuple for all three types. However, IPv4 ROUTE (3-tuple) entries do not contain a valid new_tuple — this field is only meaningful for NATted flows (HNAPT/DSLITE). For ROUTE entries, the memory at the new_tuple offset holds routing information, not NAT data, so displaying "new=" produces garbage output. Display new_tuple only for HNAPT and DSLITE, and let IPV4_ROUTE fall through to the default case. Fixes: 3fe15c640f38 ("net: airoha: Introduce PPE debugfs support") Link: https://lore.kernel.org/6a2b40ea.4dd82583.3a5c46.e5a2@mx.google.com Signed-off-by: Wayen.Yan <win847@gmail.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://patch.msgid.link/6a2be54b.ef98c1b2.3c3224.2ed8@mx.google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: airoha: Fix register index for Tx-fwd counter configurationWayen.Yan
In airoha_qdma_init_qos_stats(), the Tx-fwd counter configuration register uses the same index (i << 1) as the Tx-cpu counter, which overwrites the Tx-cpu configuration. The Tx-fwd counter value register correctly uses (i << 1) + 1, so the configuration register should use the same index. Fix the REG_CNTR_CFG index from (i << 1) to ((i << 1) + 1) so that the Tx-fwd counter is properly configured instead of clobbering the Tx-cpu counter config. Fixes: 20bf7d07c956 ("net: airoha: Add sched ETS offload support") Signed-off-by: Wayen.Yan <win847@gmail.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://patch.msgid.link/6a2b40e7.4dd82583.3a5c46.e566@mx.google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: airoha: better handle MIBs for GDM ports with multiple devs attachedLorenzo Bianconi
In the context of a GDM port that can have multiple net_devices attached (GDM3 and GDM4), the HW counters (MIBs) are global for the GDM port. This cause duplicated stats reported to the kernel for the related net_device. The SoC supports a split MIB feature where each counter is tracked based on the relevant HW channel (NBQ) to account for this scenario and provide a way to select the related counter on accessing the MIB registers. Enable this feature for GDM3 and GDM4 and configure the relevant HW channel before updating the HW stats to report correct HW counter to the kernel for the related interface. Move the stats struct from port to dev since HW counter are now specific to the network device instead of the GDM port. Refactor airoha_update_hw_stats() to take airoha_eth and airoha_gdm_port parameters since the function operates on the entire port. Co-developed-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260611-airoha-eth-multi-serdes-stats-v1-1-42442ae42064@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13octeontx2-af: fix NPC mailbox codes in mbox.hRatheesh Kannoth
Several NPC mailbox command IDs in the 0x601x range were assigned out of order. Renumber and reorder the M() definitions so each opcode matches the stable contract expected by userspace tools and applications. Fixes: 4e527f1e5c15 ("octeontx2-af: npc: cn20k: Add new mailboxes for CN20K silicon") Cc: Suman Ghosh <sumang@marvell.com> Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Reviewed-by: Simon Horman <horms@kernel.org> Link: https://patch.msgid.link/20260611083330.1652181-1-rkannoth@marvell.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ethernet: 3c509: Improve style of pnp_device_id array terminatorUwe Kleine-König (The Capable Hub)
To match how device-id array terminators look like for other device types drop `.id = ""` from it and let the compiler care for zeroing the entry. There are no changes in the compiled drivers, only the source looks nicer. Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com> Link: https://patch.msgid.link/a0cd057e6a24b9d355b5e4bdfcdb812cdd1e4652.1781082923.git.u.kleine-koenig@baylibre.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: bcmgenet: Use weighted round-robin TX DMA arbitrationOvidiu Panait
Under heavy network traffic, we observed sporadic TX queue timeouts on the Raspberry Pi 4. The timeouts can be reproduced by stress testing the TX path with multiple concurrent iperf UDP streams: iperf3 -c <ip> -u -b0 -P16 -t60 NETDEV WATCHDOG: CPU: 0: transmit queue 0 timed out 2044 ms NETDEV WATCHDOG: CPU: 3: transmit queue 0 timed out 2004 ms Investigation showed that the timeouts are caused by the priority-based arbiter. Under heavy load the highest priority queue starves the lower priority ones, causing timeouts. The TX strict priority arbiter is not suitable for the default use case where all the traffic gets spread across all the TX queues. Therefore, to fix this, switch the TX DMA arbiter to Weighted Round-Robin, which services all queues, so they do not stall. The weights were chosen to follow the existing priority scheme: q0 gets the smallest weight, while q1-4 get the bulk of the TX bandwidth. Fixes: 1c1008c793fa ("net: bcmgenet: add main driver file") Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@renesas.com> Link: https://patch.msgid.link/20260610085238.56300-1-ovidiu.panait.rb@renesas.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ice: implement E825 TX ref clock control and TXC hardware sync statusGrzegorz Nitka
Build on the previously introduced TXC DPLL framework and implement full TX reference clock control and hardware-backed synchronization status reporting for E825 devices. E825 firmware may accept or override TX reference clock requests based on device-wide routing constraints and link conditions. Because the final selection becomes visible only after a link-up event, the driver splits the observation into two complementary signals: - TXCLK pin state reflects the requested TX reference clock (pf->ptp.port.tx_clk_req). After a link-up, the value is reconciled against the SERDES reference selector by ice_txclk_update_and_notify(); if firmware or auto-negotiation selected a different clock, tx_clk_req is overwritten so that pin state converges to the actual hardware selection. - TXC DPLL lock status reflects hardware synchronization: * LOCKED when an external TX reference is in use * UNLOCKED when falling back to ENET/TXCO, or when a requested external reference has not (yet) been accepted by hardware. Userspace observing only pin state therefore sees user intent, while lock status is the authoritative indicator of whether the requested clock is actually selected and synchronizing. This matches the DPLL subsystem model where pin state describes topology and device lock status describes signal quality. TX reference selection topology: - External references (SYNCE, EREF0) are represented as TXCLK pins - The internal ENET/TXCO clock has no pin representation; when selected, all TXCLK pins are reported DISCONNECTED With this change, TX reference clocks on E825 devices can be reliably selected, observed via standard DPLL interfaces, and monitored for effective synchronization through TXC DPLL lock status. Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Link: https://patch.msgid.link/20260607183045.1213735-14-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ice: add Tx reference clock index handling to AN restart commandGrzegorz Nitka
Extend the Restart Auto-Negotiation (AN) AdminQ command with a new parameter allowing software to specify the Tx reference clock index to be used during link restart. This patch: - adds REFCLK field definitions to ice_aqc_restart_an - updates ice_aq_set_link_restart_an() to take a new refclk parameter and properly encode it into the command - keeps legacy behavior by passing REFCLK_NOCHANGE where appropriate This prepares the driver for configurations requiring dynamic selection of the Tx reference clock as part of the AN flow. Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Link: https://patch.msgid.link/20260607183045.1213735-13-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ice: implement CPI support for E825CGrzegorz Nitka
Add full CPI (Converged PHY Interface) command handling required for E825C devices. The CPI interface allows the driver to interact with PHY-side control logic through the LM/PHY command registers, including enabling/disabling/selection of PHY reference clock. This patch introduces: - a new CPI subsystem (ice_cpi.c / ice_cpi.h) implementing the CPI request/acknowledge state machine, including REQ/ACK protocol, command execution, and response handling - helper functions for reading/writing PHY registers over Sideband Queue - CPI command execution API (ice_cpi_exec) and a helper for enabling or disabling Tx reference clocks (CPI 0xF1 opcode 'Config PHY clocking') - assurance of CPI transaction serialization into the CPI core. CPI REQ/ACK is a multi-step handshake and must be executed atomically per PHY. Centralize the lock in ice_cpi_exec() and use adapter-scoped per-PHY mutexes, which match the hardware sharing model across PFs. - addition of the non-posted write opcode (wr_np) to SBQ - Makefile integration to build CPI support together with the PTP stack This provides the infrastructure necessary to support PHY-side configuration flows on E825C and is required for advanced link control and Tx reference clock management. Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Link: https://patch.msgid.link/20260607183045.1213735-12-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13ice: introduce TXC DPLL device and TX ref clock pin framework for E825Grzegorz Nitka
E825 devices provide a dedicated TX clock (TXC) domain which may be driven by multiple reference clock sources, including external board references and port-derived SyncE. To support future TX clock control and observability through the Linux DPLL subsystem, introduce a separate TXC DPLL device (of DPLL_TYPE_GENERIC) and a framework for representing TX reference clock inputs. This change adds a new internal DPLL pin type (TXCLK) and registers TX reference clock pins for E825-based devices: - EXT_EREF0: a board-level external electrical reference - SYNCE: a port-derived SyncE reference described via firmware nodes The TXC DPLL device is created and managed alongside the existing PPS and EEC DPLL instances. TXCLK pins are registered directly or deferred via a notifier when backed by fwnode-described pins. A per-pin attribute encodes the TX reference source associated with each TXCLK pin. At this stage, TXCLK pin state callbacks and TXC DPLL lock status reporting are implemented as placeholders. Pin state getters always return DISCONNECTED, and the TXC DPLL is initialized in the UNLOCKED state. No hardware configuration or TX reference switching is performed yet. This patch establishes the structural groundwork required for hardware-backed TX reference selection, verification, and synchronization status reporting, which will be implemented in subsequent patches. Also signal dpll_init from the fwnode pin init error path so any notifier worker already blocked on it can drain, avoiding a flush_workqueue() deadlock during teardown. Reviewed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Link: https://patch.msgid.link/20260607183045.1213735-11-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: wwan: t7xx: check skb_clone in control TXRuoyu Wang
t7xx_port_ctrl_tx() clones each skb fragment before passing it to the port transmit path. The clone is used immediately to set cloned->len, so an skb_clone() failure results in a NULL pointer dereference. Check the clone before using it. If previous fragments were already queued, preserve the driver's existing partial-write behavior by returning the number of bytes submitted so far. Fixes: 36bd28c1cb0d ("wwan: core: Support slicing in port TX flow of WWAN subsystem") Signed-off-by: Ruoyu Wang <ruoyuw560@gmail.com> Reviewed-by: Loic Poulain <loic.poulain@oss.qualcomm.com> Link: https://patch.msgid.link/20260612035613.1192486-1-ruoyuw560@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: ethernet: mtk_wed: debugfs: correct index in wed_amsdu_show()Wentao Guan
WED_MON_AMSDU_ENG_CNT point to different entry by 'base+n*offset' mode, correct the wed amsdu entry number in wed_amsdu_show(). Fixes: 3f3de094e8342 ("net: ethernet: mtk_wed: debugfs: add WED 3.0 debugfs entries") Signed-off-by: Wentao Guan <guanwentao@uniontech.com> Link: https://patch.msgid.link/20260612064501.203058-1-guanwentao@uniontech.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13netdevsim: tc: allow to test nf_tables offload control plane codeFlorian Westphal
The actual 'offload' is phony, all commands are ignored: this is only useful to test control plane code. Tag the existing callback to permit error injection to test rollback/abort code in nf_tables. This is also for fuzzers - the fault injection framework allows probabilistic error insertion. Signed-off-by: Florian Westphal <fw@strlen.de> Link: https://patch.msgid.link/20260612092209.11966-2-fw@strlen.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13net: airoha: Fix error handling in airoha_ppe_flush_sram_entries()Wayen.Yan
In airoha_ppe_flush_sram_entries(), the outer "err" variable was never updated when the inner loop variable shadowed it, causing the function to always return 0 even when airoha_ppe_foe_commit_sram_entry() fails. Drop the outer "err" variable and return directly on error, propagating the error code from airoha_ppe_foe_commit_sram_entry() correctly. Fixes: 620d7b91aadb ("net: airoha: ppe: Flush PPE SRAM table during PPE setup") Link: https://lore.kernel.org/netdev/6a2b40e4.4dd82583.3a5c46.e52f@mx.google.com/ Signed-off-by: Wayen.Yan <win847@gmail.com> Acked-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://patch.msgid.link/6a2bd37a.4034e349.1b41bb.1caf@mx.google.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-13Merge branch '200GbE' of ↵Paolo Abeni
git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue Tony Nguyen says: ==================== Intel Wired LAN Driver Updates 2026-06-09 (idpf, ixgbe, igc) Przemyslaw adds needed padding to idpf PTP structures to match firmware expectations. Larysa bypasses XPS configuration on XDP queues for ixgbe. Khai Wen corrects offset into packet buffer when handling for frame preemption on igc. * '200GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue: igc: skip RX timestamp header for frame preemption verification ixgbe: do not configure xps for XDP queues idpf: add padding to PTP virtchnl structures ==================== Link: https://patch.msgid.link/ Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-06-13octeontx2-af: npc: Fix size of entry2cntr_mapRatheesh Kannoth
KASAN prints below splat. This is caused by allocating counter for reserved mcam entry for cpt 2nd pass entry. But mcam->entry2cntr_map is not allocated for reserved entries. BUG: KASAN: slab-out-of-bounds in npc_map_mcam_entry_and_cntr+0xb0/0x1a0 Write of size 2 at addr ffff0001033e7ffe by task kworker/0:1/14 CPU: 0 PID: 14 Comm: kworker/0:1 Not tainted 6.1.67 #1 Hardware name: Marvell CN106XX board (DT) Workqueue: events work_for_cpu_fn Call trace: dump_backtrace.part.0+0xe4/0xf0 show_stack+0x18/0x30 dump_stack_lvl+0x88/0xb4 print_report+0x154/0x458 kasan_report+0xb8/0x194 __asan_store2+0x7c/0xa0 npc_map_mcam_entry_and_cntr+0xb0/0x1a0 rvu_mbox_handler_npc_mcam_write_entry+0x268/0x280 npc_install_flow+0x840/0xfe0 rvu_npc_install_cpt_pass2_entry+0x138/0x190 rvu_nix_init+0x148c/0x2880 rvu_probe+0x1800/0x30b0 local_pci_probe+0x78/0xe0 work_for_cpu_fn+0x30/0x50 process_one_work+0x4cc/0x97c worker_thread+0x360/0x630 kthread+0x1a0/0x1b0 ret_from_fork+0x10/0x20 Fixes: 55307fcb9258 ("octeontx2-af: Add mbox messages to install and delete MCAM rules") Cc: Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com> Link: https://patch.msgid.link/20260610022344.969774-1-rkannoth@marvell.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-06-12net/mlx5: Check max_macs devlink param value against max capabilityDragos Tatulea
The max_macs devlink param is checked against the FW max value only at param register time (driver load) and inside the validate callback (devlink param set). The stored DRIVERINIT value persists across FW resets and devlink reloads without any further checks against the max. If the FW link type changes from Ethernet to IB and a FW reset happens, the MAX cap for log_max_current_uc_list will become zero, but the previously stored max_macs value remains and is unconditionally programmed into the HCA caps in handle_hca_cap(). FW will then return a syndrome during SET_HCA_CAP: mlx5_cmd_out_err:839:(pid 3831): SET_HCA_CAP(0x109) op_mod(0x0) failed, status bad parameter(0x3), syndrome (0x537801), err(-22) set_hca_cap:907:(pid 3831): handle_hca_cap failed This results in a failure to register the RDMA device. This patch skips programming log_max_current_uc_list when the MAX capability is 0 (in case of IB). Fixes: 8680a60fc1fc ("net/mlx5: Let user configure max_macs generic param") Signed-off-by: Dragos Tatulea <dtatulea@nvidia.com> Reviewed-by: Yael Chemla <ychemla@nvidia.com> Reviewed-by: Carolina Jubran <cjubran@nvidia.com> Signed-off-by: Tariq Toukan <tariqt@nvidia.com> Reviewed-by: Alexander Lobakin <aleksander.lobakin@intel.com> Link: https://patch.msgid.link/20260611135230.534513-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement port_teardown only if neededBastien Curutchet (Schneider Electric)
The port_teardown() operation is optional. Yet, it is implemented by all the KSZ switches through a common function that doesn't do anything for the switches that aren't part of the ksz9477 family Remove the implementation from the switches that don't need it. Implement instead a ksz9477-specific port_teardown. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-10-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement lan937x-specific MDIO registrationBastien Curutchet (Schneider Electric)
All the switches use a common mdio_register() function that uses two ksz_dev_ops callbacks (.mdio_bus_preinit() and .create_phy_addr_map()) to handle the lan937x specific case. These two callbacks are used only at this place in the code. Implement a new lan937x-specific MDIO registration functions that uses these two lan937x-specific functions. The lan937x bindings don't have any 'interrupts' property so this lan937x_mdio_register() doesn't call ksz_irq_phy_setup(). Expose the common ksz_*_mdio_{read/write} functions so they can be used in lan937x.c Remove the callbacks from ksz_dev_ops. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-9-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement port_hsr_join for KSZ9477 onlyBastien Curutchet (Schneider Electric)
All switches implement the optional .port_hsr_join operation while only the KSZ9477 truly supports it. Remove the common port_hsr_join implementation. Replace it with a specific implementation for the KSZ9477 case. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-8-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement .{get/set}_wol only if neededBastien Curutchet (Schneider Electric)
All the KSZ switches use common {get/set}_wol operations while only the ksz9477 and the ksz87xx families really support it. These operations are optional so there is no point implementing them to return -EOPNOTSUPP. Remove the {get/set}_wol callbacks from the switch operations for the ksz88xx, the ksz8463 and the lan937x families. Remove the family check from the common {get/set}_wol implementation. Note that is_ksz9477() is only true for the KSZ9477 so this change will also add WoL support for the other switches using the ksz9477_switch_ops. I checked their datasheet, they implement the same PME_WOL registers, at the same addresses, so this should go fine. Modify the ksz_wol_pre_shutdown() initial check to ensure consistency in the WoL handling for these non-KSZ9477 switches using ksz9477_switch_ops. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-7-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement .support_eee() only if neededBastien Curutchet (Schneider Electric)
The .support_eee() operation is optional. Yet, it is implemented by the KSZ switches through a common functon that reports false for every chip except for KSZ8563, KSZ9563 and KSZ9893 from the KSZ9477 family. Remove the implementation from the switches that don't support EEE. Also remove .set_mac_eee() for them as .set_mac_eee() is gated by the `support_eee` presence in the core. Implement instead a ksz9477-specific support_eee for these three supported switches. Note that comment /* KSZ879x/KSZ877x/KSZ876x Errata DS80000687C Module 2 */ is completely removed because it concerns the KSZ87xx family that doesn't support at all EEE. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-6-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: remove setup_rgmii_delay() KSZ operationBastien Curutchet (Schneider Electric)
setup_rgmii_delay() operation is only used once during the common phylink MAC configuration. Only the lan937x switch implements this setup_rgmii_delay(). Remove the setup_rgmii_delay operation from ksz_dev_ops. Implement a lan937x-specific phylink MAC configuration that does this RGMII delay setup. Export ksz_set_xmii since it's needed by the lan937x implementation. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-5-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: wrap the MAC configuration checks in a functionBastien Curutchet (Schneider Electric)
The common .mac_config() implementation checks some conditions before doing any register access. As this common implementation is about to be split in the upcoming patch, these checks would lead to code duplication. Wrap all the checks in a need_config() function that returns true when the driver really need to access the switch registers to configure the MAC. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-4-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: implement get_phy_flags only if neededBastien Curutchet (Schneider Electric)
The common ksz_get_phy_flags() is used by all the switches to implement the optional .get_phy_flags DSA operation. It always returns 0 except for KSZ88X3 switches where an errata has to be handled. Make ksz_get_phy_flags() ksz88xx-specific. Remove the get_phy_flags implementation for the switches that don't need it. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-3-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: remove VLAN operations for ksz8463Vladimir Oltean
KSZ8463 uses the common KSZ8 implementation for its VLAN operations. This implementation returns -ENOTSUPP for the KSZ8463 case, which is pointless. Remove the VLAN operations from the ksz8463_switch_ops so the core can directly return -ENOTSUPP. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-2-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: dsa: microchip: remove useless common cls_flower_{add/del} operationsBastien Curutchet (Schneider Electric)
All the KSZ switches share a common implementation of the cls_flower_{add/del} operations. These common implementations return ksz9477-specific implementations for the KSZ9477 family and -EOPNOTSUPP for the others. -EOPNOTSUPP is already returned by the DSA core when the operation isn't implemented. Remove the common implementations. Directly link the ksz9477_cls_flower_{add/del}() to the KSZ9477 callback. Signed-off-by: Bastien Curutchet (Schneider Electric) <bastien.curutchet@bootlin.com> Link: https://patch.msgid.link/20260608-clean-ksz-3rd-v2-1-6e61b7be23c4@bootlin.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12netconsole: clear cached dev_name on resume-window cleanupBreno Leitao
When process_resume_target() catches a device that was unregistered while the target was off target_list, it calls do_netpoll_cleanup() to release the reference but leaves the cached np.dev_name in place. The other cleanup path, netconsole_process_cleanups_core(), already wipes dev_name for MAC-bound targets because the name was only a cache of the device that last carried the MAC and may no longer match. The pattern is the same in both spots, so fold it into a small helper netcons_release_dev() and route both call sites through it. This makes the resume-window cleanup consistent with the notifier-driven one so a later enable does not let netpoll_setup() pick a stale interface by name when the user bound the target by MAC. Signed-off-by: Breno Leitao <leitao@debian.org> Reviewed-by: Andre Carvalho <asantostc@gmail.com> Link: https://patch.msgid.link/20260610-netconsole_fix_more-v1-1-a18652c47cef@debian.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: ethernet: mtk_wed: fix loading WO firmware for MT7986Zhi-Jun You
MT7986 requires a different mask for second WO firmware. Without this, WO would timeout after loading FW. The correct mask was removed when adding WED for MT7988. Add it back and add a WED version check to fix it. This can be reproduced with a MT7986 + MT7916 board. Fixes: e2f64db13aa1 ("net: ethernet: mtk_wed: introduce WED support for MT7988") Signed-off-by: Zhi-Jun You <hujy652@gmail.com> Link: https://patch.msgid.link/20260611150051.586-1-hujy652@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mana: guard TX wq object destroy with INVALID_MANA_HANDLE checkAditya Garg
mana_create_txq() has several error paths (after mana_alloc_queues() or mana_create_wq_obj() failure) where tx_qp[i].tx_object stays as the INVALID_MANA_HANDLE sentinel set at allocation. mana_destroy_txq() then unconditionally calls mana_destroy_wq_obj() with (u64)-1, which firmware rejects and logs an error. Mirror the RX-side pattern in mana_destroy_rxq() and skip the destroy when the handle is still INVALID_MANA_HANDLE. Fixes: ca9c54d2d6a5 ("net: mana: Add a driver for Microsoft Azure Network Adapter (MANA)") Signed-off-by: Aditya Garg <gargaditya@linux.microsoft.com> Reviewed-by: Dipayaan Roy <dipayanroy@linux.microsoft.com> Reviewed-by: Haiyang Zhang <haiyangz@microsoft.com> Link: https://patch.msgid.link/20260608101345.2267320-3-gargaditya@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mana: initialize gdma queue id to INVALID_QUEUE_IDAditya Garg
mana_gd_create_mana_wq_cq() leaves queue->id as 0 (from kzalloc_obj()) until mana_create_wq_obj() assigns the firmware-returned id. If creation fails before that, cleanup calls mana_gd_destroy_cq() with id 0, NULLing gc->cq_table[0] and silently breaking whichever real CQ owns that slot. Initialize queue->id to INVALID_QUEUE_ID right after allocation, matching mana_gd_create_eq(). The existing (id >= max_num_cqs) guard then short-circuits cleanly. Fixes: ca9c54d2d6a5 ("net: mana: Add a driver for Microsoft Azure Network Adapter (MANA)") Signed-off-by: Aditya Garg <gargaditya@linux.microsoft.com> Reviewed-by: Dipayaan Roy <dipayanroy@linux.microsoft.com> Reviewed-by: Haiyang Zhang <haiyangz@microsoft.com> Link: https://patch.msgid.link/20260608101345.2267320-2-gargaditya@linux.microsoft.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mdio: realtek-rtl9300: Add support for RTL931xMarkus Stockhausen
The MDIO driver has been prepared for multiple device support. Add all required bits for the RTL931x (aka mango) series. This is straightforward but some things are worth to be mentioned. - In contrast to RTL930x the I/O register has the input/output fields swapped. Upper 16 bits are for read/outputs, and the lower 16 bits are for write/inputs. - The supported "pages" are 8192 and thus the raw page is 8191 - The devices support up to 56 ports. Thus the MAX_PORTS definition is increased by this commit. - There are multiple global SMI controller registers with a different layout from RTL930x devices. Therefore a separate setup_controller() callback is added. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://patch.msgid.link/20260610194145.4153668-6-markus.stockhausen@gmx.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mdio: realtek-rtl9300: Add registers for high port count modelsMarkus Stockhausen
The high port count models of the Realtek Otto switches have additional registers to instrument the MDIO controller. These are: - High port mask: A bitfield that extends the already existing low port mask to select ports starting from 32. - Broadcast: This takes the port number during reads on the RTL931x. - Extended page: Some additional page info. The SDK does not give much information about this. Basically some fixed value must be written into it during access. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://patch.msgid.link/20260610194145.4153668-5-markus.stockhausen@gmx.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mdio: realtek-rtl9300: Make otto_emdio_read_cmd() genericMarkus Stockhausen
The otto_emdio_read_cmd() helper still uses RTL9300 specific properties. This cannot be made generic as the I/O register has different layouts for the different SoCs. E.g. - RTL930x: data in bits 31-16, data out bits 15-0 - RTL931x: data in bits 15-0, data out bits 31-16 Add a mask parameter to the function signature and fill it properly in the callers. As the masks will always have bits set from constant defines, there is no need for a consistency check. Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://patch.msgid.link/20260610194145.4153668-4-markus.stockhausen@gmx.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12net: mdio: realtek-rtl9300: Add prefix to register field definesMarkus Stockhausen
The current Realtek Otto MDIO driver has some define leftovers without a SoC prefix. When adding new devices there will be an overlap for some of them. Sort this out as follows: - PHY_CTRL_CMD/PHY_CTRL_MMD_DEVAD/PHY_CTRL_MMD_REG are common for all series. Leave them as is but move them into a separate block. - Add RTL9300 prefix to all other defines and adapt the callers. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://patch.msgid.link/20260610194145.4153668-3-markus.stockhausen@gmx.de Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-06-12tls: remove tls_toe and the related driverSabrina Dubroca
The tls_toe feature and its single user (chelsio chtls) have been unmaintained for multiple years. It also hooks into the core of the TCP implementation, and bypasses most of the networking stack. Signed-off-by: Sabrina Dubroca <sd@queasysnail.net> Reviewed-by: Eric Dumazet <edumazet@google.com> Link: https://patch.msgid.link/1f30e73275c07bf879f547589872d0916025a52e.1781165969.git.sd@queasysnail.net Signed-off-by: Jakub Kicinski <kuba@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-20 23:23:45 +0000