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path: root/drivers/pinctrl
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2025-11-24pinctrl: ma35: #undef field_{get,prep}() before local definitionGeert Uytterhoeven
Prepare for the advent of globally available common field_get() and field_prep() macros by undefining the symbols before defining local variants. This prevents redefinition warnings from the C preprocessor when introducing the common macros later. Suggested-by: Yury Norov <yury.norov@gmail.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Yury Norov (NVIDIA) <yury.norov@gmail.com>
2025-11-19pinctrl: airoha: Fix AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_dataNathan Chancellor
Clang warns (or errors with CONFIG_WERROR=y / W=e): pinctrl/mediatek/pinctrl-airoha.c:2064:41: error: variable 'an7583_pinctrl_drive_e2_conf' is not needed and will not be emitted [-Werror,-Wunneeded-internal-declaration] 2064 | static const struct airoha_pinctrl_conf an7583_pinctrl_drive_e2_conf[] = { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ Due to a typo, an7583_pinctrl_drive_e2_conf is only used within ARRAY_SIZE() (hence no instance of -Wunused-variable), which is evaluated at compile time, so it will not be needed in the final object file. Fix the .confs assignment for AIROHA_PINCTRL_CONFS_DRIVE_E2 in an7583_pinctrl_match_data to clear up the warning. Closes: https://github.com/ClangBuiltLinux/linux/issues/2142 Fixes: 3ffeb17a9a27 ("pinctrl: airoha: add support for Airoha AN7583 PINs") Signed-off-by: Nathan Chancellor <nathan@kernel.org> Acked-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-19pinctrl: airoha: fix pinctrl function mismatch issueChukun Pan
The blamed commit made the following changes: -#define PINCTRL_FUNC_DESC(id)... - .desc = PINCTRL_PINFUNCTION(#id, ... +#define PINCTRL_FUNC_DESC(id, table)... + .desc = PINCTRL_PINFUNCTION(#id, ... - PINCTRL_FUNC_DESC(pon)... + PINCTRL_FUNC_DESC("pon", pon)... It's clear that the id of funcs doesn't match the definition. Remove redundant #string from the definition to fix this issue: pinctrl-airoha ...: invalid function mdio in map table Fixes: 4043b0c45f85 ("pinctrl: airoha: generalize pins/group/function/confs handling") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-19Merge tag 'renesas-pinctrl-for-v6.19-tag2' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.19 (take two) - Remove removed signals on R-Car V4H and V4M, - Refactor OEN register PWPR handling on RZ/G2L. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-18pinctrl: s32cc: initialize gpio_pin_config::list after kmalloc()Jared Kangas
s32_pmx_gpio_request_enable() does not initialize the newly-allocated gpio_pin_config::list before adding it to s32_pinctrl::gpio_configs. This could result in a linked list corruption. Initialize the new list_head with INIT_LIST_HEAD() to fix this. Fixes: fd84aaa8173d ("pinctrl: add NXP S32 SoC family support") Signed-off-by: Jared Kangas <jkangas@redhat.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-18pinctrl: s32cc: fix uninitialized memory in s32_pinctrl_descJared Kangas
s32_pinctrl_desc is allocated with devm_kmalloc(), but not all of its fields are initialized. Notably, num_custom_params is used in pinconf_generic_parse_dt_config(), resulting in intermittent allocation errors, such as the following splat when probing i2c-imx: WARNING: CPU: 0 PID: 176 at mm/page_alloc.c:4795 __alloc_pages_noprof+0x290/0x300 [...] Hardware name: NXP S32G3 Reference Design Board 3 (S32G-VNP-RDB3) (DT) [...] Call trace: __alloc_pages_noprof+0x290/0x300 (P) ___kmalloc_large_node+0x84/0x168 __kmalloc_large_node_noprof+0x34/0x120 __kmalloc_noprof+0x2ac/0x378 pinconf_generic_parse_dt_config+0x68/0x1a0 s32_dt_node_to_map+0x104/0x248 dt_to_map_one_config+0x154/0x1d8 pinctrl_dt_to_map+0x12c/0x280 create_pinctrl+0x6c/0x270 pinctrl_get+0xc0/0x170 devm_pinctrl_get+0x50/0xa0 pinctrl_bind_pins+0x60/0x2a0 really_probe+0x60/0x3a0 [...] __platform_driver_register+0x2c/0x40 i2c_adap_imx_init+0x28/0xff8 [i2c_imx] [...] This results in later parse failures that can cause issues in dependent drivers: s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c0-pins/i2c0-grp0: could not parse node property s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c0-pins/i2c0-grp0: could not parse node property [...] pca953x 0-0022: failed writing register: -6 i2c i2c-0: IMX I2C adapter registered s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c2-pins/i2c2-grp0: could not parse node property s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c2-pins/i2c2-grp0: could not parse node property i2c i2c-1: IMX I2C adapter registered s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c4-pins/i2c4-grp0: could not parse node property s32g-siul2-pinctrl 4009c240.pinctrl: /soc@0/pinctrl@4009c240/i2c4-pins/i2c4-grp0: could not parse node property i2c i2c-2: IMX I2C adapter registered Fix this by initializing s32_pinctrl_desc with devm_kzalloc() instead of devm_kmalloc() in s32_pinctrl_probe(), which sets the previously uninitialized fields to zero. Fixes: fd84aaa8173d ("pinctrl: add NXP S32 SoC family support") Signed-off-by: Jared Kangas <jkangas@redhat.com> Tested-by: Jan Petrous (OSS) <jan.petrous@oss.nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-18pinctrl: cherryview: Convert to use intel_gpio_add_pin_ranges()Andy Shevchenko
Driver is ready to use intel_gpio_add_pin_ranges() directly instead of custom approach. Convert it now. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-18pinctrl: intel: Export intel_gpio_add_pin_ranges()Andy Shevchenko
Export intel_gpio_add_pin_ranges() for reuse in other drivers. Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-13pinctrl: renesas: rzg2l: Refactor OEN register PWPR handlingJohn Madieu
Extract the OEN register write with PWPR protection logic into a helper function to eliminate code duplication between rzg2l_write_oen() and rzg2l_pinctrl_resume_noirq(). Introduce rzg2l_oen_write_with_pwpr() helper that encapsulates the PWPR unlock, OEN register write, and PWPR lock sequence. This helper must be called with pctrl->lock already held by the caller. Reported-by: Pavel Machek <pavel@denx.de> Closes: https://lore.kernel.org/cip-dev/OS9PR01MB16368C765305362F5F4132759FFC4A@OS9PR01MB16368.jpnprd01.prod.outlook.com/T/#u Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20251106080758.36645-1-john.madieu.xa@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-11-12pinctrl: airoha: convert comma to semicolonChen Ni
Replace comma between expressions with semicolons. Using a ',' in place of a ';' can have unintended side effects. Although that is not the case here, it is seems best to use ';' unless ',' is intended. Found by inspection. No functional change intended. Compile tested only. Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-12pinctrl: qcom: msm: Fix deadlock in pinmux configurationPraveen Talari
Replace disable_irq() with disable_irq_nosync() in msm_pinmux_set_mux() to prevent deadlock when wakeup IRQ is triggered on the same GPIO being reconfigured. The issue occurs when a wakeup IRQ is triggered on a GPIO and the IRQ handler attempts to reconfigure the same GPIO's pinmux. In this scenario, msm_pinmux_set_mux() calls disable_irq() which waits for the currently running IRQ handler to complete, creating a circular dependency that results in deadlock. Using disable_irq_nosync() avoids waiting for the IRQ handler to complete, preventing the deadlock condition while still properly disabling the interrupt during pinmux reconfiguration. Suggested-by: Prasad Sodagudi <prasad.sodagudi@oss.qualcomm.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-12pinctrl: elkhartlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-12pinctrl: cherryview: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-12pinctrl: emmitsburg: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-12pinctrl: denverton: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-12pinctrl: cedarfork: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-11pinctrl: airoha: add support for Airoha AN7583 PINsChristian Marangi
Add all the required entry to add suppot for Airoha AN7583 PINs. Where possible the same function group are used from Airoha EN7581 to reduce code duplication. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-11pinctrl: airoha: convert PWM GPIO to macroChristian Marangi
The PWM GPIO struct definition follow the same pattern for every GPIO pin hence it can be converted to a macro. Create 2 macro one for normal mux and one for ext mux and convert all the entry to these new macro to reduce code size. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-11pinctrl: airoha: convert PHY LED GPIO to macroChristian Marangi
PHY LED GPIO pinctrl struct definition is very similar across the different 4 PHY and 2 LED and it can be generelized to a macro. To reduce code size, convert them to a common macro. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-11pinctrl: airoha: generalize pins/group/function/confs handlingChristian Marangi
In preparation for support of Airoha AN7583, generalize pins/group/function/confs handling and move them in match_data. Inner function will base the values on the pinctrl priv struct instead of relying on hardcoded struct. This permits to use different PIN data while keeping the same logic. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10pinctrl: stm32: handle semaphore acquisition when handling pinctrl/pinmuxGatien Chevallier
When a GPIO RIF configuration is in semaphore mode, and the semaphore hasn't been taken before configuring the GPIO, the write operations silently fail. To avoid a silent fail when applying a pinctrl, if the pins that are being configured are in semaphore mode, take the semaphore. Note that there is no proper release of the RIF semaphore yet for pinctrl. Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10pinctrl: rockchip: Add rk3506 pinctrl supportYe Zhang
Add support for the 5 rk3506 GPIO banks. Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10Merge tag 'samsung-pinctrl-6.19' of ↵Linus Walleij
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.19 Add pin controller support for Samsung Exynos8890 and Axis ARTPEC-9 SoCs. The latter is a newer design of Artpec SoCs made/designed by Samsung, thus it shares most of the core blocks with Samsung Exynos, including the pinctrl. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-10pinctrl: renesas: r8a779h0: Remove STPWT_EXTFXRGeert Uytterhoeven
Rev.0.81 of the R-Car V4M Series Hardware User’s Manual removed the "STPWT_EXTFXR" signal from the pin control register tables. As this is further unused in the pin control driver, it can be removed safely. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/f849fa3b9b516e9dd04b45462b69f52225259480.1762274384.git.geert+renesas@glider.be
2025-11-10pinctrl: renesas: r8a779h0: Remove CC5_OSCOUTHuy Bui
Rev.0.71 of the R-Car V4M Series Hardware User’s Manual removed the "CC5_OSCOUT" signal from the pin control register tables. As this is further unused in the pin control driver, it can be removed safely. Signed-off-by: Huy Bui <huy.bui.wm@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/895bb560467309706931d14aeea0e063ad0e86eb.1762274384.git.geert+renesas@glider.be
2025-11-10pinctrl: renesas: r8a779g0: Remove STPWT_EXTFXRHuy Bui
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the "STPWT_EXTFXR" signal from the pin control register tables. As this is further unused in the pin control driver, it can be removed safely. Signed-off-by: Huy Bui <huy.bui.wm@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/f6cfdbbc024d85e87583a1d57ea01582632f1216.1762274384.git.geert+renesas@glider.be
2025-11-10pinctrl: renesas: r8a779g0: Remove CC5_OSCOUTHuy Bui
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the "CC5_OSCOUT" signal from the pin control register tables. As this is further unused in the pin control driver, it can be removed safely. Signed-off-by: Huy Bui <huy.bui.wm@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/77f9efe5388f2801ace945b7793d4823618eeec8.1762274384.git.geert+renesas@glider.be
2025-11-10pinctrl: renesas: r8a779g0: Remove AVB[01]_MIIThanh Quan
Rev.1.30 of the R-Car V4H Series Hardware User’s Manual removed the "AVB[01]_MII_*" signals from the pin control register tables. As these are further unused in the pin control driver, they can be removed safely. Signed-off-by: Thanh Quan <thanh.quan.xn@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/58662f50136280532bcc8bbe94741d82425bd118.1762274384.git.geert+renesas@glider.be
2025-11-10pinctrl: cirrus: Fix fwnode leak in cs42l43_pin_probe()Haotian Zhang
The driver calls fwnode_get_named_child_node() which takes a reference on the child node, but never releases it, which causes a reference leak. Fix by using devm_add_action_or_reset() to automatically release the reference when the device is removed. Fixes: d5282a539297 ("pinctrl: cs42l43: Add support for the cs42l43") Suggested-by: Charles Keepax <ckeepax@opensource.cirrus.com> Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-09Merge tag 'renesas-pinctrl-for-v6.19-tag1' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.19 - Fix interrupt configuration and port mode after resume on RZ/G2L family SoCs, - Miscellaneous fixes and improvements. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-05pinctrl: sunrisepoint: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: tigerlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: meteorpoint: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: meteorlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: lakefield: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: jasperlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: icelake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: cannonlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: alderlake: Switch to INTEL_GPP() macroAndy Shevchenko
Replace custom macro with the recently defined INTEL_GPP(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: intel: Introduce INTEL_GPP() macroAndy Shevchenko
A new macro will be used for the further refactoring of the drivers. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-05pinctrl: cix: sky1: Provide pin control dummy statesLinus Walleij
This exports and calls the pinctrl_provide_dummies() function from the CIX SKY1 driver. The reasons are explained in a comment in the commit, in essence the two pin controllers need to go through explicit state transitions default->sleep->default despite they only handle one single state each. Reviewed-by: Hans Zhang <hans.zhang@cixtech.com> Reviewed-by: Fugang Duan <fugang.duan@cixtech.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-11-04pinctrl: tangier: Unify messages with help of dev_err_probe()Andy Shevchenko
Unify error messages that might appear during probe phase by switching to use dev_err_probe(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-04pinctrl: lynxpoint: Unify messages with help of dev_err_probe()Andy Shevchenko
Unify error messages that might appear during probe phase by switching to use dev_err_probe(). Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-04pinctrl: intel: Unify messages with help of dev_err_probe()Andy Shevchenko
Unify error messages that might appear during probe phase by switching to use dev_err_probe(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-04pinctrl: cherryview: Unify messages with help of dev_err_probe()Andy Shevchenko
Unify error messages that might appear during probe phase by switching to use dev_err_probe(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-11-04pinctrl: baytrail: Unify messages with help of dev_err_probe()Andy Shevchenko
Unify error messages that might appear during probe phase by switching to use dev_err_probe(). Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2025-10-30pinctrl: mpfs-iomux0: fix compile-time constant warning for LLVM prior to 17Conor Dooley
With LLVM prior to 17.0.0: drivers/pinctrl/pinctrl-mpfs-iomux0.c:89:2: error: initializer element is not a compile-time constant MPFS_IOMUX0_GROUP(spi0), ^~~~~~~~~~~~~~~~~~~~~~~ drivers/pinctrl/pinctrl-mpfs-iomux0.c:79:10: note: expanded from macro 'MPFS_IOMUX0_GROUP' .mask = BIT(mpfs_iomux0_##_name##_pins[0]), \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ include/vdso/bits.h:7:19: note: expanded from macro 'BIT' \#define BIT(nr) (UL(1) << (nr)) ^~~~~~~~~~~~~~~ This is a constant, but LLVM prior to a change from Nick to match the gcc behaviour did not allow this. The macro isn't really all that much of an idiot-proofing, just change it to the same sort that's in the gpio2 driver, where a second argument provides the mask/setting. Reported-by: Nathan Chancellor <nathan@kernel.org> Link: https://github.com/ClangBuiltLinux/linux/issues/2140 Fixes: 46397274da22 ("pinctrl: add polarfire soc iomux0 pinmux driver") Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-10-29pinctrl: stm32: fix hwspinlock resource leak in probe functionHaotian Zhang
In stm32_pctl_probe(), hwspin_lock_request_specific() is called to request a hwspinlock, but the acquired lock is not freed on multiple error paths after this call. This causes resource leakage when the function fails to initialize properly. Use devm_hwspin_lock_request_specific() instead of hwspin_lock_request_specific() to automatically manage the hwspinlock resource lifecycle. Fixes: 97cfb6cd34f2 ("pinctrl: stm32: protect configuration registers with a hwspinlock") Signed-off-by: Haotian Zhang <vulab@iscas.ac.cn> Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-10-29pinctrl: mcp23s08: init reg_defaults from HW at probe and switch cache typeMaksim Kiselev
The probe function does not guarantee that chip registers are in their default state. Thus using reg_defaults for regmap is incorrect. For example, the chip may have already been configured by the bootloader before the Linux driver loads, or the mcp might not have a reset at all and not reset a state between reboots. In such cases, using reg_defaults leads to the cache values diverging from the actual registers values in the chip. Previous attempts to fix consequences of this issue were made in 'commit 3ede3f8b4b4b ("pinctrl: mcp23s08: Reset all pins to input at probe")', but this is insufficient. The OLAT register reset is also required. And there's still potential for new issues arising due to cache desynchronization of other registers. Therefore, remove reg_defaults and provide num_reg_defaults_raw. In that case the cache defaults being initialized from hardware. Also switch cache type to REGCACHE_MAPLE, which is aware of (in)valid cache entries. And remove the force reset all pins to input at probe as it is no longer required. Link: https://lore.kernel.org/all/20251009132651.649099-2-bigunclemax@gmail.com/ Suggested-by: Mike Looijmans <mike.looijmans@topic.nl> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Suggested-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-10-29pinctrl-scmi: remove unused struct membersDan Carpenter
The ->pins and ->nr_pins members are not used so delete them. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>