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2026-05-25ACPI: PAD: Rearrange acpi_pad_notify()Rafael J. Wysocki
Use an if () in acpi_pad_notify() instead of a switch () statement to make the code somewhat easier to follow and reduce its indentation level. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3345485.5fSG56mABF@rafael.j.wysocki
2026-05-25ACPI: thermal: Switch over to devres-based resource managementRafael J. Wysocki
Switch over the ACPI thermal zone driver to devres-based resource management by making the following changes: * Turn acpi_thermal_zone_free() into a devm action added from acpi_thermal_probe() after allocating the struct acpi_thermal object. * Rename acpi_thermal_unregister_thermal_zone() to acpi_thermal_zone_unregister(), add acpi_thermal_pm_queue flushing to it, and turn it into a devm action added by acpi_thermal_probe() after calling acpi_thermal_register_thermal_zone(). * Use the newly introduced devm_acpi_install_notify_handler() for installing an ACPI notify handler. * Drop acpi_thermal_remove() that is not necessary any more. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3698719.iIbC2pHGDl@rafael.j.wysocki
2026-05-25ACPI: HED: Switch over to devres-based resource managementRafael J. Wysocki
Use the newly introduced devm_acpi_install_notify_handler() for installing an ACPI notify handler and since that function checks the ACPI companion of the owner device against NULL internally, remove the the explicit ACPI companion check from acpi_hed_probe(). No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/7950702.EvYhyI6sBW@rafael.j.wysocki
2026-05-25ACPI: HED: Refine guarding against adding a second instanceRafael J. Wysocki
There can be only one ACPI hardware event device (HED) in use at a time, so acpi_hed_probe() uses static variable hed_handle for guarding against adding a second HED instance, but there is no reason for that variable to hold an ACPI handle, so change it to a bool one. While at it also set that variable at the end of acpi_hed_probe() to avouid the need to clear it when installing the ACPI notify handler fails. Note that ACPI devices are enumerated sequentially, so there's no need for additional locking around the accesses to that variable. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2042970.PYKUYFuaPT@rafael.j.wysocki
2026-05-25ACPI: battery: Switch over to devres-based resource managementRafael J. Wysocki
The ACPI battery driver already uses devm_kzalloc() for allocating memory and devm_mutex_init() for mutex initialization, but it still carries out some manual rollback in acpi_battery_probe(). Switch it over to devres-based resource management completely by making three changes: * Rename acpi_battery_update_retry() to devm_acpi_battery_update_retry(), turn sysfs_battery_cleanup() into a devm action and modify the former to add it. * Add devm_acpi_battery_init_wakeup() for initializing the wakeup source and make it add a custom devm action to automatically remove the wakeup source registered by it. * Make acpi_battery_probe() use devm_acpi_install_notify_handler() that has just been introduced for installing an ACPI notify handler. Note that the code ordering change related to the last of the above changes does not matter because there is no functional dependency between the PM notifier and the wakeup source or the ACPI notify handler. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/10856906.nUPlyArG6x@rafael.j.wysocki
2026-05-25ACPI: AC: Switch over to devres-based resource managementRafael J. Wysocki
Use devm_kzalloc() for allocating memory, devm_power_supply_register() for registering a power supply class device and the newly introduced devm_acpi_install_notify_handler() for installing an ACPI notify handler. Note that the code ordering change related to the third of the above modifications does not matter because there is no order dependency between the battery notifier and the ACPI notify handler. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3422377.44csPzL39Z@rafael.j.wysocki
2026-05-25ACPI: NFIT: core: Use devm_acpi_install_notify_handler()Rafael J. Wysocki
Now that devm_acpi_install_notify_handler() is available, use it in acpi_nfit_probe() instead of a custom devm action removing an ACPI notify handler installed via acpi_dev_install_notify_handler(). Also drop the explicit ACPI_COMPANION() check against NULL that is not necessary any more becuase devm_acpi_install_notify_handler() carries out an equivalent check internally and use ACPI_HANDLE() to retrieve the platform device's ACPI handle. No intentional functional impact. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3048737.e9J7NaK4W3@rafael.j.wysocki
2026-05-25ACPI: bus: Introduce devm_acpi_install_notify_handler()Rafael J. Wysocki
Introduce devm_acpi_install_notify_handler() for installing an ACPI notify handler managed by devres that will be removed automatically on driver detach. It installs the notify handler on the device object in the ACPI namespace that corresponds to the owner device's ACPI companion, if present (an error is returned if the owner device doesn't have an ACPI companion). Currently, there is no way to manually remove the notify handler installed by it because none of its users brought on subsequently will need to do that. Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> [ rjw: Kerneldoc comment refinement ] Link: https://patch.msgid.link/2268031.irdbgypaU6@rafael.j.wysocki Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2026-05-25RDMA/hns: Fix log flood after cmd_mbox failureLianfa Weng
hns_roce_cmd_mbox() is the command interface between driver and hardware. When hardware is abnormal, the unlimited error printings after hns_roce_cmd_mbox() failure will cause log flood and even system crash. Replace ibdev_err() and ibdev_warn() with their ratelimited versions in the error handling path after hns_roce_cmd_mbox() (and its wrappers hns_roce_create_hw_ctx/hns_roce_destroy_hw_ctx) fails. Fixes: 9a4435375cd1 ("IB/hns: Add driver files for hns RoCE driver") Link: https://patch.msgid.link/r/20260520055759.2354037-4-huangjunxian6@hisilicon.com Signed-off-by: Lianfa Weng <wenglianfa@huawei.com> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-05-25RDMA/hns: Fix warning in poll cq direct modeLianfa Weng
CQs allocated by ib_alloc_cq() always have a comp_handler. Though in direct mode this handler is never expected to be called, it is still called when the driver is reset, triggering the following WARN_ONCE(): Call trace: ib_cq_completion_direct+0x38/0x60 hns_roce_cq_completion+0x54/0x90 (hns_roce_hw_v2] hns_roce_handle_device_err+Ox1c8/0x340 [hns_roce_hw_v2] hns_roce_hw_v2_uninit_instance.constprop.0+0x34/0x70 [hns_roce_hw_v2] hns_roce_hw_v2_reset_notify+0xc4/0xe0 [hns_roce_hw_v2] hclge_notify_roce_client+0x60/0xbc [hclge] hclge_reset_rebuild+0x48/0x34c [hclge] hclge_reset_subtask+0xcc/0xec [hclge] hclge_reset_service_task+0x80/0x160 [hclge] hclge_service_task+0x50/0x80 (hclge] process_one_work+0x1cc/0x4d0 worker_thread+0x154/0x414 kthread+0x104/0x144 ret_from_fork+0x10/0x18 Fixes: f295e4cece5c ("RDMA/hns: Delete unnecessary callback functions for cq") Link: https://patch.msgid.link/r/20260520055759.2354037-3-huangjunxian6@hisilicon.com Signed-off-by: Lianfa Weng <wenglianfa@huawei.com> Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-05-25gpu: nova-core: vbios: construct `FwSecBiosImage` directly from BIOS imagesEliot Courtney
`FwSecBiosBuilder` now only contains `falcon_ucode_offset` which just gets passed directly into `FwSecBiosImage`. Remove `FwSecBiosBuilder` and construct `FwSecBiosImage` directly, as a simplification. Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-14-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: store PMU lookup entries in a KVVecEliot Courtney
The current code copies the data into a KVec and parses it on demand. We can simplify the code by storing the parsed entries. Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-13-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: read PMU lookup entries using FromBytesEliot Courtney
This simplifies the construction of `PmuLookupTableEntry` and is allowed now that the driver can assume it is little endian. Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-12-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: simplify setup_falcon_dataEliot Courtney
The code first computes `pmu_in_first_fwsec` or adjusts the offset and then uses it in a branch just once to get the correct source for the PMU table. This can be simplified to a single branch while also avoiding the mutation of `offset`. Also, adjust the code after this to keep the success case non-nested. Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-11-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: compute FWSEC-relative Falcon data offsetEliot Courtney
Push the computation of the falcon data offset into a helper function. The subtraction to create the offset should be checked, and by doing this the check can be folded into the existing check in `falcon_data_ptr`. Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-10-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: keep PmuLookupTable local in setup_falcon_dataEliot Courtney
This does not need to be stored in `FwSecBiosBuilder` so we can remove it from there, and just create and use it locally in `setup_falcon_data`. Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-9-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: drop unused falcon_data_offset from FwSecBiosBuilderEliot Courtney
This is unused, so we can remove it. Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-8-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: use checked accesses in `setup_falcon_data`Eliot Courtney
Use checked arithmetic for `ucode_offset` in `setup_falcon_data`. This prevents a malformed firmware from causing a panic. Fixes: dc70c6ae2441 ("gpu: nova-core: vbios: Add support to look up PMU table in FWSEC") Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-7-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: use checked access in `FwSecBiosImage::header`Eliot Courtney
Use checked access in `FwSecBiosImage::header` for getting the header version since the value is firmware derived. Fixes: 47c4846e4319 ("gpu: nova-core: vbios: Add support for FWSEC ucode extraction") Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-6-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: use checked ops and accesses in `FwSecBiosImage::ucode`Eliot Courtney
Use checked arithmetic and access for extracting the microcode since the offsets are firmware derived. Fixes: 47c4846e4319 ("gpu: nova-core: vbios: Add support for FWSEC ucode extraction") Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-5-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: read BitToken using FromBytesEliot Courtney
If `header.token_size` is smaller than `BitToken`, then we currently can read past the end of `image.base.data`. Use checked arithmetic for computing offsets and simplify reading it in using `FromBytes`. Fixes: dc70c6ae2441 ("gpu: nova-core: vbios: Add support to look up PMU table in FWSEC") Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-4-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: avoid reading too far in read_more_at_offsetEliot Courtney
Fix bug where `read_more_at_offset` would unnecessarily read more data. This happens when the window to read has some part cached and some part not. It would read `len` bytes instead of just the uncached portion, which could read past `BIOS_MAX_SCAN_LEN`. Fixes: 6fda04e7f0cd ("gpu: nova-core: vbios: Add base support for VBIOS construction and iteration") Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-3-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: use checked arithmetic for bios image range endEliot Courtney
`read_bios_image_at_offset` is called with a length from the VBIOS header, so we should be more defensive here and use checked arithmetic. Fixes: 6fda04e7f0cd ("gpu: nova-core: vbios: Add base support for VBIOS construction and iteration") Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-2-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25gpu: nova-core: vbios: stop scanning at BIOS_MAX_SCAN_LENEliot Courtney
Current code lets `current_offset` go to `BIOS_MAX_SCAN_LEN` which is one byte too far. Fixes: 6fda04e7f0cd ("gpu: nova-core: vbios: Add base support for VBIOS construction and iteration") Reviewed-by: Joel Fernandes <joelagnelf@nvidia.com> Reviewed-by: John Hubbard <jhubbard@nvidia.com> Signed-off-by: Eliot Courtney <ecourtney@nvidia.com> Link: https://patch.msgid.link/20260525-fix-vbios-v5-1-e5e455251537@nvidia.com Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-05-25IB/mlx4: Fix refcount leak in add_port() error pathGuangshuo Li
After kobject_init_and_add(), the lifetime of the embedded struct kobject is expected to be managed through the kobject core reference counting. In add_port(), failure paths after kobject_init_and_add() must not free struct mlx4_port directly, because the embedded kobject is then managed by the kobject core. Freeing it directly leaves the kobject reference counting unbalanced and can lead to incorrect lifetime handling. Allocate the pkey and gid attribute arrays before kobject_init_and_add(), so failures before kobject initialization can be handled by directly freeing the allocated memory. Once kobject_init_and_add() has been called, unwind later failures by removing any successfully created sysfs groups, calling kobject_del(), and then releasing the embedded kobject with kobject_put(). Fixes: c1e7e466120b ("IB/mlx4: Add iov directory in sysfs under the ib device") Link: https://patch.msgid.link/r/20260518021910.972900-1-lgs201920130244@gmail.com Signed-off-by: Guangshuo Li <lgs201920130244@gmail.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-05-25RDMA/rxe: Fix a use-after-free problem in rxe_mmapZhu Yanjun
rxe_mmap() removes a rxe_mmap_info struct from the pending_mmaps list and releases pending_lock while the struct's kref is still at 1: list_del_init(&ip->pending_mmaps); spin_unlock_bh(&rxe->pending_lock); /* ref == 1, no lock held */ ret = remap_vmalloc_range(vma, ip->obj, 0); /* walks PTEs */ [...] rxe_vma_open(vma); /* kref_get, ref → 2 */ remap_vmalloc_range_partial() walks PTEs without any lock. A concurrent DESTROY_CQ ioctl on another CPU calls: kref_put(&q->ip->ref, rxe_mmap_release) /* ref 1→0 */ vfree(ip->obj) /* clears vmalloc PTEs mid-walk */ kfree(ip) /* frees rxe_mmap_info */ This yields: 1. Kernel crash, vmalloc_to_page() returns NULL when vfree wins the per-PTE race -> vm_insert_page(NULL) → GPF in validate_page_before_insert 2. Page UAF, vmalloc_to_page() reads a stale PTE before vfree clears it. User VMA holds a PTE to a free'd page which might eventually get reallocated later by vmalloc which allows the attacker to get a clean page-level UAF. It is worth noting that even though a page-level UAF is possible given the strong primitive, it is statistically very difficult to achieve given the very short time window (after the last insert_page and before the kref_get). The call trace are as below: Oops: general protection fault, probably for non-canonical address 0xdffffc0000000001: 0000 [#1] SMP KASAN NOPTI KASAN: null-ptr-deref in range [0x0000000000000008-0x000000000000000f] CPU: 0 UID: 1000 PID: 413 Comm: poc Not tainted 7.0.0-rc5-dirty #28 PREEMPT(lazy) Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.15.0-1 04/01/2014 RIP: 0010:validate_page_before_insert+0x32/0x300 Code: e5 41 57 41 56 49 89 fe 41 55 41 54 53 48 89 f3 e8 93 b5 a3 ff 48 8d 7b 08 48 b8 00 00 00 00 00 fc ff df 48 89 fa 48 c1 ea 03 <80> 3c 02 00 0f 85 7b 02 00 00 4c 8b 63 08 31 ff 4d 89 e5 41 83 e5 RSP: 0018:ffff88811b15f2f0 EFLAGS: 00000202 RAX: dffffc0000000000 RBX: 0000000000000000 RCX: 0000000000000000 RDX: 0000000000000001 RSI: 0000000000000000 RDI: 0000000000000008 RBP: ffff88811b15f318 R08: 0000000000000000 R09: 0000000000000000 R10: 0000000000000000 R11: 0000000000000000 R12: ffff8881181eee00 R13: 0000000000000000 R14: ffff8881181eee00 R15: ffff8881181eee20 FS: 00007b1e000f76c0(0000) GS:ffff8884268e0000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00007b1e00a24ac0 CR3: 0000000116eb3000 CR4: 00000000000006f0 Call Trace: <TASK> insert_page+0x8f/0x190 ? __pfx_insert_page+0x10/0x10 ? kasan_save_alloc_info+0x38/0x60 vm_insert_page+0x2e7/0x400 remap_vmalloc_range_partial+0x212/0x3e0 remap_vmalloc_range+0x6e/0xb0 ? __kasan_check_write+0x14/0x30 rxe_mmap+0x2e9/0x5d0 ib_uverbs_mmap+0x1ad/0x2c0 __mmap_region+0x12c2/0x2ad0 ? __pfx___mmap_region+0x10/0x10 ? __sanitizer_cov_trace_switch+0x58/0xb0 ? mas_prev_slot+0x360/0x39c0 ? __sanitizer_cov_trace_switch+0x58/0xb0 ? mas_next_slot+0x1e5b/0x2f40 ? __sanitizer_cov_trace_cmp8+0x18/0x30 ? unmapped_area_topdown+0x4dd/0x610 ? kfree+0x1b1/0x440 ? free_cpumask_var+0x16/0x30 ? __kasan_slab_free+0x7d/0xa0 ? __sanitizer_cov_trace_cmp8+0x18/0x30 mmap_region+0x2e6/0x3c0 do_mmap+0xa3e/0x12a0 ? __pfx_do_mmap+0x10/0x10 ? __kasan_check_write+0x14/0x30 ? down_write_killable+0xba/0x160 ? __pfx_down_write_killable+0x10/0x10 ? __sanitizer_cov_trace_cmp4+0x16/0x30 vm_mmap_pgoff+0x2d4/0x4a0 ? __pfx_vm_mmap_pgoff+0x10/0x10 ? fget+0x1bf/0x270 ksys_mmap_pgoff+0x40c/0x690 ? __sanitizer_cov_trace_const_cmp4+0x16/0x30 ? __pfx_ksys_mmap_pgoff+0x10/0x10 ? __kasan_check_write+0x14/0x30 ? _raw_spin_trylock+0xbb/0x130 ? __pfx__raw_spin_trylock+0x10/0x10 __x64_sys_mmap+0x135/0x1e0 x64_sys_call+0x1c14/0x2790 do_syscall_64+0xd2/0x1050 ? rcu_core+0x352/0x7d0 ? rcu_core_si+0xe/0x20 ? handle_softirqs+0x1aa/0x650 ? __sanitizer_cov_trace_cmp4+0x16/0x30 ? fpregs_assert_state_consistent+0xe1/0x160 ? irqentry_exit+0xb1/0x670 entry_SYSCALL_64_after_hwframe+0x76/0x7e Link: https://patch.msgid.link/r/20260515002537.6209-1-yanjun.zhu@linux.dev Reported-and-tested-by: nasm <n4sm@protonmail.com> Suggested-by: nasm <n4sm@protonmail.com> Fixes: 8700e3e7c485 ("Soft RoCE driver") Signed-off-by: Zhu Yanjun <yanjun.zhu@linux.dev> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-05-25firmware: zynqmp: Add dynamic CSU register discovery and sysfs interfaceRonak Jain
Add support for dynamically discovering and exposing Configuration Security Unit (CSU) registers through sysfs. Leverage the existing PM_QUERY_DATA API to discover available registers at runtime, making the interface flexible and maintainable. Key features: - Dynamic register discovery using PM_QUERY_DATA API * PM_QID_GET_NODE_COUNT: Query number of available registers * PM_QID_GET_NODE_NAME: Query register names by index - Automatic sysfs attribute creation under csu_registers/ group - Read operations via existing IOCTL_READ_REG API - Write operations via existing IOCTL_MASK_WRITE_REG API The sysfs interface is created at: /sys/devices/platform/firmware:zynqmp-firmware/csu_registers/ Currently supported registers include: - multiboot (CSU_MULTI_BOOT) - idcode (CSU_IDCODE, read-only) - pcap-status (CSU_PCAP_STATUS, read-only) The dynamic discovery approach allows firmware to control which registers are exposed without requiring kernel changes, improving maintainability and security. The firmware does not currently expose per-register access mode information, so the kernel cannot distinguish read-only registers from read-write ones at discovery time. All discovered registers are therefore created with sysfs mode 0644, and the firmware is responsible for rejecting writes to registers it treats as read-only (for example idcode and pcap-status); that error is propagated back to userspace from the store callback. If a per-register access-mode query is added to the firmware in the future, sysfs permissions can be tightened to match. CSU register discovery is an optional feature: on firmware that lacks support for PM_QID_GET_NODE_COUNT or PM_QID_GET_NODE_NAME, the probe returns gracefully without exposing any sysfs entries. To keep the memory footprint minimal on that path, partial devm allocations made during discovery are explicitly released on failure so that no memory lingers until device unbind when the feature is unavailable. Signed-off-by: Ronak Jain <ronak.jain@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/20260520093654.3303917-3-ronak.jain@amd.com
2026-05-25RDMA/irdma: Fix out-of-bounds write in irdma_copy_user_pgaddrsJacob Moroni
The irdma_copy_user_pgaddrs function loops through all of the umem DMA blocks to populate the PBLEs and will stop when either the last DMA block is reached or palloc->total_cnt is reached. The issue is that the logic for checking palloc->total_cnt would only work for non-zero values. When irdma_setup_pbles is called with lvl==0, it calls irdma_copy_user_pgaddrs with palloc->total_cnt==0, which means the only way to break out of the loop is to reach the last umem DMA block, which means it could end up going beyond the fixed size of 4 iwmr->pgaddrmem array that is used in the lvl==0 case. In the case of QP/CQ/SRQ rings, the value of lvl is determined by a separate input (for example, req.cq_pages in the case of a CQ). So, we must perform explicit checking to ensure we don't overflow the pgaddrmem array if the user provides a umem that consists of more blocks than their provided req.cq_pages. Fixes: b48c24c2d710 ("RDMA/irdma: Implement device supported verb APIs") Link: https://patch.msgid.link/r/20260512183852.614045-1-jmoroni@google.com Signed-off-by: Jacob Moroni <jmoroni@google.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
2026-05-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf 7.1-rc5Alexei Starovoitov
Cross-merge BPF and other fixes after downstream PR. Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2026-05-25spi: omap2-mcspi: Use of_device_get_match_data()Rosen Penev
Use of_device_get_match_data() to fetch platform match data directly instead of open-coding an of_match_device() lookup. This also lets the driver drop the of_device.h include. Assisted-by: Codex:GPT-5.5 Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://patch.msgid.link/20260519004352.627148-1-rosenp@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-05-25drm/i915/dp: Detect changes in common link parametersImre Deak
Detect DPRX capability changes without a long HPD or RX_CAP_CHANGED signal and queue a corresponding link params reset. Besides detecting the above unexpected capability changes, this also avoids races between queuing and handling a deferred link params reset. v2: (Ville) - Query/set intel_dp::reset_link_params instead of using helpers for these. - Assert matching types for old/new common rate elements as well. - Add TODO: for adding a struct tracking both rates and number of rates. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260522160514.2628249-5-imre.deak@intel.com
2026-05-25drm/i915/dp: Cache max common lane countImre Deak
Cache the maximum common lane count together with the common link rates. This is safe because the cached value is updated: - during driver probe, before the connector is registered and can be used for mode validation or modesetting - during resume, before output HW state readout can query it - during connector detection, right after updating the sink/link capabilities Caching the value allows detecting max common lane count changes in a follow-up change and keeps the tracking of max common lane count aligned with that of common rates. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260522160514.2628249-4-imre.deak@intel.com
2026-05-25drm/i915/dp: Add helper to set common link paramsImre Deak
Add intel_dp_set_common_link_params() to prepare for updating the maximum common lane count together with the common rates. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260522160514.2628249-3-imre.deak@intel.com
2026-05-25drm/i915/dp: Reset link params after a DPRX capability changeImre Deak
There is no reason to distinguish between DPRX capability changes signaled via a long HPD and via an RX_CAP_CHANGED HPD IRQ. Both cases result in reading out the DPRX capabilities and updating the corresponding sink and common capabilities cached in intel_dp, however only the long HPD resets the link training/recovery state and MST link probe parameters correspondingly. The link training/recovery state may contain reduced maximum link rate/lane count values left over from a previous link training failure. Based on the above after an RX_CAP_CHANGED increased the link rate, lane count parameters the maximum link rate/lane count in the link training/recovery state may remain below these, leaving the newly added valid configurations unavailable for subsequent modesets in an inconsistent way. Handle RX_CAP_CHANGED IRQs the same way as long HPDs and reset the link recovery state and MST link probe parameters in that case as well. v2: Set intel_dp::reset_link_params instead of using a helper for this. (Ville). Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patch.msgid.link/20260522160514.2628249-2-imre.deak@intel.com
2026-05-25drm/hyperv: validate VMBus packet size in receive callbackBerkant Koc
hyperv_receive_sub() reads msg->vid_hdr.type and dispatches into one of four message-type branches without knowing how many bytes the host wrote into hv->recv_buf. The completion path then runs memcpy(hv->init_buf, msg, VMBUS_MAX_PACKET_SIZE), so the consumer that wakes on wait_for_completion_timeout() can read up to 16 KiB of residue from a prior message as if it were the response payload. Pass bytes_recvd into hyperv_receive_sub() and reject any packet that does not cover the pipe + synthvid header. A single switch on msg->vid_hdr.type then computes the type-specific payload size: the three completion-driving types (SYNTHVID_VERSION_RESPONSE, SYNTHVID_RESOLUTION_RESPONSE, SYNTHVID_VRAM_LOCATION_ACK) fall through to a shared exit that requires that size before memcpy/complete, while SYNTHVID_FEATURE_CHANGE validates its own payload and returns before reading is_dirt_needed. Unknown types are dropped. SYNTHVID_RESOLUTION_RESPONSE is variable length: the host fills resolution_count entries, not the full SYNTHVID_MAX_RESOLUTION_COUNT array. Validate the fixed prefix first so resolution_count can be read, bound it against the array, then require only the count-sized array, so the shorter responses the host actually sends are accepted. Only run the sub-handler when vmbus_recvpacket() returned success. The memcpy length is bytes_recvd, which is bounded by VMBUS_MAX_PACKET_SIZE only on a successful receive; on -ENOBUFS vmbus_recvpacket() instead reports the required length, which can exceed hv->recv_buf, so copying bytes_recvd would read and write past the 16 KiB buffers. Gating on the success return keeps the copy bounded. The nonzero-return path is itself a malformed-message case and is now logged rather than silently skipped; channel recovery is not attempted. Rejected packets are reported via drm_err_ratelimited() rather than silently dropped, matching the CoCo-hardened pattern in hv_kvp_onchannelcallback(). Fixes: 76c56a5affeb ("drm/hyperv: Add DRM driver for hyperv synthetic video device") Cc: stable@vger.kernel.org # 5.14+ Signed-off-by: Berkant Koc <me@berkoc.com> Assisted-by: Claude:claude-opus-4-7 berkoc-pipeline Reviewed-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Michael Kelley <mhklinux@outlook.com> Signed-off-by: Hamza Mahfooz <hamzamahfooz@linux.microsoft.com> Link: https://patch.msgid.link/8200dbc199c7a9b75ac7e8af6c748d2189b5ebd5.1779542874.git.me@berkoc.com
2026-05-25drm/hyperv: validate resolution_count and fix WIN8 fallbackBerkant Koc
A SYNTHVID_RESOLUTION_RESPONSE with resolution_count > 64 walks past the supported_resolution[SYNTHVID_MAX_RESOLUTION_COUNT] array in the parse loop. Bound resolution_count against the array size, folded into the existing zero-check. When the WIN10 resolution probe fails, the caller in hyperv_connect_vsp() left hv->screen_*_max / preferred_* unpopulated, which sets mode_config.max_width / max_height to 0 and makes drm_internal_framebuffer_create() reject every userspace framebuffer with -EINVAL. The pre-WIN10 branch had the same gap for preferred_width / preferred_height. Use a single post-probe fallback guarded by screen_width_max == 0 so both paths converge on the WIN8 defaults. Signed-off-by: Berkant Koc <me@berkoc.com> Assisted-by: Claude:claude-opus-4-7 berkoc-pipeline Fixes: 76c56a5affeb ("drm/hyperv: Add DRM driver for hyperv synthetic video device") Cc: stable@vger.kernel.org # 5.14+ Reviewed-by: Michael Kelley <mhklinux@outlook.com> Tested-by: Michael Kelley <mhklinux@outlook.com> Signed-off-by: Hamza Mahfooz <hamzamahfooz@linux.microsoft.com> Link: https://patch.msgid.link/6945b22419c7d404b4954a113de2ac9c900dba93.1779542874.git.me@berkoc.com
2026-05-25ASoC: add shared BCLK rate constraint for cross-DAI coordinationMark Brown
Troy Mitchell <troy.mitchell@linux.spacemit.com> says: On some SoCs (e.g. SpacemiT K3), multiple I2S controllers share the same physical BCLK. When one controller is already streaming, the others must use hw_params that result in the same BCLK rate, otherwise the shared clock would be reconfigured and corrupt the active stream. This series adds framework-level support for this constraint: Patch 1 adds the dt-bindings for the spacemit,k3-i2s compatible. The K3 SoC uses the same I2S IP as K1 but requires additional clocks: a dedicated sysclk_div, along with c_sysclk and c_bclk which are shared across multiple I2S controllers. Patch 2 adds a DEFINE_GUARD wrapping snd_soc_card_mutex_lock() and snd_soc_card_mutex_unlock() so that scope-based locking picks up the SND_SOC_CARD_CLASS_RUNTIME lockdep subclass. Patch 3 adds the constraint logic in soc-pcm.c. During PCM open, every DAI that has a bclk clock pointer gets a hw_rule registered unconditionally. The rule callback runs at hw_refine time: it scans the card for an active peer sharing the same physical BCLK (via clk_is_match()) that has already completed hw_params, then constrains the current stream's rate to match the established BCLK rate. The first DAI to complete hw_params is unconstrained; subsequent DAIs must match. Two modes are supported: - Default (I2S): BCLK = rate * channels * sample_bits. The rule derives the valid rate range from the current channel and sample_bits intervals. - Explicit ratio (TDM): if the driver sets dai->bclk_ratio (e.g. slots * slot_width), the rule computes the single valid rate as active_bclk_rate / bclk_ratio. This series was prompted by review feedback on the SpacemiT K3 I2S series, where a vendor-specific fixed-sample-rate property was rejected in favor of a generic framework solution: https://lore.kernel.org/all/afFqgF6ZRwYdfUmL@sirena.co.uk/ Link: https://patch.msgid.link/20260522-i2s-same-blk-v4-0-a71a86faaa20@linux.spacemit.com
2026-05-25drm/i915/psr: Allow SCL=0 on platforms with always-on VRR TGAnkit Nautiyal
For Legacy timing generator, if there are no panel replay/sel_update or other SRD constraints, the Set context latency (SCL) window should be at least 1. However, for VRR timing generator the SCL window can be 0. It has other guardband constraints, but that are checked during guardband computation. Allow SCL to be 0 for platforms that have VRR TG always on. Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patch.msgid.link/20260517142753.2813959-3-ankit.k.nautiyal@intel.com
2026-05-25drm/i915/psr: Simplify the conditions for SCL computationAnkit Nautiyal
'needs_sel_update' is common for both display version branches, so check it once and keep the version specific checks as separate early returns. v2: Split into separate early returns. (Jani) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patch.msgid.link/20260517142753.2813959-2-ankit.k.nautiyal@intel.com
2026-05-25soc: renesas: Identify R-Car R8A779MD M3Le SoCMarek Vasut
Add support for identifying the R-Car M3Le (R8A779MD) SoC. The Renesas R-Car R8A779MD M3Le SoC is a variant of the already supported R-Car M3-N SoC with reduced peripherals. Enable support for the M3Le SoC through already existing ARCH_R8A77965 configuration symbol. PRR reads 0x67c05501. Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Link: https://patch.msgid.link/20260504144534.43745-6-marek.vasut+renesas@mailbox.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25drm/i915/display: Handle odd position for planar formats in selective fetchJouni Högander
Since Lunarlake there is no restriction planar planes has to be even positions. Due to this we may end up having odd offset for UV-plane in selective fetch configuration. Add handling for this case into selective fetch configuration. Bspec: 68927 Suggested-by: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Vidya Srinivas <vidya.srinivas@intel.com> Link: https://patch.msgid.link/20260512080022.2527094-1-jouni.hogander@intel.com
2026-05-25drm/i915/psr: Use DC_OFF wake reference to block DC6 on vblank enableJouni Högander
We are observing following warnings: *ERROR* power well DC_off state mismatch (refcount 0/enabled 1) gen9_dc_off_power_well_enabled is considering target state DC_STATE_DISABLE as DC_OFF power well being enabled. Fix this by using wakeref for the purpose. To achieve this we need to modify notification code as well. Currently it is possible that PSR gets notified vblank enable/disable twice on same status. This is currently not a problem as it is just triggering call to intel_display_power_set_target_dc_state with same target state as a parameter. When using wakeref this becomes a problem due to reference counting. Fix this storing vbank status on last notification and use that to ensure there are no more than one notification with same vblank status. v2: ensure there is no subsequent notifications with same status Fixes: aa451abcffb5 ("drm/i915/display: Prevent DC6 while vblank is enabled for Panel Replay") Cc: <stable@vger.kernel.org> # v6.13+ Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Link: https://patch.msgid.link/20260520104944.239797-2-jouni.hogander@intel.com
2026-05-25drm/i915/psr: Block DC states on vblank enable when Panel Replay supportedJouni Högander
Currently we are blocking DC states only when Panel Replay is enabled on vblank enable. It may happen that Panel Replay is getting enabled when vblank is already enabled. Fix this by blocking DC states always if Panel Replay is supported. While at it take care of possible dual eDP case by looping all encoders supporting PSR. Fixes: 0c427ac78a1d ("drm/i915/psr: Add interface to notify PSR of vblank enable/disable") Cc: <stable@vger.kernel.org> # v6.16+ Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Link: https://patch.msgid.link/20260520104944.239797-1-jouni.hogander@intel.com
2026-05-25pinctrl: renesas: rzg2l: Populate struct gpio_chip::set_configClaudiu Beznea
Populate struct gpio_chip::set_config to allow various GPIO settings. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260515124008.2947838-3-claudiu.beznea@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25pinctrl: renesas: rzg2l: Use -ENOTSUPP instead of -EOPNOTSUPPClaudiu Beznea
The pinctrl and GPIO core code make exceptions for the -ENOTSUPP error code. One such example is gpio_set_config_with_argument_optional(), which returns success when gpio_set_config_with_argument() returns -ENOTSUPP, but reports failure for all other error codes. Returning -EOPNOTSUPP from the pinctrl driver on the unsupported pinctrl operation may lead to boot failures when pinctrl drivers implements struct gpio_chip::set_config, the system uses GPIO hogs, and the struct gpio_chip::set_config implementation returns -EOPNOTSUPP for the unsupported operations. Return -ENOTSUPP for the unsupported pinctrl operation. Fixes: 560c633d378a ("pinctrl: renesas: rzg2l: Drop oen_read and oen_write callbacks") Fixes: c4c4637eb57f ("pinctrl: renesas: Add RZ/G2L pin and gpio controller driver") Cc: stable@vger.kernel.org Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260515124008.2947838-2-claudiu.beznea@kernel.org Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25pinctrl: renesas: rzt2h: Skip PFC mode configuration if already setLad Prabhakar
In rzt2h_pinctrl_set_pfc_mode(), read the PMC and PFC registers upfront and skip the pin function configuration if the pin is already in peripheral mode with the desired function. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260513115312.1574367-3-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25pinctrl: renesas: rzt2h: Remove unused variable in rzt2h_pinctrl_register()Lad Prabhakar
Variable 'j' in rzt2h_pinctrl_register() is incremented during pin descriptor initialization but never used afterwards. Remove the unused variable and the associated dead code. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260513115312.1574367-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25clk: renesas: rzg2l: Rename iterator in for_each_mod_clock() to avoid shadowingLad Prabhakar
Rename the internal loop iterator variable in the for_each_mod_clock() macro from 'i' to '__i'. The current naming conflicts with local loop variables named 'i' inside code blocks that utilize the macro, triggering compiler warnings due to variable shadowing: drivers/clk/renesas/rzg2l-cpg.c:1494:36: warning: declaration of `i` shadows a previous local [-Wshadow] 1494 | for (unsigned int i = 0; i < clk->num_shared_mstop_clks; i++) Using a unique identifier for the macro-internal iterator resolves the shadowing warnings globally across all macro expansions. Fixes: 3fd4a8bb4b63 ("clk: renesas: rzg2l: Add macro to loop through module clocks") Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260520092947.70596-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25clk: renesas: r9a08g045: Drop unused DEF_G3S_MUX macroLad Prabhakar
Drop the unused DEF_G3S_MUX helper macro from the r9a08g045 CPG driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20260520092516.69819-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2026-05-25pinctrl: spacemit: fix NULL check in spacemit_pin_set_configHan Gao
spacemit_pin_set_config() looks up the per-pin descriptor with spacemit_get_pin() then checks the wrong variable for failure: const struct spacemit_pin *spin = spacemit_get_pin(pctrl, pin); ... if (!pin) return -EINVAL; reg = spacemit_pin_to_reg(pctrl, spin->pin); pin is an unsigned int pin id, where 0 (GPIO_0 / gmac0_rxdv on K3) is a valid pin, so rejecting it here drops the PAD config write for the first pin of every group. On K3 Pico-ITX the GMAC RGMII group lists pin 0 as its first entry, so its drive-strength / bias configuration was silently ignored. The intended guard is against spacemit_get_pin() returning NULL when the pin id isn't in the SoC's pin table. Check spin instead, which both restores PAD setup for pin 0 and prevents a NULL deref on spin->pin. Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC") Signed-off-by: Han Gao <gaohan@iscas.ac.cn> Reviewed-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>