From a6d4bb0a6aced2bdffd606d3a9d5df73ea0d19a1 Mon Sep 17 00:00:00 2001 From: Wei Deng Date: Mon, 22 Jun 2026 12:11:57 +0530 Subject: arm64: dts: qcom: lemans-evk: Describe the PCIe M.2 Key E connector The lemans EVK has the PCIe M.2 Mechanical Key E connector to connect wireless connectivity cards over PCIe and UART interfaces. Hence, describe the connector node and link it with the PCIe 0 Root Port and UART17 nodes through graph port/endpoint. The M.2 Key E connector is powered by a 3.3V fixed regulator (vreg_wcn_3p3) which is sourced from the board's 12V DC input rail (vreg_dcin_12v). Both regulators are always-on and are required by the pcie-m2-e-connector binding. Also add the serial1 = &uart17 alias, which is required for the Bluetooth serdev device to be enumerated on the UART17 interface. Reviewed-by: Bartosz Golaszewski Reviewed-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam Signed-off-by: Wei Deng Reviewed-by: Konrad Dybcio Link: https://lore.kernel.org/r/20260622-v3-lemans-split-v3-2-d26bb22594e3@oss.qualcomm.com Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/lemans-evk.dts | 75 +++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/lemans-evk.dts b/arch/arm64/boot/dts/qcom/lemans-evk.dts index 0b01be78a737..0c53640c42a6 100644 --- a/arch/arm64/boot/dts/qcom/lemans-evk.dts +++ b/arch/arm64/boot/dts/qcom/lemans-evk.dts @@ -21,6 +21,7 @@ ethernet0 = ðernet0; mmc1 = &sdhc; serial0 = &uart10; + serial1 = &uart17; serial2 = &uart0; }; @@ -119,6 +120,38 @@ }; }; + connector-3 { + compatible = "pcie-m2-e-connector"; + vpcie3v3-supply = <&vreg_wcn_3p3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + m2_e_pcie_ep: endpoint@0 { + reg = <0>; + remote-endpoint = <&pcieport0_ep>; + }; + }; + + port@3 { + reg = <3>; + #address-cells = <1>; + #size-cells = <0>; + + m2_e_uart_ep: endpoint@0 { + reg = <0>; + remote-endpoint = <&uart17_ep>; + }; + }; + }; + }; + edp0-connector { compatible = "dp-connector"; label = "EDP0"; @@ -218,6 +251,17 @@ regulator-max-microvolt = <2950000>; }; + vreg_dcin_12v: regulator-dcin-12v { + compatible = "regulator-fixed"; + + regulator-name = "VREG_DCIN_12V"; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + + regulator-always-on; + regulator-boot-on; + }; + vreg_sdc: regulator-vreg-sdc { compatible = "regulator-gpio"; @@ -231,6 +275,19 @@ startup-delay-us = <100>; }; + + vreg_wcn_3p3: regulator-wcn-3p3 { + compatible = "regulator-fixed"; + + regulator-name = "VREG_WCN_3P3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + vin-supply = <&vreg_dcin_12v>; + + regulator-always-on; + regulator-boot-on; + }; }; &apps_rsc { @@ -815,6 +872,14 @@ status = "okay"; }; +&pcieport0 { + port { + pcieport0_ep: endpoint { + remote-endpoint = <&m2_e_pcie_ep>; + }; + }; +}; + &pmm8654au_0_pon_resin { linux,code = ; status = "okay"; @@ -1057,6 +1122,16 @@ status = "okay"; }; +&uart17 { + status = "okay"; + + port { + uart17_ep: endpoint { + remote-endpoint = <&m2_e_uart_ep>; + }; + }; +}; + &ufs_mem_hc { reset-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; vcc-supply = <&vreg_l8a>; -- cgit v1.2.3