diff options
| -rw-r--r-- | platform/generic/include/spacemit/k1.h | 46 |
1 files changed, 18 insertions, 28 deletions
diff --git a/platform/generic/include/spacemit/k1.h b/platform/generic/include/spacemit/k1.h index bd666346..7095bc08 100644 --- a/platform/generic/include/spacemit/k1.h +++ b/platform/generic/include/spacemit/k1.h @@ -25,33 +25,23 @@ #define PMU_AP_BASE 0xd4282800 -#define PMU_AP_CORE0_WAKEUP_OFFSET (PMU_AP_BASE + 0x12c) -#define PMU_AP_CORE4_WAKEUP_OFFSET (PMU_AP_BASE + 0x324) -#define PMU_AP_CLUSTER0_WAKEUP_OFFSET(index) (PMU_AP_CORE0_WAKEUP_OFFSET + index * 4) -#define PMU_AP_CLUSTER1_WAKEUP_OFFSET(index) (PMU_AP_CORE4_WAKEUP_OFFSET + index * 4) - -#define PMU_AP_CORE0_IDLE_CFG_OFFSET (PMU_AP_BASE + 0x124) -#define PMU_AP_CORE4_IDLE_CFG_OFFSET (PMU_AP_BASE + 0x304) -#define PMU_AP_CLUSTER0_IDLE_CFG_OFFSET(index) (PMU_AP_CORE0_IDLE_CFG_OFFSET + index * 4) -#define PMU_AP_CLUSTER1_IDLE_CFG_OFFSET(index) (PMU_AP_CORE4_IDLE_CFG_OFFSET + index * 4) - -#define PMU_AP_CORE0_WAKEUP PMU_AP_CLUSTER0_WAKEUP_OFFSET(0) -#define PMU_AP_CORE1_WAKEUP PMU_AP_CLUSTER0_WAKEUP_OFFSET(1) -#define PMU_AP_CORE2_WAKEUP PMU_AP_CLUSTER0_WAKEUP_OFFSET(2) -#define PMU_AP_CORE3_WAKEUP PMU_AP_CLUSTER0_WAKEUP_OFFSET(3) -#define PMU_AP_CORE4_WAKEUP PMU_AP_CLUSTER1_WAKEUP_OFFSET(0) -#define PMU_AP_CORE5_WAKEUP PMU_AP_CLUSTER1_WAKEUP_OFFSET(1) -#define PMU_AP_CORE6_WAKEUP PMU_AP_CLUSTER1_WAKEUP_OFFSET(2) -#define PMU_AP_CORE7_WAKEUP PMU_AP_CLUSTER1_WAKEUP_OFFSET(3) - -#define PMU_AP_CORE0_IDLE_CFG PMU_AP_CLUSTER0_IDLE_CFG_OFFSET(0) -#define PMU_AP_CORE1_IDLE_CFG PMU_AP_CLUSTER0_IDLE_CFG_OFFSET(1) -#define PMU_AP_CORE2_IDLE_CFG PMU_AP_CLUSTER0_IDLE_CFG_OFFSET(2) -#define PMU_AP_CORE3_IDLE_CFG PMU_AP_CLUSTER0_IDLE_CFG_OFFSET(3) -#define PMU_AP_CORE4_IDLE_CFG PMU_AP_CLUSTER1_IDLE_CFG_OFFSET(0) -#define PMU_AP_CORE5_IDLE_CFG PMU_AP_CLUSTER1_IDLE_CFG_OFFSET(1) -#define PMU_AP_CORE6_IDLE_CFG PMU_AP_CLUSTER1_IDLE_CFG_OFFSET(2) -#define PMU_AP_CORE7_IDLE_CFG PMU_AP_CLUSTER1_IDLE_CFG_OFFSET(3) +#define PMU_AP_CORE0_WAKEUP (PMU_AP_BASE + 0x12c) +#define PMU_AP_CORE1_WAKEUP (PMU_AP_BASE + 0x130) +#define PMU_AP_CORE2_WAKEUP (PMU_AP_BASE + 0x134) +#define PMU_AP_CORE3_WAKEUP (PMU_AP_BASE + 0x138) +#define PMU_AP_CORE4_WAKEUP (PMU_AP_BASE + 0x324) +#define PMU_AP_CORE5_WAKEUP (PMU_AP_BASE + 0x328) +#define PMU_AP_CORE6_WAKEUP (PMU_AP_BASE + 0x32c) +#define PMU_AP_CORE7_WAKEUP (PMU_AP_BASE + 0x330) + +#define PMU_AP_CORE0_IDLE_CFG (PMU_AP_BASE + 0x124) +#define PMU_AP_CORE1_IDLE_CFG (PMU_AP_BASE + 0x128) +#define PMU_AP_CORE2_IDLE_CFG (PMU_AP_BASE + 0x160) +#define PMU_AP_CORE3_IDLE_CFG (PMU_AP_BASE + 0x164) +#define PMU_AP_CORE4_IDLE_CFG (PMU_AP_BASE + 0x304) +#define PMU_AP_CORE5_IDLE_CFG (PMU_AP_BASE + 0x308) +#define PMU_AP_CORE6_IDLE_CFG (PMU_AP_BASE + 0x30c) +#define PMU_AP_CORE7_IDLE_CFG (PMU_AP_BASE + 0x310) /* power down */ #define PMU_AP_IDLE_PWRDWN BIT(0) @@ -68,7 +58,7 @@ #define C0_RVBADDR_LO_ADDR 0xd4282db0 #define C0_RVBADDR_HI_ADDR 0xd4282db4 #define C1_RVBADDR_LO_ADDR 0xd4282eb0 -#define C1_RVBADDR_HI_ADDR 0xd4282c04 +#define C1_RVBADDR_HI_ADDR 0xd4282eb4 #define CCI_550_PLATFORM_CCI_ADDR 0xd8500000 |