qemu/qemu.git, branch staging

Merge tag 'accel-20260706' of https://github.com/philmd/qemu into staging

2026-07-06T16:38:14+00:00

Accelerators patches queue - Various cleanups around debugging APIs - Correctly check singlestep flag enabled in CPUState - Fix possible memory corruption with MSHV (CID 1660876) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmpLsRwACgkQ4+MsLN6t # wN7TRRAAhTnAG0VuUat9MYUCuWWSiTrNKm6m2vVcO+Zec/bBbU1+twBSBzVQ/rwm # kGzImAWip6nYorU5BxTKePlpCy6Rm+t0evYaA5ixF0aXtmm3n6IGIMSsi5yEJxF5 # YHDXxvpD56Z1p8kRvkp4ynABiiF5gfBFqbSuI7/gxSI2tcJ2uSx8MC+HEO/X4vJc # +Clich5n4eyN7YL7vqGrVl84cqHOwe40bXAm1OOa5S83/y2hc//SHgFqTB8BL1P7 # 9SafbFIFiqbfy4kWV86mSu3LDsSYLoIU7bgpRb9mX9WVrvfuoQeVUf7XH+fjmqIo # s/2uHN6ha/h12jS1q0nCYu585EzXCuPRF3upSslPaoEd16sFEO6ZiODmaMIsomA2 # SlCM3jGYUUw+vkfS/+SJUF17QEHtv0R8Dp5IfseE9Tp+huYvJuwn3Qh4UwbVRg0P # YHoRa2KiXvBPntY/GkyhCL9Y5oWC5RaRHyKxMs83tdUouOeBy2t/ftnVtDqeRn3p # 04W+pilUEodSnzcNfAGxQhkqDeGIOveRubaeNICgmxO0Bp9dMUZIOju84hY77KEw # hClBI87cOc1REC7YNXkoouWcr8moNSZlKAyIbTf/Ag5cAheYOSvO5UDDVVepudSl # kER+S1iuPkeb0uVvnvk5Kh4UBCMwdfYKe9bNu/SB0ab6N3IpY4s= # =knBq # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Jul 2026 15:43:56 CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) " [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'accel-20260706' of https://github.com/philmd/qemu: (32 commits) cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping() cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags cpu: Introduce cpu_single_stepping() helper cpu: Better name cpu_single_step() trace event accel/tcg: Improve docstrings around TCGCPUOps::*watchpoint* handlers target/ppc: Ensure TCG is used in ppc_update_daw() target/arm: Inline check_watchpoints() in arm_debug_check_watchpoint() accel: Use GdbBreakpointType enum gdbstub: Introduce GdbBreakpointType enumerator gdbstub: Reduce @type variable scope gdbstub/user: Directly call gdb_breakpoint_remove_all() in user mode accel: Remove unnecessary 'inline' qualifier in remove_all_breakpoints cpu: Move BREAKPOINT definitions to 'exec/breakpoint.h' cpu: Move cpu_breakpoint_test out of line accel: Remove AccelOpsClass::supports_guest_debug accel: Hold @can_reverse information in AccelGdbConfig gdbstub: Make default replay_mode value explicit in stubs accel: Have each implementation return their AccelGdbConfig gdbstub: Move supported_sstep_flags in AccelGdbConfig structure gdbstub: Reduce gdb_supports_guest_debug() scope ... Signed-off-by: Stefan Hajnoczi

Merge tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu into staging

2026-07-06T16:37:28+00:00

target-arm queue: * hw/net/fsl_etsec: validate FCB offsets in process_tx_fcb() * hw/arm/smmuv3-accel: Fix veventq read returning true on EAGAIN/EINTR * target/arm: Only evaluate SCR_EL3.PIEN if ARM_FEATURE_EL3 is present * hw/arm: use cortex-a9 mpcore base for CBAR on npcm7xx machines * docs/specs/fw_cfg: Document all architecture register layouts * hw/nvram/fw_cfg: Simplify functions so board models don't have the opportunity to create non-standard fw_cfg register layouts * hw/misc: use tracepoints rather than DPRINTF in imx ccm models * hw/arm: add support for shim loading * docs/system/arm: Document Zynq Buildroot boot * target/arm: Report correct syndrome to AArch32 EL2 for trapped Neon/VFP insns * target/arm: implement WFET to not be a NOP * target/arm: Emulate FEAT_SME_MOP4 * target/arm: Emulate FEAT_FPRCVT * target/arm: Emulate FEAT_SSVE_FEXPA # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmpLhTkZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vssD/wOwsb9NZ4E7TfpK3JFl3WH # ePkwg0dg/etzbMR+fQagij3oI0+1qFUn6qU5PJddAcP1Zwz8NouKJjfvJgnmAQoZ # eIfoI29j1da6aOywicnKGlvjM3oEBZKxrC+ChJeF+8E0u1V0+msR9osluUa3ZNDf # 4Zcik/h6hJxva8JMPjdds2ZJBDsVuLbNM6jBfbE3Bp7Lg7HZ48u6++YaZAFUFqHC # gWHKs9jKAnzcL05cCLUU4LdyhJH1M3vLFnKbugn1zUlSb6L5oLrhCIIPKMcAuUjd # 6OWOzVJEsooxf8iqvAcAFmXpZEzLal12zjYUPowCZGUzHx6kqBFfv7KoDMXKZXI9 # kYFhOsTmpWrE+VLT/ZwVExk/xdgUMlfyEy8aJzetexvaLIs7C7hWQH/FQn1h395Q # ot79co3m6D3F11HQvSlJZthCZk0SE5A8hZQP8joPhSBJ3rM24nejINT5Lz6wbjm0 # ovMBjvBtvUiQm2KrqJ+dIFCOdabQXxnokDZSAxFUcPXd526MALyzhcR5Q5op9/OA # 3A2KUOlkch4rdROifuRniN/UuN/oWHOkVzp7B/WOAn/KFVKFnuBwPcFvFfQjq81b # G8RJ5jZyDmSLCf66pHT0xxC8cFhilwF56QxRH4vNPVbTvLdHgRHbJbF1f1hd1eMa # Gy8zZGTXfo2hBz2qZmixfA== # =NpV8 # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Jul 2026 12:36:41 CEST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [full] # gpg: aka "Peter Maydell " [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20260706' of https://gitlab.com/pm215/qemu: (49 commits) target/arm: Define fields for NSACR target/arm: Report correct syndrome to AArch32 EL2 for trapped Neon/VFP insns target/arm: Separate syndrome functions for A32 and A64 target/arm: Separate out Neon from VFP access checks target/arm: Enable FEAT_SME_MOP4 for -cpu max target/arm: Implement USMOP4[AS] target/arm: Implement UMOP4[AS] (4-way) target/arm: Implement UMOP4[AS] (2-way) target/arm: Implement SUMOP4[AS] target/arm: Implement SMOP4[AS] (4-way) target/arm: Implement SMOP4[AS] (2-way) target/arm: Implement FMOP4A (widening, 2-way, FP8 to FP16) target/arm: Implement FMOP4 (widening, 4-way fp8 to fp32) target/arm: Implement FMOP4 (widening, 2-way fp16 to fp32) target/arm: Implement BFMOP4 (widening) target/arm: Implement BFMOP4 (non-widening) target/arm: Implement FMOP4 (non-widening) for float64 target/arm: Implement FMOP4 (non-widening) for float16 target/arm: Implement FMOP4 (non-widening) for float32 docs/system/arm: Document Zynq Buildroot boot ... Signed-off-by: Stefan Hajnoczi

Merge tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu into staging

2026-07-06T16:36:52+00:00

PPC PR for 11.1 Soft-freeze # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEa4EM1tK+EPOIPSFCRUTplPnWj7sFAmpLZTwACgkQRUTplPnW # j7vb/w//XmleEwlL+p+YKndc4Su+qj9c3lApEFEiFi78biATrXpFTNbOxhOpWdv4 # jaI1kWyINrTPgnXgHEKNJuhhsSjy5/HURCgkivPnnvhK95mWMi/0f1SzICmc9DCo # hjDeQfHw5zhF6hu6QknTfcworpsdA9uVtbx0+8s0lMMDmWze2WLg6f9OXioxhseN # vJoRaJoEo1f/vwwDFOdGngz36p0xD+eUynPTRlOymMJfW271KtNlZqouCCryI92I # ksaYa+jorE16l608SyG1Yhf/oDSlj9BufFHmgAngvlDwPFglhoJx0kPeKIrT7QE0 # oGzwnOwXJH0lGuwQwISvgrtquD8unY9gTZvrF6NPIPtpMJSE+TGluoNdf/Sr2c3l # xMG/+yIwHehgXa/Lh4UN3G7yALaIjVdkcSdexuo1pfFemUCwLYPDMGoaksda+SZd # m4Xd05ZCvp2RZHRNbWheu6TxZKEHKWO8UV8U0zNgKZTz7muVURrtLpoQJFLRq9V7 # krqyeLOePZtGC15a8unAbIVJVK2vOOnoqQPbuqZ57GTVqcmmcTSIEkRDcbMTADKo # Qv8WEqOWo9OYQvGF/BMP+ed1UiNzGXY2WnVrF40D3K/I/wT11mHbuKZY3gbFZ5At # 1y2I59EvV/xYHdjBmDoT8smzuQwywSKZnzeKptbIVGFbuPPVFFs= # =icWo # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Jul 2026 10:20:12 CEST # gpg: using RSA key 6B810CD6D2BE10F3883D21424544E994F9D68FBB # gpg: Good signature from "Harsh Prateek Bora " [full] # gpg: aka "Harsh Prateek Bora " [full] # Primary key fingerprint: 6B81 0CD6 D2BE 10F3 883D 2142 4544 E994 F9D6 8FBB * tag 'pull-ppc-for-11.1-sf-20260706' of https://gitlab.com/harshpb/qemu: MAINTAINERS: Add self as maintainer for PowerNV ppc/pnv: Remove Power8E and Power8NVL CPUs ppc/pnv: Remove Power8E and Power8NVL pnv chips ppc/pnv: Replace Power8E with Power11 for 'none' machine test tests/functional: Use default powernv machine instead of power10 tests/qtest: Add Power11 chip & machine to qtests tests/qtest/pnv_spi: Test Power11 PNV_SPI tests/functional: Add remote interrupts test for PowerNV Signed-off-by: Stefan Hajnoczi

Merge tag 'hppa-fixes-for-v11.1-pull-request' of https://github.com/hdeller/qemu-hppa into staging

2026-07-06T16:36:12+00:00

Updates for hppa architecture for qemu v11.1 A few patches to fix TLB for HP-UX 9, and a lasi irq fix, as well as a new SeaBIOS-hppa v25 firmware. # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCakp8eQAKCRD3ErUQojoP # X0S0AP9snfMLNer3zkojMLVsUNJtNUGmcRSNpmapiEN59lHRJwEAv30x2P3CnXLZ # ObN+XV79pTNHtrBAGRYKHUtaLPddlgQ= # =RRlH # -----END PGP SIGNATURE----- # gpg: Signature made Sun 05 Jul 2026 17:47:05 CEST # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller " [unknown] # gpg: aka "Helge Deller " [unknown] # gpg: aka "Helge Deller " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa-fixes-for-v11.1-pull-request' of https://github.com/hdeller/qemu-hppa: target/hppa: Update SeaBIOS-hppa to version 25 hw/misc/lasi: derive IRR from pending and unmasked requests target/hppa: Delay MMU update until TLB protection bits were set target/hppa: Work-around for Fast TLB insert instruction on HP-UX 9 Signed-off-by: Stefan Hajnoczi

Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

2026-07-06T16:33:19+00:00

pci, vhost, virtio, iommu: features, fixes, cleanups A new sp-mem device New tests for vtd New seg-max-adjust flag for vhost-user-blk Watchdog support for arm/virt Fixes, cleanups all over the place. Signed-off-by: Michael S. Tsirkin # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCgAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmpKWdQPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpMZgIALaDhbZFvYbdvDIzhX2MkSGWyMOU3ECsBojM # p6g8HimtYlRV0ep468fvnKdWchAncozMKawAGlUZoWQ5jX8rncBvR2cRE9oOQ7dd # JPOiz0bjB9USebD9NhQ61bdi0nlQHAcH8rhEt3qrw2j8LZOIeE63pEFE3NxIMO2e # gO+ECDMBGfXsupDM5KCfPRzXPDy17QwI7BYYU7iY2T505/Xkr+ICLwfQ/VLPCMwY # FG8pqJH/POexARuNaQWTAGpceAf/Pb0cYg9aKd6cxgxyBzP1fpAmL+C1e/cK5Zop # n8AxJfTD/HPAqWDA+YHAijfFdZQ64Hjor+5kGkgurovlYc48iP4= # =jg7f # -----END PGP SIGNATURE----- # gpg: Signature made Sun 05 Jul 2026 15:19:16 CEST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (44 commits) virtio-net: validate RSS indirections_len in post_load vhost-user-blk: add seg-max-adjust flag vhost-user-scmi: free vhost virtqueue array on cleanup hw/virtio-crypto: enforce max akcipher key length vhost-user: Guarantee that memory regions do not overlap tests: acpi: arm/virt: update expected GTDT blob tests: acpi: arm/virt: add GTDT watchdog table test case tests: acpi: arm/virt: whitelist GTDT table tests: acpi: arm/virt: update expected WDAT blob tests: acpi: arm/virt: add WDAT table test case tests: acpi: arm/virt: whitelist new WDAT table arm: virt: add support for WDAT based watchdog acpi: introduce WDAT table for GWDT arm: sbsa-gwdt: add 'wdat' option arm: virt: create sbsa-gwdt watchdog arm: sbsa_gwdt: rename device type to sbsa-gwdt arm: add tracing events to sbsa_gwdt arm: sbsa_gwdt: fixup default "clock-frequency" vdpa: fix use-after-free of vqs in vhost_vdpa_device_unrealize vhost-user-base: clean up vhost_dev on realize failure ... Signed-off-by: Stefan Hajnoczi

cpu: Only check SSTEP_ENABLE flag in cpu_single_stepping()

2026-07-06T13:42:18+00:00

Only the SSTEP_ENABLE bitmask means single-step is enabled. Fixes: 60897d369f1 ("Debugger single step without interrupts") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Reviewed-by: Richard Henderson Message-ID: <20260705215729.62196-33-philmd@oss.qualcomm.com>

cpu: Rename CPUState @singlestep_enabled -> @singlestep_flags

2026-07-06T13:42:18+00:00

CPUState::singlestep_enabled contains multiple flags since commit 60897d369f1 ("Debugger single step without interrupts"). Use an unsigned type and rename the field to avoid mistakes. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20260705215729.62196-32-philmd@oss.qualcomm.com>

cpu: Introduce cpu_single_stepping() helper

2026-07-06T13:42:18+00:00

Access CPUState::@singlestep_enabled field with a helper. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-ID: <20260705215729.62196-31-philmd@oss.qualcomm.com>

cpu: Better name cpu_single_step() trace event

2026-07-06T13:42:18+00:00

cpu_single_step() is not related to breakpoints. Rename the trace event. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Message-ID: <20260705215729.62196-30-philmd@oss.qualcomm.com>

accel/tcg: Improve docstrings around TCGCPUOps::watchpoint handlers

2026-07-06T13:42:18+00:00

Commit d5ee641cfc5 ("target/ppc: Implement watchpoint debug facility for v2.07S") also implemented TCGCPUOps::debug_check_watchpoint for PPC: make the comment generic. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza Reviewed-by: Richard Henderson Message-ID: <20260705215729.62196-29-philmd@oss.qualcomm.com>