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authorYann Gautier <yann.gautier@st.com>2026-05-06 16:08:12 +0200
committerYann Gautier <yann.gautier@st.com>2026-06-29 15:31:56 +0200
commit566e896ff33244c3cecb00d1de598f470cb9376e (patch)
treeaf9fa0374512614709ca3e39e7163c3ec0c50269
parentddcc8db85b1660c8234be0f26776c471c030cae3 (diff)
downloadarm-trusted-firmware-566e896ff33244c3cecb00d1de598f470cb9376e.tar.gz
arm-trusted-firmware-566e896ff33244c3cecb00d1de598f470cb9376e.zip
fix(st): cast the read_cntfrq_el0() return to unsigned int
The function plat_get_syscnt_freq2() returns an unsigned int type, but read_cntfrq_el0() that is used inside will return an uint64_t value on aarch64 platforms (STM32MP2). But this value is usually 64MHz (HSI) or 24MHz (HSE). It will never be above 4GHz, so it is safe to cast its return value. The issue was found with clang -Wshorten-64-to-32 warning. Change-Id: Iab2162701cabfde4a4416bd4cea45eb15dbeeb5d Signed-off-by: Yann Gautier <yann.gautier@st.com>
-rw-r--r--plat/st/common/stm32mp_common.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c
index 3c7129b70..517298317 100644
--- a/plat/st/common/stm32mp_common.c
+++ b/plat/st/common/stm32mp_common.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2025, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -70,7 +70,14 @@ uintptr_t plat_get_ns_image_entrypoint(void)
unsigned int plat_get_syscnt_freq2(void)
{
- return read_cntfrq_el0();
+ /*
+ * The system counter clock will never be above 4GHz, it is usually set
+ * at 64MHz (HSI) at startup, and then moved to another clock with a
+ * lower frequency and more stable.
+ * It is then safe to cast the return of read_cntfrq_el0 to a 32 bit
+ * value to match the plat_get_syscnt_freq2 function prototype.
+ */
+ return (unsigned int)read_cntfrq_el0();
}
static uintptr_t boot_ctx_address;