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authorHarrison Mutai <harrison.mutai@arm.com>2026-06-23 15:59:49 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2026-06-23 15:59:49 +0000
commitb37126d3ef3a49dc44221ffe9c6839458233eca9 (patch)
treed3f98102f573ac88bd976b990afb3219e0e16f28 /include
parentc69734c36f503f99b3b8ba7453891f26404debad (diff)
parent463b9be45f768b75b487ce7b4d06394959274e5c (diff)
downloadarm-trusted-firmware-b37126d3ef3a49dc44221ffe9c6839458233eca9.tar.gz
arm-trusted-firmware-b37126d3ef3a49dc44221ffe9c6839458233eca9.zip
Merge changes I5a57ebab,I1bd217fd,I024bb354,Ic17c13f4,If07d0b17, ... into integration
* changes: fix(el3-runtime): use #ifdef for IMAGE_BL flags fix(errata-abi): use #ifdef for IMAGE_BL flags fix(cpufeat): use #ifdef for IMAGE_BL flags fix(auth): use #ifdef for IMAGE_BL flags fix(docs): use #ifdef for IMAGE_BL flags fix(cpus): use #ifdef for IMAGE_BL flags
Diffstat (limited to 'include')
-rw-r--r--include/arch/aarch64/arch_helpers.h4
-rw-r--r--include/arch/aarch64/el3_common_macros.S2
-rw-r--r--include/drivers/auth/auth_mod.h6
-rw-r--r--include/lib/el3_runtime/aarch64/context.h24
-rw-r--r--include/lib/el3_runtime/context_mgmt.h6
5 files changed, 21 insertions, 21 deletions
diff --git a/include/arch/aarch64/arch_helpers.h b/include/arch/aarch64/arch_helpers.h
index c799b0c53..ba2a627c8 100644
--- a/include/arch/aarch64/arch_helpers.h
+++ b/include/arch/aarch64/arch_helpers.h
@@ -272,7 +272,7 @@ void disable_mpu_icache_el2(void);
#define write_daifset(val) SYSREG_WRITE_CONST(daifset, val)
-#if ENABLE_FEAT_D128 && !IMAGE_BL32
+#if ENABLE_FEAT_D128 && !defined(IMAGE_BL32)
/* Don't use mrrs/msrr read/write implementation with tspd,
* While using SPD=tspd, tspd compiles with current arch_helpers
* thus trying to use mrrs/msrr read/write from Secure-world.
@@ -305,7 +305,7 @@ DEFINE_SYSREG_RW_FUNCS(vttbr_el2)
DEFINE_RENAME_SYSREG_RW_FUNCS(rcwmask_el1, RCWMASK_EL1)
DEFINE_RENAME_SYSREG_RW_FUNCS(rcwsmask_el1, RCWSMASK_EL1)
-#endif /* ENABLE_FEAT_D128 && !IMAGE_BL32 */
+#endif /* ENABLE_FEAT_D128 && !defined(IMAGE_BL32) */
DEFINE_IDREG_READ_FUNC(id_pfr0_el1)
DEFINE_IDREG_READ_FUNC(id_pfr1_el1)
diff --git a/include/arch/aarch64/el3_common_macros.S b/include/arch/aarch64/el3_common_macros.S
index aa1d197fb..2181b731a 100644
--- a/include/arch/aarch64/el3_common_macros.S
+++ b/include/arch/aarch64/el3_common_macros.S
@@ -78,7 +78,7 @@ feat_sctlr2_not_supported\@:
* ---------------------------------------------------------------------
*/
mov_imm x0, SCR_RESET_VAL
-#if IMAGE_BL31 && defined(SPD_spmd) && SPMD_SPM_AT_SEL2
+#if defined(IMAGE_BL31) && defined(SPD_spmd) && SPMD_SPM_AT_SEL2
mrs x1, id_aa64pfr0_el1
and x1, x1, #MASK(ID_AA64PFR0_SEL2)
cbz x1, 1f
diff --git a/include/drivers/auth/auth_mod.h b/include/drivers/auth/auth_mod.h
index 28aa40784..a58aa76de 100644
--- a/include/drivers/auth/auth_mod.h
+++ b/include/drivers/auth/auth_mod.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -18,7 +18,7 @@
*/
#define IMG_FLAG_AUTHENTICATED (1 << 0)
-#if COT_DESC_IN_DTB && !IMAGE_BL1
+#if COT_DESC_IN_DTB && !defined(IMAGE_BL1)
/*
* Authentication image descriptor
*/
@@ -40,7 +40,7 @@ typedef struct auth_img_desc_s {
const auth_method_desc_t *const img_auth_methods;
const auth_param_desc_t *const authenticated_data;
} auth_img_desc_t;
-#endif /* COT_DESC_IN_DTB && !IMAGE_BL1 */
+#endif /* COT_DESC_IN_DTB && !defined(IMAGE_BL1) */
/* Public functions */
#if TRUSTED_BOARD_BOOT
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h
index 7a6eebacc..bf08036b0 100644
--- a/include/lib/el3_runtime/aarch64/context.h
+++ b/include/lib/el3_runtime/aarch64/context.h
@@ -7,15 +7,15 @@
#ifndef CONTEXT_H
#define CONTEXT_H
-#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
-#include <lib/el3_runtime/context_el2.h>
-#else
+#if !(CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31))
/**
* El1 context is required either when:
- * IMAGE_BL1 || ((!CTX_INCLUDE_EL2_REGS) && IMAGE_BL31)
+ * defined(IMAGE_BL1) || ((!CTX_INCLUDE_EL2_REGS) && defined(IMAGE_BL31))
*/
#include <lib/el3_runtime/context_el1.h>
-#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
+#else
+#include <lib/el3_runtime/context_el2.h>
+#endif /* !(CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31)) */
#include <lib/el3_runtime/simd_ctx.h>
#include <lib/utils_def.h>
@@ -188,12 +188,12 @@
******************************************************************************/
#define CTX_CPTR_EL3 U(0x0)
#define CTX_MPAM3_EL3 U(0x8)
-#if (ENABLE_FEAT_IDTE3 && IMAGE_BL31)
+#if (ENABLE_FEAT_IDTE3 && defined(IMAGE_BL31))
#define CTX_IDREGS_EL3 U(0x10)
#define CTX_PERWORLD_EL3STATE_END U(0x80)
#else
#define CTX_PERWORLD_EL3STATE_END U(0x10)
-#endif /* ENABLE_FEAT_IDTE3 && IMAGE_BL31 */
+#endif /* ENABLE_FEAT_IDTE3 && defined(IMAGE_BL31) */
#ifndef __ASSEMBLER__
@@ -315,7 +315,7 @@ typedef struct cpu_context {
ddc_cap_t ddc_el0;
-#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
+#if (CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31))
el2_sysregs_t el2_sysregs_ctx;
#else
/* El1 context should be included only either for IMAGE_BL1,
@@ -339,7 +339,7 @@ typedef struct cpu_context {
typedef struct per_world_context {
uint64_t ctx_cptr_el3;
uint64_t ctx_mpam3_el3;
-#if (ENABLE_FEAT_IDTE3 && IMAGE_BL31)
+#if (ENABLE_FEAT_IDTE3 && defined(IMAGE_BL31))
perworld_idregs_t idregs;
#endif
} per_world_context_t;
@@ -363,7 +363,7 @@ extern per_world_context_t per_world_context[CPU_CONTEXT_NUM];
/* Macros to access members of the 'cpu_context_t' structure */
#define get_el3state_ctx(h) (&((cpu_context_t *) h)->el3state_ctx)
-#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
+#if (CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31))
#define get_el2_sysregs_ctx(h) (&((cpu_context_t *) h)->el2_sysregs_ctx)
#else
#define get_el1_sysregs_ctx(h) (&((cpu_context_t *) h)->el1_sysregs_ctx)
@@ -434,7 +434,7 @@ void fpregs_context_restore(simd_regs_t *regs);
* |______________________|______________________|____________________________|
* ============================================================================
******************************************************************************/
-#if (IMAGE_BL1 || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS)))
+#if (defined(IMAGE_BL1) || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS)))
static inline void write_ctx_sctlr_el1_reg_errata(cpu_context_t *ctx, u_register_t val)
{
@@ -476,7 +476,7 @@ static inline u_register_t read_ctx_tcr_el1_reg_errata(cpu_context_t *ctx)
#endif /* ERRATA_SPECULATIVE_AT */
}
-#endif /* (IMAGE_BL1 || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS))) */
+#endif /* (defined(IMAGE_BL1) || ((ERRATA_SPECULATIVE_AT) || (!CTX_INCLUDE_EL2_REGS))) */
#endif /* __ASSEMBLER__ */
diff --git a/include/lib/el3_runtime/context_mgmt.h b/include/lib/el3_runtime/context_mgmt.h
index 99bfbbab3..013d60dd2 100644
--- a/include/lib/el3_runtime/context_mgmt.h
+++ b/include/lib/el3_runtime/context_mgmt.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -41,7 +41,7 @@ void cm_init_percpu_once_regs(void);
void cm_sysregs_context_save_amu(unsigned int security_state);
void cm_sysregs_context_restore_amu(unsigned int security_state);
-#if (CTX_INCLUDE_EL2_REGS && IMAGE_BL31)
+#if (CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31))
void cm_el2_sysregs_context_save_gic(uint32_t security_state);
void cm_el2_sysregs_context_restore_gic(uint32_t security_state);
void cm_el2_sysregs_context_save(uint32_t security_state);
@@ -49,7 +49,7 @@ void cm_el2_sysregs_context_restore(uint32_t security_state);
#else
void cm_el1_sysregs_context_save(uint32_t security_state);
void cm_el1_sysregs_context_restore(uint32_t security_state);
-#endif /* (CTX_INCLUDE_EL2_REGS && IMAGE_BL31) */
+#endif /* (CTX_INCLUDE_EL2_REGS && defined(IMAGE_BL31)) */
void cm_set_elr_el3(uint32_t security_state, uintptr_t entrypoint);
void cm_set_elr_spsr_el3(uint32_t security_state,