diff options
Diffstat (limited to 'drivers/phy')
| -rw-r--r-- | drivers/phy/Kconfig | 32 | ||||
| -rw-r--r-- | drivers/phy/cadence/Kconfig | 4 | ||||
| -rw-r--r-- | drivers/phy/cadence/phy-cadence-sierra.c | 4 | ||||
| -rw-r--r-- | drivers/phy/cadence/phy-cadence-torrent.c | 8 | ||||
| -rw-r--r-- | drivers/phy/marvell/comphy_core.c | 4 | ||||
| -rw-r--r-- | drivers/phy/qcom/Kconfig | 18 | ||||
| -rw-r--r-- | drivers/phy/qcom/phy-qcom-qmp-ufs.c | 2 | ||||
| -rw-r--r-- | drivers/phy/renesas/Kconfig | 6 | ||||
| -rw-r--r-- | drivers/phy/rockchip/Kconfig | 2 | ||||
| -rw-r--r-- | drivers/phy/ti-pipe3-phy.c | 23 | ||||
| -rw-r--r-- | drivers/phy/ti/Kconfig | 2 |
11 files changed, 56 insertions, 49 deletions
diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig index 5c8ec2b146f..89d84df96ae 100644 --- a/drivers/phy/Kconfig +++ b/drivers/phy/Kconfig @@ -72,14 +72,14 @@ config AB8500_USB_PHY Support for the USB OTG PHY in ST-Ericsson AB8500. config APPLE_ATCPHY - bool "Apple Type-C PHY Driver" - depends on PHY && ARCH_APPLE - default y - help - Support for the Apple Type-C PHY. + bool "Apple Type-C PHY Driver" + depends on PHY && ARCH_APPLE + default y + help + Support for the Apple Type-C PHY. - This is a dummy driver since the PHY is initialized - sufficiently by previous stage firmware. + This is a dummy driver since the PHY is initialized + sufficiently by previous stage firmware. config BCM6318_USBH_PHY bool "BCM6318 USBH PHY support" @@ -114,7 +114,7 @@ config BCM_SR_PCIE_PHY If unsure, say N. config PHY_DA8XX_USB - tristate "TI DA8xx USB PHY Driver" + bool "TI DA8xx USB PHY Driver" depends on PHY && ARCH_DAVINCI help Enable this to support the USB PHY on DA8xx SoCs. @@ -138,7 +138,7 @@ config SPL_PIPE3_PHY and omap5 config AM654_PHY - tristate "TI AM654 SERDES support" + bool "TI AM654 SERDES support" depends on PHY && ARCH_K3 select REGMAP select SYSCON @@ -155,7 +155,7 @@ config STI_USB_PHY STiH407 SoC families. config PHY_RCAR_GEN2 - tristate "Renesas R-Car Gen2 USB PHY" + bool "Renesas R-Car Gen2 USB PHY" depends on PHY && RCAR_GEN2 help Support for the Renesas R-Car Gen2 USB PHY. This driver operates the @@ -163,7 +163,7 @@ config PHY_RCAR_GEN2 allows configuring the module multiplexing. config PHY_RCAR_GEN3 - tristate "Renesas R-Car Gen3 USB PHY" + bool "Renesas R-Car Gen3 USB PHY" depends on PHY && CLK && DM_REGULATOR && (RCAR_GEN3 || RZG2L) default y if (RCAR_GEN3 || RZG2L) help @@ -171,7 +171,7 @@ config PHY_RCAR_GEN3 PHY connected to EHCI USB module and controls USB OTG operation. config PHY_STM32_USBPHYC - tristate "STMicroelectronics STM32 SoC USB HS PHY driver" + bool "STMicroelectronics STM32 SoC USB HS PHY driver" depends on PHY && ARCH_STM32MP help Enable this to support the High-Speed USB transceiver that is part of @@ -249,14 +249,14 @@ config MT7620_USB_PHY depends on PHY depends on SOC_MT7620 help - Support the intergated USB PHY in MediaTek MT7620 SoC + Support the intergated USB PHY in MediaTek MT7620 SoC config MT76X8_USB_PHY bool "MediaTek MT76x8 (7628/88) USB PHY support" depends on PHY depends on SOC_MT7628 help - Support the USB PHY in MT76x8 SoCs + Support the USB PHY in MT76x8 SoCs This PHY is found on MT76x8 devices supporting USB. @@ -283,7 +283,7 @@ config PHY_MTK_TPHY so you can easily distinguish them by banks layout. config PHY_MTK_UFS - tristate "MediaTek UFS M-PHY driver" + bool "MediaTek UFS M-PHY driver" depends on ARCH_MEDIATEK depends on PHY help @@ -337,7 +337,7 @@ config PHY_IMX8M_PCIE This PHY is found on i.MX8M devices supporting PCIe. config PHY_XILINX_ZYNQMP - tristate "Xilinx ZynqMP PHY driver" + bool "Xilinx ZynqMP PHY driver" depends on PHY && ARCH_ZYNQMP help Enable this to support ZynqMP High Speed Gigabit Transceiver diff --git a/drivers/phy/cadence/Kconfig b/drivers/phy/cadence/Kconfig index 8c0ab80fbbc..f5f096889fe 100644 --- a/drivers/phy/cadence/Kconfig +++ b/drivers/phy/cadence/Kconfig @@ -1,11 +1,11 @@ config PHY_CADENCE_SIERRA - tristate "Cadence Sierra PHY Driver" + bool "Cadence Sierra PHY Driver" depends on DM_RESET help Enable this to support the Cadence Sierra PHY driver config PHY_CADENCE_TORRENT - tristate "Cadence Torrent PHY Driver" + bool "Cadence Torrent PHY Driver" depends on DM_RESET help Enable this to support the Cadence Torrent PHY driver diff --git a/drivers/phy/cadence/phy-cadence-sierra.c b/drivers/phy/cadence/phy-cadence-sierra.c index bd7ab9d1b77..9f8a6d8d43d 100644 --- a/drivers/phy/cadence/phy-cadence-sierra.c +++ b/drivers/phy/cadence/phy-cadence-sierra.c @@ -1068,12 +1068,12 @@ static int cdns_sierra_phy_probe(struct udevice *dev) sp->dev = dev; - sp->base = devfdt_remap_addr_index(dev, 0); + sp->base = dev_remap_addr_index(dev, 0); if (!sp->base) { dev_err(dev, "unable to map regs\n"); return -ENOMEM; } - devfdt_get_addr_size_index(dev, 0, (fdt_size_t *)&sp->size); + dev_read_addr_size_index(dev, 0, (fdt_size_t *)&sp->size); /* Get init data for this PHY */ data = (struct cdns_sierra_data *)dev_get_driver_data(dev); diff --git a/drivers/phy/cadence/phy-cadence-torrent.c b/drivers/phy/cadence/phy-cadence-torrent.c index 933533b2b0b..814aff15070 100644 --- a/drivers/phy/cadence/phy-cadence-torrent.c +++ b/drivers/phy/cadence/phy-cadence-torrent.c @@ -791,10 +791,10 @@ static int cdns_torrent_phy_probe(struct udevice *dev) return ret; } - cdns_phy->sd_base = devfdt_remap_addr_index(dev, 0); - if (IS_ERR(cdns_phy->sd_base)) - return PTR_ERR(cdns_phy->sd_base); - devfdt_get_addr_size_index(dev, 0, (fdt_size_t *)&cdns_phy->size); + cdns_phy->sd_base = dev_remap_addr_index(dev, 0); + if (!cdns_phy->sd_base) + return -EINVAL; + dev_read_addr_size_index(dev, 0, (fdt_size_t *)&cdns_phy->size); dev_for_each_subnode(child, dev) subnodes++; diff --git a/drivers/phy/marvell/comphy_core.c b/drivers/phy/marvell/comphy_core.c index b074d58f9f6..0ab5f9a3f0a 100644 --- a/drivers/phy/marvell/comphy_core.c +++ b/drivers/phy/marvell/comphy_core.c @@ -84,11 +84,11 @@ static int comphy_probe(struct udevice *dev) int res; /* Save base addresses for later use */ - chip_cfg->comphy_base_addr = devfdt_get_addr_index_ptr(dev, 0); + chip_cfg->comphy_base_addr = dev_read_addr_index_ptr(dev, 0); if (!chip_cfg->comphy_base_addr) return -EINVAL; - chip_cfg->hpipe3_base_addr = devfdt_get_addr_index_ptr(dev, 1); + chip_cfg->hpipe3_base_addr = dev_read_addr_index_ptr(dev, 1); if (!chip_cfg->hpipe3_base_addr) return -EINVAL; diff --git a/drivers/phy/qcom/Kconfig b/drivers/phy/qcom/Kconfig index 49f830abf01..1fdadaccb12 100644 --- a/drivers/phy/qcom/Kconfig +++ b/drivers/phy/qcom/Kconfig @@ -2,12 +2,12 @@ config MSM8916_USB_PHY bool select PHY help - Support the Qualcomm MSM8916 USB PHY + Support the Qualcomm MSM8916 USB PHY This PHY is found on qualcomm dragonboard410c development board. config PHY_QCOM_IPQ4019_USB - tristate "Qualcomm IPQ4019 USB PHY driver" + bool "Qualcomm IPQ4019 USB PHY driver" depends on PHY && ARCH_IPQ40XX help Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s. @@ -21,26 +21,26 @@ config PHY_QCOM_QMP_COMBO PHY (USB3 + DisplayPort). Currently only USB3 mode is supported. config PHY_QCOM_QMP_PCIE - tristate "Qualcomm QMP PCIe PHY driver" + bool "Qualcomm QMP PCIe PHY driver" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the PCIe QMP PHY on various Qualcomm chipsets. config PHY_QCOM_QMP_UFS - tristate "Qualcomm QMP UFS PHY driver" + bool "Qualcomm QMP UFS PHY driver" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the UFS QMP PHY on various Qualcomm chipsets. config PHY_QCOM_QUSB2 - tristate "Qualcomm USB QUSB2 PHY driver" + bool "Qualcomm USB QUSB2 PHY driver" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the Super-Speed USB transceiver on various Qualcomm chipsets. config PHY_QCOM_USB_SNPS_FEMTO_V2 - tristate "Qualcomm SNPS FEMTO USB HS PHY v2" + bool "Qualcomm SNPS FEMTO USB HS PHY v2" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the Qualcomm Synopsys DesignWare Core 7nm @@ -48,7 +48,7 @@ config PHY_QCOM_USB_SNPS_FEMTO_V2 is usually paired with Synopsys DWC3 USB IPs on MSM SOCs. config PHY_QCOM_SNPS_EUSB2 - tristate "Qualcomm Synopsys eUSB2 High-Speed PHY" + bool "Qualcomm Synopsys eUSB2 High-Speed PHY" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the Qualcomm Synopsys DesignWare eUSB2 @@ -56,7 +56,7 @@ config PHY_QCOM_SNPS_EUSB2 is usually paired with Synopsys DWC3 USB IPs on MSM SOCs. config PHY_QCOM_USB_HS_28NM - tristate "Qualcomm 28nm High-Speed PHY" + bool "Qualcomm 28nm High-Speed PHY" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the Qualcomm Synopsys DesignWare Core 28nm @@ -65,7 +65,7 @@ config PHY_QCOM_USB_HS_28NM IPs on MSM SOCs. config PHY_QCOM_USB_SS - tristate "Qualcomm USB Super-Speed PHY driver" + bool "Qualcomm USB Super-Speed PHY driver" depends on PHY && ARCH_SNAPDRAGON help Enable this to support the Super-Speed USB transceiver on various diff --git a/drivers/phy/qcom/phy-qcom-qmp-ufs.c b/drivers/phy/qcom/phy-qcom-qmp-ufs.c index 80eba734a63..3df88189a90 100644 --- a/drivers/phy/qcom/phy-qcom-qmp-ufs.c +++ b/drivers/phy/qcom/phy-qcom-qmp-ufs.c @@ -1741,6 +1741,8 @@ static const struct udevice_id qmp_ufs_ids[] = { { .compatible = "qcom,milos-qmp-ufs-phy", .data = (ulong)&milos_ufsphy_cfg, }, { .compatible = "qcom,sa8775p-qmp-ufs-phy", .data = (ulong)&sa8775p_ufsphy_cfg, }, { .compatible = "qcom,sdm845-qmp-ufs-phy", .data = (ulong)&sdm845_ufsphy_cfg }, + { .compatible = "qcom,sm6115-qmp-ufs-phy", .data = (ulong)&sm6115_ufsphy_cfg, }, + { .compatible = "qcom,sm6125-qmp-ufs-phy", .data = (ulong)&sm6115_ufsphy_cfg, }, { .compatible = "qcom,sm6350-qmp-ufs-phy", .data = (ulong)&sdm845_ufsphy_cfg }, { .compatible = "qcom,sm7150-qmp-ufs-phy", .data = (ulong)&sm7150_ufsphy_cfg }, { .compatible = "qcom,sm8150-qmp-ufs-phy", .data = (ulong)&sm8150_ufsphy_cfg }, diff --git a/drivers/phy/renesas/Kconfig b/drivers/phy/renesas/Kconfig index affbee0500c..3358d454e59 100644 --- a/drivers/phy/renesas/Kconfig +++ b/drivers/phy/renesas/Kconfig @@ -3,19 +3,19 @@ # Phy drivers for Renesas platforms config PHY_R8A779F0_ETHERNET_SERDES - tristate "Renesas R-Car S4-8 Ethernet SERDES driver" + bool "Renesas R-Car S4-8 Ethernet SERDES driver" depends on RCAR_64 && PHY help Support for Ethernet SERDES found on Renesas R-Car S4-8 SoCs. config PHY_R8A78000_ETHERNET_PCS - tristate "Renesas R-Car X5H Ethernet PCS driver" + bool "Renesas R-Car X5H Ethernet PCS driver" depends on RCAR_64 && PHY help Support for Ethernet PCS found on Renesas R-Car X5H SoCs. config PHY_R8A78000_MP_PHY - tristate "Renesas R-Car X5H Multi-Protocol PHY driver" + bool "Renesas R-Car X5H Multi-Protocol PHY driver" depends on RCAR_64 && PHY help Support for Multi-Protocol PHY on Renesas R-Car X5H SoCs. diff --git a/drivers/phy/rockchip/Kconfig b/drivers/phy/rockchip/Kconfig index 80128335d52..6f3d7ebe29e 100644 --- a/drivers/phy/rockchip/Kconfig +++ b/drivers/phy/rockchip/Kconfig @@ -49,7 +49,7 @@ config PHY_ROCKCHIP_SNPS_PCIE3 also be able splited into multiple combinations of lanes. config PHY_ROCKCHIP_USBDP - tristate "Rockchip USBDP COMBO PHY Driver" + bool "Rockchip USBDP COMBO PHY Driver" depends on ARCH_ROCKCHIP select PHY help diff --git a/drivers/phy/ti-pipe3-phy.c b/drivers/phy/ti-pipe3-phy.c index 62f6cc2bfbf..080016ba417 100644 --- a/drivers/phy/ti-pipe3-phy.c +++ b/drivers/phy/ti-pipe3-phy.c @@ -6,6 +6,7 @@ #include <dm.h> #include <dm/device.h> +#include <dm/device_compat.h> #include <generic-phy.h> #include <asm/global_data.h> #include <asm/io.h> @@ -428,10 +429,10 @@ static int pipe3_exit(struct phy *phy) static void *get_reg(struct udevice *dev, const char *name) { + struct ofnode_phandle_args phandle; struct udevice *syscon; struct regmap *regmap; - const fdt32_t *cell; - int len, err; + int err; void *base; err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, @@ -449,10 +450,14 @@ static void *get_reg(struct udevice *dev, const char *name) return NULL; } - cell = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), name, - &len); - if (len < 2*sizeof(fdt32_t)) { - pr_err("offset not available for %s\n", name); + err = dev_read_phandle_with_args(dev, name, NULL, 0, 0, &phandle); + if (err) { + dev_err(dev, "parse %s failed: %d\n", name, err); + return NULL; + } + + if (phandle.args_count < 1) { + dev_err(dev, "%s: missing args\n", name); return NULL; } @@ -460,7 +465,7 @@ static void *get_reg(struct udevice *dev, const char *name) if (!base) return NULL; - return fdtdec_get_number(cell + 1, 1) + base; + return base + phandle.args[0]; } static int pipe3_phy_probe(struct udevice *dev) @@ -471,7 +476,7 @@ static int pipe3_phy_probe(struct udevice *dev) struct pipe3_data *data; /* PHY_RX */ - addr = devfdt_get_addr_size_index(dev, 0, &sz); + addr = dev_read_addr_size_index(dev, 0, &sz); if (addr == FDT_ADDR_T_NONE) { pr_err("missing phy_rx address\n"); return -EINVAL; @@ -484,7 +489,7 @@ static int pipe3_phy_probe(struct udevice *dev) } /* PLLCTRL */ - addr = devfdt_get_addr_size_index(dev, 2, &sz); + addr = dev_read_addr_size_index(dev, 2, &sz); if (addr == FDT_ADDR_T_NONE) { pr_err("missing pll ctrl address\n"); return -EINVAL; diff --git a/drivers/phy/ti/Kconfig b/drivers/phy/ti/Kconfig index df750b26d66..fe96eb6806f 100644 --- a/drivers/phy/ti/Kconfig +++ b/drivers/phy/ti/Kconfig @@ -1,5 +1,5 @@ config PHY_J721E_WIZ - tristate "TI J721E WIZ (SERDES Wrapper) support" + bool "TI J721E WIZ (SERDES Wrapper) support" depends on ARCH_K3 help This option enables support for WIZ module present in TI's J721E |