diff options
| author | Ahmed S. Darwish <darwi@linutronix.de> | 2026-05-28 17:37:33 +0200 |
|---|---|---|
| committer | Borislav Petkov (AMD) <bp@alien8.de> | 2026-07-31 14:52:55 -0700 |
| commit | 173dfdce3ba8b7d54d2476f76f723438dbaff391 (patch) | |
| tree | fa6d3d7161860397a4319826642acc1ae0329e37 | |
| parent | 21834b541d933d52a3359ba368645f375f8c9ad1 (diff) | |
| download | linux-next-173dfdce3ba8b7d54d2476f76f723438dbaff391.tar.gz linux-next-173dfdce3ba8b7d54d2476f76f723438dbaff391.zip | |
x86/cpu: Use parsed CPUID(0x1)
On early boot CPU detection, use parsed CPUID(0x1) instead of a direct CPUID
query.
Beside the parser's centralization benefits, use the auto generated CPUID data
types, and their C99 bitfields, instead of doing ugly bitwise operations.
[ bp: - Use a common code pattern for l1 of fetching and checking it
right after that
- flip the check to save an indentation level
- align assignments vertically.
]
Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://patch.msgid.link/20260528153923.403473-12-darwi@linutronix.de
| -rw-r--r-- | arch/x86/kernel/cpu/common.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index e658f76a1b0f..695319fdc95f 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -943,6 +943,7 @@ void get_cpu_vendor(struct cpuinfo_x86 *c) void cpu_detect(struct cpuinfo_x86 *c) { const struct leaf_0x0_0 *l0 = cpuid_leaf(c, 0x0); + const struct leaf_0x1_0 *l1; c->cpuid_level = l0->max_std_leaf; *(u32 *)&c->x86_vendor_id[0] = l0->cpu_vendorid_0; @@ -950,19 +951,18 @@ void cpu_detect(struct cpuinfo_x86 *c) *(u32 *)&c->x86_vendor_id[8] = l0->cpu_vendorid_2; c->x86 = 4; - /* Intel-defined flags: level 0x00000001 */ - if (c->cpuid_level >= 0x00000001) { - u32 junk, tfms, cap0, misc; - cpuid(0x00000001, &tfms, &misc, &junk, &cap0); - c->x86 = x86_family(tfms); - c->x86_model = x86_model(tfms); - c->x86_stepping = x86_stepping(tfms); + l1 = cpuid_leaf(c, 0x1); + if (!l1) + return; - if (cap0 & (1<<19)) { - c->x86_clflush_size = ((misc >> 8) & 0xff) * 8; - c->x86_cache_alignment = c->x86_clflush_size; - } + c->x86 = cpuid_family(l1); + c->x86_model = cpuid_model(l1); + c->x86_stepping = l1->stepping; + + if (l1->clflush) { + c->x86_clflush_size = l1->clflush_size * 8; + c->x86_cache_alignment = c->x86_clflush_size; } } |
