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authorChristian Marangi <ansuelsmth@gmail.com>2026-07-08 10:40:44 +0200
committerBrian Masney <bmasney@redhat.com>2026-07-28 11:25:29 -0400
commit584dfca970a256fb4af0121017862a9259cc019e (patch)
treed2a2224023d6693bda58ceb53a8d1e77d7036db4
parent23454c4635b9f01af303118cbffd8cb3b3b57b6b (diff)
downloadlinux-next-584dfca970a256fb4af0121017862a9259cc019e.tar.gz
linux-next-584dfca970a256fb4af0121017862a9259cc019e.zip
clk: en7523: reset PCIE HB on init for AN7581
It was reported that PCIE HB should be reset for AN7581 or some instability or link training issue will be present on warm boot scenario. Reset PCIE HB on clk HW init to handle warm boot problem with PCIe. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
-rw-r--r--drivers/clk/clk-en7523.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/clk-en7523.c b/drivers/clk/clk-en7523.c
index 1ab0e2eca5d3..c450d89bfa96 100644
--- a/drivers/clk/clk-en7523.c
+++ b/drivers/clk/clk-en7523.c
@@ -57,6 +57,7 @@
#define REG_RST_CTRL2 0x830
#define REG_RST_CTRL1 0x834
+#define REG_PCIE_HB_RST BIT(29)
#define EN751221_REG_RST_DMT 0x84
#define EN751221_REG_RST_USB 0xec
@@ -853,6 +854,12 @@ static int en7581_clk_hw_init(struct platform_device *pdev,
val = readl(base + REG_NP_SCU_PCIC);
writel(val | 3, base + REG_NP_SCU_PCIC);
+ val = readl(base + REG_RST_CTRL1);
+ val |= REG_PCIE_HB_RST;
+ writel(val, base + REG_RST_CTRL1);
+ val &= ~REG_PCIE_HB_RST;
+ writel(val, base + REG_RST_CTRL1);
+
return en7581_reset_register(&pdev->dev, base, en7581_rst_map,
ARRAY_SIZE(en7581_rst_map),
en7581_rst_ofs);