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authorAnkit Nautiyal <ankit.k.nautiyal@intel.com>2026-09-15 22:16:51 +0530
committerAnkit Nautiyal <ankit.k.nautiyal@intel.com>2026-09-18 08:19:16 +0530
commit589a07df22d6e150571eea49b606fde120545846 (patch)
tree553092b47b28f3285ead5c7cf1a2088ad86e2b1e
parent8aeed61a7d64c2e6bf1337848bc4960fadf9dfd1 (diff)
downloadlinux-next-589a07df22d6e150571eea49b606fde120545846.tar.gz
linux-next-589a07df22d6e150571eea49b606fde120545846.zip
drm/i915/dp: Introduce helpers to enable/disable CMN SDP Transmission line
Introduce helpers to program or disable CMN_SDP_TL and stagger registers using the state stored in crtc_state. v2: - Use HAS_COMMON_SDP_TL(display) instead of checking crtc_state->dip.cmn_sdp_tl, since 0 is a valid transmission line value. (Sashiko) Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260915164657.3429075-11-ankit.k.nautiyal@intel.com
-rw-r--r--drivers/gpu/drm/i915/display/intel_dip.c56
-rw-r--r--drivers/gpu/drm/i915/display/intel_dip.h2
2 files changed, 58 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dip.c b/drivers/gpu/drm/i915/display/intel_dip.c
index d1acc7eb5a39..f8e8577b2755 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.c
+++ b/drivers/gpu/drm/i915/display/intel_dip.c
@@ -4,6 +4,8 @@
*
*/
+#include <drm/drm_print.h>
+
#include "intel_de.h"
#include "intel_dip.h"
#include "intel_dip_regs.h"
@@ -61,3 +63,57 @@ void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_st
{
crtc_state->dip.emp_as_sdp_tl = intel_dip_read_emp_as_sdp_tl(crtc_state);
}
+
+static int intel_dip_sdp_tl_to_stagger(const struct intel_crtc_state *crtc_state,
+ u16 sdp_transmission_line)
+{
+ return sdp_transmission_line - crtc_state->dip.cmn_sdp_tl;
+}
+
+void intel_dip_cmn_sdp_transmission_line_enable(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_display *display = to_intel_display(crtc_state);
+ enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
+ int gmp_stagger;
+ int pps_stagger;
+ int vsc_ext_stagger;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ gmp_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.gmp_sdp_tl);
+
+ pps_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.pps_sdp_tl);
+
+ vsc_ext_stagger = intel_dip_sdp_tl_to_stagger(crtc_state,
+ crtc_state->dip.vsc_ext_sdp_tl);
+
+ if (drm_WARN_ON(display->drm, gmp_stagger < 0))
+ return;
+ if (drm_WARN_ON(display->drm, pps_stagger < 0))
+ return;
+ if (drm_WARN_ON(display->drm, vsc_ext_stagger < 0))
+ return;
+
+ intel_de_write(display, CMN_SDP_TL_STGR_CTL(display, cpu_transcoder),
+ GMP_STAGGER(gmp_stagger) |
+ PPS_STAGGER(pps_stagger) |
+ VSC_EXT_STAGGER(vsc_ext_stagger));
+
+ intel_de_write(display, CMN_SDP_TL(display, cpu_transcoder),
+ TRANSMISSION_LINE_ENABLE |
+ BASE_TRANSMISSION_LINE(crtc_state->dip.cmn_sdp_tl));
+}
+
+void intel_dip_cmn_sdp_transmission_line_disable(const struct intel_crtc_state *old_crtc_state)
+{
+ struct intel_display *display = to_intel_display(old_crtc_state);
+ enum transcoder cpu_transcoder = old_crtc_state->cpu_transcoder;
+
+ if (!HAS_COMMON_SDP_TL(display))
+ return;
+
+ intel_de_write(display, CMN_SDP_TL(display, cpu_transcoder), 0);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_dip.h b/drivers/gpu/drm/i915/display/intel_dip.h
index 8ff22eb5663b..7c64c84cb1be 100644
--- a/drivers/gpu/drm/i915/display/intel_dip.h
+++ b/drivers/gpu/drm/i915/display/intel_dip.h
@@ -47,5 +47,7 @@ void intel_dip_write_emp_as_sdp_tl(const struct intel_crtc_state *crtc_state);
void intel_dip_sdp_tl_compute_config_late(struct intel_crtc_state *crtc_state);
void intel_dip_sdp_transmission_line_get_config(struct intel_crtc_state *crtc_state);
+void intel_dip_cmn_sdp_transmission_line_enable(const struct intel_crtc_state *crtc_state);
+void intel_dip_cmn_sdp_transmission_line_disable(const struct intel_crtc_state *old_crtc_state);
#endif /* __INTEL_DIP_H__ */