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| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2026-07-16 12:10:30 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-09-02 14:36:02 +0200 |
| commit | 64ec1a4d2fb5ca997c8dc6cd79779b08a3fffa82 (patch) | |
| tree | 4f6a84dcd05b32b65d69f7fa2676f5d0d0579906 | |
| parent | 6f71104288c78c091070c6367b705c68e4faa118 (diff) | |
| download | linux-next-64ec1a4d2fb5ca997c8dc6cd79779b08a3fffa82.tar.gz linux-next-64ec1a4d2fb5ca997c8dc6cd79779b08a3fffa82.zip | |
ARM: dts: renesas: r9a06g032: Don't set status to the default value
"okay" is the default for 'status', so don't encode it explicitly.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260716101030.15252-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm/boot/dts/renesas/r9a06g032.dtsi | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/renesas/r9a06g032.dtsi index 19c9bce0a26d..8645bab7ee23 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -145,7 +145,6 @@ sysctrl: system-controller@4000c000 { compatible = "renesas,r9a06g032-sysctrl"; reg = <0x4000c000 0x1000>; - status = "okay"; #clock-cells = <1>; #power-domain-cells = <0>; @@ -352,7 +351,6 @@ reg = <0x40067000 0x1000>, <0x51000000 0x480>; clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>; clock-names = "bus"; - status = "okay"; }; sdio1: mmc@40100000 { |