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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-09-04 20:13:02 +0200 |
|---|---|---|
| committer | Michael Walle <mwalle@kernel.org> | 2026-09-07 09:45:22 +0200 |
| commit | 700bf34058ca7cd792236b1ba5caad3770d66208 (patch) | |
| tree | 23e618018d30a8d22a9c2c36b589f2e1913b8a70 | |
| parent | 4094a2fd562453cac04e909688af6620fbd3203f (diff) | |
| download | linux-next-700bf34058ca7cd792236b1ba5caad3770d66208.tar.gz linux-next-700bf34058ca7cd792236b1ba5caad3770d66208.zip | |
mtd: spi-nor: debugfs: Expose SR opcodes and QE mask
Expose Status Register opcodes based on the flash capabilities
discovered while parsing the SFDP QER field.
Value '0' indicates an absence of opcode (non supported), we do not
print anything in that case.
The QE bit is also displayed.
Example on a W25Q02JV-M:
$ grep opcodes -A10 /sys/kernel/debug/spi-nor/spi0.0/params
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
SR1 read 0x05
SR2 read 0x35
SR1+SR2 write 0x01
QE SR2 bit 1
8D extension none
Tested-by: Takahiro Kuwano <takahiro.kuwano@infineon.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Michael Walle <mwalle@kernel.org>
| -rw-r--r-- | drivers/mtd/spi-nor/debugfs.c | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/drivers/mtd/spi-nor/debugfs.c b/drivers/mtd/spi-nor/debugfs.c index 5c738786145f..3f8d586a7622 100644 --- a/drivers/mtd/spi-nor/debugfs.c +++ b/drivers/mtd/spi-nor/debugfs.c @@ -104,6 +104,21 @@ static int spi_nor_params_show(struct seq_file *s, void *data) seq_printf(s, " dummy cycles\t%u\n", nor->read_dummy); seq_printf(s, " erase\t\t0x%02x\n", nor->erase_opcode); seq_printf(s, " program\t0x%02x\n", nor->program_opcode); + seq_printf(s, " SR1 read\t0x%02x\n", params->opcodes.read_sr1); + if (params->opcodes.read_sr2) + seq_printf(s, " SR2 read\t0x%02x\n", params->opcodes.read_sr2); + if (params->opcodes.write_sr1) + seq_printf(s, " SR1 write\t0x%02x\n", params->opcodes.write_sr1); + if (params->opcodes.write_sr2) + seq_printf(s, " SR2 write\t0x%02x\n", params->opcodes.write_sr2); + if (params->opcodes.write_sr1_and_sr2) + seq_printf(s, " SR1+SR2 write\t0x%02x\n", + params->opcodes.write_sr1_and_sr2); + + if (params->qe_mask[0] || params->qe_mask[1]) + seq_printf(s, " QE\t\tSR%d bit %d\n", + params->qe_mask[0] ? 1 : 2, + ffs(params->qe_mask[0] | params->qe_mask[1]) - 1); switch (params->cmd_ext_type) { case SPI_NOR_EXT_NONE: |