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| author | Clément Le Goffic <clement.legoffic@foss.st.com> | 2026-07-22 11:16:11 +0200 |
|---|---|---|
| committer | Alexandre Torgue <alexandre.torgue@foss.st.com> | 2026-08-10 10:55:46 +0200 |
| commit | 759d2d79a5ca4b7146c658f6375d6c4fa2f7e050 (patch) | |
| tree | d9479ee457ae673c469c694a54744b3cc8d625b7 | |
| parent | 395890b455d2e1cf698358c73741707bcdb7ac1d (diff) | |
| download | linux-next-759d2d79a5ca4b7146c658f6375d6c4fa2f7e050.tar.gz linux-next-759d2d79a5ca4b7146c658f6375d6c4fa2f7e050.zip | |
ARM: dts: stm32: add sram[123] nodes on stm32mp131
Add SRAM nodes with "mmio-sram" compatible in STM32MP131 SoC device
tree.
Those nodes describe the SRAM memory area (SRAM1 16kB, SRAM2 8kB, SRAM3
8kB).
Signed-off-by: Clément Le Goffic <clement.legoffic@foss.st.com>
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Link: https://lore.kernel.org/r/20260722-spi_arm_stm32_dt-v1-1-6ef611523232@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
| -rw-r--r-- | arch/arm/boot/dts/st/stm32mp131.dtsi | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/st/stm32mp131.dtsi b/arch/arm/boot/dts/st/stm32mp131.dtsi index 83ae59b73dd0..5ae33b26e313 100644 --- a/arch/arm/boot/dts/st/stm32mp131.dtsi +++ b/arch/arm/boot/dts/st/stm32mp131.dtsi @@ -139,6 +139,30 @@ interrupt-parent = <&intc>; ranges; + sram1: sram@30000000 { + compatible = "mmio-sram"; + reg = <0x30000000 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30000000 0x4000>; + }; + + sram2: sram@30004000 { + compatible = "mmio-sram"; + reg = <0x30004000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30004000 0x2000>; + }; + + sram3: sram@30006000 { + compatible = "mmio-sram"; + reg = <0x30006000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x30006000 0x2000>; + }; + timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>; |