diff options
| author | Karthik Poosa <karthik.poosa@intel.com> | 2026-09-07 14:05:19 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2026-09-10 17:59:59 -0400 |
| commit | 8721a51d44733b8b5cb41fa1bfe7fac2cf55107b (patch) | |
| tree | 94091b88341bca02534e52aa02513348e90eb559 | |
| parent | 628f92b28bf4c371c10207daf6fc4caee0c0db2e (diff) | |
| download | linux-next-8721a51d44733b8b5cb41fa1bfe7fac2cf55107b.tar.gz linux-next-8721a51d44733b8b5cb41fa1bfe7fac2cf55107b.zip | |
drm/xe/pcode: Increase default pcode mailbox timeout to 10ms
The previous 1ms timeout may be insufficient for some mailbox commands,
leading to spurious -ETIMEDOUT failures under load. Increase the default
timeout to 10ms and introduce PCODE_DEFAULT_TIMEOUT_MS for a shared
timeout definition, in line with pcode mailbox specification guidance.
Signed-off-by: Karthik Poosa <karthik.poosa@intel.com>
Link: https://patch.msgid.link/20260907083520.192418-2-karthik.poosa@intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pcode.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_pcode.h | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/drivers/gpu/drm/xe/xe_pcode.c b/drivers/gpu/drm/xe/xe_pcode.c index d502205bb72a..266deecbb100 100644 --- a/drivers/gpu/drm/xe/xe_pcode.c +++ b/drivers/gpu/drm/xe/xe_pcode.c @@ -140,7 +140,7 @@ int xe_pcode_read(struct xe_tile *tile, u32 mbox, u32 *val0, u32 *val1) int err; mutex_lock(&tile->pcode.lock); - err = pcode_mailbox_rw(tile, mbox, val0, val1, 1, true, false); + err = pcode_mailbox_rw(tile, mbox, val0, val1, PCODE_DEFAULT_TIMEOUT_MS, true, false); mutex_unlock(&tile->pcode.lock); return err; diff --git a/drivers/gpu/drm/xe/xe_pcode.h b/drivers/gpu/drm/xe/xe_pcode.h index ba8a1d1b2152..7e43792b0037 100644 --- a/drivers/gpu/drm/xe/xe_pcode.h +++ b/drivers/gpu/drm/xe/xe_pcode.h @@ -18,6 +18,8 @@ struct xe_pcode_version { u32 engg; }; +#define PCODE_DEFAULT_TIMEOUT_MS 10 + int xe_pcode_init_early(struct xe_tile *tile); int xe_pcode_probe_early(struct xe_device *xe); int xe_pcode_ready(struct xe_device *xe, bool locked); @@ -31,7 +33,7 @@ int xe_pcode_write64_timeout(struct xe_tile *tile, u32 mbox, u32 data0, int xe_get_pcode_version(struct xe_device *xe, struct xe_pcode_version *version); #define xe_pcode_write(tile, mbox, val) \ - xe_pcode_write_timeout(tile, mbox, val, 1) + xe_pcode_write_timeout(tile, mbox, val, PCODE_DEFAULT_TIMEOUT_MS) int xe_pcode_request(struct xe_tile *tile, u32 mbox, u32 request, u32 reply_mask, u32 reply, int timeout_ms); |