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| author | Jia Wang <wangjia@ultrarisc.com> | 2026-09-07 15:46:53 +0800 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2026-09-10 10:38:02 +0200 |
| commit | 8dbfb46c233abe2a3482cca0ff58ade39a95f8c6 (patch) | |
| tree | 8c8f4311b84f0911e90a6972f7c2ff810370ca8d | |
| parent | 345d78e3098044b792d7d130c7f5e72ca86f5491 (diff) | |
| download | linux-next-8dbfb46c233abe2a3482cca0ff58ade39a95f8c6.tar.gz linux-next-8dbfb46c233abe2a3482cca0ff58ade39a95f8c6.zip | |
dt-bindings: net: Add UltraRISC DP1000 GMAC
The DP1000 integrates a Synopsys DesignWare GMAC from the 5.20 series with
one MMIO register range, one clock and one interrupt.
It also provides fixed TX and RX RGMII clock delays that cannot be
disabled. Board connections must therefore not add either delay in PCB
traces, making "rgmii-id" the only supported phy-mode.
Signed-off-by: Jia Wang <wangjia@ultrarisc.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260907-dwmac-ultrarisc-v2-4-9a39bf8db313@ultrarisc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
| -rw-r--r-- | Documentation/devicetree/bindings/net/snps,dwmac.yaml | 1 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml | 74 | ||||
| -rw-r--r-- | MAINTAINERS | 5 |
3 files changed, 80 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 2449311c6d28..2ed4564ae99d 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -119,6 +119,7 @@ properties: - starfive,jh7110-dwmac - tesla,fsd-ethqos - thead,th1520-gmac + - ultrarisc,dp1000-gmac reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml new file mode 100644 index 000000000000..13029302877b --- /dev/null +++ b/Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/ultrarisc,dp1000-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: UltraRISC DP1000 DWMAC Ethernet controller + +maintainers: + - Jia Wang <wangjia@ultrarisc.com> + +description: + The DP1000 integrates a Synopsys DesignWare GMAC controller from the + 5.20 series. The SoC integration adds fixed RGMII TX and RX clock delays + which cannot be disabled. Consequently, a functional RGMII link requires + a PCB without TX or RX clock delays, represented by "rgmii-id". + +select: + properties: + compatible: + contains: + const: ultrarisc,dp1000-gmac + required: + - compatible + +properties: + compatible: + items: + - const: ultrarisc,dp1000-gmac + - const: snps,dwmac-5.20 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: stmmaceth + + interrupts: + maxItems: 1 + + interrupt-names: + const: macirq + + phy-mode: + const: rgmii-id + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phy-mode + +allOf: + - $ref: snps,dwmac.yaml# + +unevaluatedProperties: false + +examples: + - | + ethernet@38000000 { + compatible = "ultrarisc,dp1000-gmac", "snps,dwmac-5.20"; + reg = <0x38000000 0x1000000>; + clocks = <&clk 0>; + clock-names = "stmmaceth"; + interrupts = <84>; + interrupt-names = "macirq"; + phy-mode = "rgmii-id"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b000853829b5..17679f5c911d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -27997,6 +27997,11 @@ F: Documentation/devicetree/bindings/clock/ultrarisc,dp1000-clk.yaml F: drivers/clk/ultrarisc/* F: include/dt-bindings/clock/ultrarisc,dp1000-clk.h +ULTRARISC DP1000 DWMAC GLUE LAYER +M: Jia Wang <wangjia@ultrarisc.com> +S: Maintained +F: Documentation/devicetree/bindings/net/ultrarisc,dp1000-gmac.yaml + ULTRARISC DP1000 PINCTRL DRIVER M: Jia Wang <wangjia@ultrarisc.com> L: linux-gpio@vger.kernel.org |