diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-08-26 16:40:20 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2026-08-27 13:52:37 +0300 |
| commit | bed6347ae41b03bb80786b623c648cf221d7ed43 (patch) | |
| tree | 4595a498c6300413e80b5c53c4b2edc52d012482 | |
| parent | dcf423710d0253d7d729c3992bbae0c6197c9c22 (diff) | |
| download | linux-next-bed6347ae41b03bb80786b623c648cf221d7ed43.tar.gz linux-next-bed6347ae41b03bb80786b623c648cf221d7ed43.zip | |
drm/i915/cdclk: Don't bail if pcode post nofify fails
We already changed the actual cdclk frequency by the time we do
the pcode post notify. So skipping the subsequent readout is plain
wrong.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patch.msgid.link/20260826134033.13976-2-ville.syrjala@linux.intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cdclk.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 279006f7b881..0c2d80edc5ab 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -2328,12 +2328,10 @@ static void bxt_set_cdclk(struct intel_display *display, HSW_PCODE_DE_WRITE_FREQ_REQ, cdclk_config->voltage_level, 2); } - if (ret) { + if (ret) drm_err(display->drm, "PCode CDCLK freq set failed, (err %d, freq %d)\n", ret, cdclk); - return; - } intel_update_cdclk(display); |