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| author | Quentin Schulz <quentin.schulz@cherry.de> | 2026-06-26 16:40:38 +0200 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2026-07-24 21:30:27 +0200 |
| commit | dfe078755706ed50651ebbe0442843ecd4ae8389 (patch) | |
| tree | 7767f0cd399c8fc969f951486d261093349040c9 | |
| parent | 70f46aa2007e2a6d27e68d37d498ff893e9bc255 (diff) | |
| download | linux-next-dfe078755706ed50651ebbe0442843ecd4ae8389.tar.gz linux-next-dfe078755706ed50651ebbe0442843ecd4ae8389.zip | |
arm64: dts: rockchip: fix eMMC reset polarity on PX30 Ringneck
According to the Jedec 5.1 specification, the device is held in reset
when RST_n is low, therefore the polarity of the line must be that, as
specified in the Device Tree binding (mmc/mmc-pwrseq-emmc.yaml).
Due to the wrong polarity, eMMC devices with RST_n_FUNCTION[162]
bitfield [1:0] set to 0x1 (the default is 0x0) will be held in reset
forever.
Cc: stable@vger.kernel.org
Fixes: c484cf93f61b ("arm64: dts: rockchip: add PX30-µQ7 (Ringneck) SoM with Haikou baseboard")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Link: https://patch.msgid.link/20260626-ringneck-emmc-polarity-v1-1-90cefe57b316@cherry.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index 973b4c5880e2..29794216592d 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -26,7 +26,7 @@ compatible = "mmc-pwrseq-emmc"; pinctrl-0 = <&emmc_reset>; pinctrl-names = "default"; - reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; }; leds { |