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| author | Christophe Leroy (CS GROUP) <chleroy@kernel.org> | 2026-07-07 16:58:14 +0200 |
|---|---|---|
| committer | Christophe Leroy (CS GROUP) <chleroy@kernel.org> | 2026-07-09 18:31:08 +0200 |
| commit | 3300a285c28529ca1a178f01b4cc046fd3547dbd (patch) | |
| tree | 8c5757f6e58e1fe81b80f3dc74351ae6bbe901a4 /drivers | |
| parent | dc59e4fea9d83f03bad6bddf3fa2e52491777482 (diff) | |
| download | linux-next-3300a285c28529ca1a178f01b4cc046fd3547dbd.tar.gz linux-next-3300a285c28529ca1a178f01b4cc046fd3547dbd.zip | |
soc: fsl: qe_ports_ic: Use generic I/O helper instead of specific powerPC ones
Use ioread32be() and iowrite32be() instead of in_be32() and out_be32()
to allow build on other platforms than powerPC.
Link: https://lore.kernel.org/r/b08f76c1d8ff864774246f1e2c2158c223c001be.1783435914.git.chleroy@kernel.org
Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/soc/fsl/qe/qe_ports_ic.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/drivers/soc/fsl/qe/qe_ports_ic.c b/drivers/soc/fsl/qe/qe_ports_ic.c index 9b0bba64e91e..33ca1ddafe18 100644 --- a/drivers/soc/fsl/qe/qe_ports_ic.c +++ b/drivers/soc/fsl/qe/qe_ports_ic.c @@ -23,36 +23,39 @@ struct qepic_data { static void qepic_mask(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); + u32 val = ioread32be(data->reg + CEPIMR); - clrbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(val & ~(1 << (31 - irqd_to_hwirq(d))), data->reg + CEPIMR); } static void qepic_unmask(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); + u32 val = ioread32be(data->reg + CEPIMR); - setbits32(data->reg + CEPIMR, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(val | 1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIMR); } static void qepic_end(struct irq_data *d) { struct qepic_data *data = irq_data_get_irq_chip_data(d); - out_be32(data->reg + CEPIER, 1 << (31 - irqd_to_hwirq(d))); + iowrite32be(1 << (31 - irqd_to_hwirq(d)), data->reg + CEPIER); } static int qepic_set_type(struct irq_data *d, unsigned int flow_type) { struct qepic_data *data = irq_data_get_irq_chip_data(d); unsigned int vec = (unsigned int)irqd_to_hwirq(d); + u32 val = ioread32be(data->reg + CEPICR); switch (flow_type & IRQ_TYPE_SENSE_MASK) { case IRQ_TYPE_EDGE_FALLING: - setbits32(data->reg + CEPICR, 1 << (31 - vec)); + iowrite32be(val | 1 << (31 - vec), data->reg + CEPICR); return 0; case IRQ_TYPE_EDGE_BOTH: case IRQ_TYPE_NONE: - clrbits32(data->reg + CEPICR, 1 << (31 - vec)); + iowrite32be(val & ~(1 << (31 - vec)), data->reg + CEPICR); return 0; } return -EINVAL; @@ -69,7 +72,7 @@ static struct irq_chip qepic = { static int qepic_get_irq(struct irq_desc *desc) { struct qepic_data *data = irq_desc_get_handler_data(desc); - u32 event = in_be32(data->reg + CEPIER); + u32 event = ioread32be(data->reg + CEPIER); if (!event) return -1; |