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authorPhilip Yang <Philip.Yang@amd.com>2026-03-25 13:37:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2026-09-02 15:24:44 -0400
commiteb4ab3b6980bd2ade22e72e37c208f058ecb46ee (patch)
tree4f20f4aab34bc8ad3708f818be0f63b20217fb7f /drivers
parentee9323733acb9a660f2f9065f8c31fdb015c4acb (diff)
downloadlinux-next-eb4ab3b6980bd2ade22e72e37c208f058ecb46ee.tar.gz
linux-next-eb4ab3b6980bd2ade22e72e37c208f058ecb46ee.zip
drm/amdgpu: Add UALink SDMA scheduler entities
Allocate one GPU scheduler entity per SDMA instance for remote command dispatch. Commands to the same peer are serialized through one entity; different peers can be targeted concurrently by different SDMA engines. Signed-off-by: Philip Yang <Philip.Yang@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c53
1 files changed, 53 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c
index 51e0e2336d05..2cb805dd6cbf 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ualink.c
@@ -2007,3 +2007,56 @@ out:
return r;
}
+/**
+ * amdgpu_ualink_sdma_entities_init - Initialize SDMA job scheduler entities
+ * @adev: amdgpu device pointer
+ *
+ * Sets up SDMA job scheduler entities for remote interrupt and shootdown.
+ * Each entity uses one SDMA scheduler/ring.
+ *
+ * Return: 0 on success, negative error code on failure
+ */
+static int amdgpu_ualink_sdma_entities_init(struct amdgpu_device *adev)
+{
+ struct amdgpu_ualink_remote *remote = to_remote(adev);
+ struct drm_gpu_scheduler *sched;
+ u32 accel_id;
+ int i = 0, r;
+
+ dev_dbg(adev->dev, "enter\n");
+
+ for_each_set_bit(accel_id, remote->active_accel_bits, AMDGPU_UALINK_ACCEL_MAX) {
+ sched = &adev->sdma.instance[accel_id % adev->sdma.num_instances].ring.sched;
+
+ r = drm_sched_entity_init(&remote->peer[accel_id].entity, DRM_SCHED_PRIORITY_HIGH,
+ &sched, 1, NULL);
+ if (r)
+ goto out_free;
+ i++;
+ }
+
+ dev_dbg(adev->dev, "exit\n");
+ return 0;
+
+out_free:
+ for_each_set_bit(accel_id, remote->active_accel_bits, AMDGPU_UALINK_ACCEL_MAX) {
+ if (i--)
+ drm_sched_entity_destroy(&remote->peer[accel_id].entity);
+ else
+ break;
+ }
+
+ return r;
+}
+
+static void amdgpu_ualink_sdma_entities_fini(struct amdgpu_device *adev)
+{
+ struct amdgpu_ualink_remote *remote = to_remote(adev);
+ u32 accel_id;
+
+ dev_dbg(adev->dev, "enter\n");
+ for_each_set_bit(accel_id, remote->active_accel_bits, AMDGPU_UALINK_ACCEL_MAX)
+ drm_sched_entity_destroy(&remote->peer[accel_id].entity);
+ dev_dbg(adev->dev, "exit\n");
+}
+