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| author | Luca Weiss <luca.weiss@fairphone.com> | 2026-08-07 09:46:06 +0200 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-08-10 10:53:23 -0500 |
| commit | 7f6869e53f73c4ca0e622a6a1b5ac2598fee5931 (patch) | |
| tree | 5275dc16f9ea31e992fdca906e1406b3bc79b4d2 /scripts/objdiff | |
| parent | c83e1427064e6fe95604b469f4c670e1839f409a (diff) | |
| download | linux-next-7f6869e53f73c4ca0e622a6a1b5ac2598fee5931.tar.gz linux-next-7f6869e53f73c4ca0e622a6a1b5ac2598fee5931.zip | |
clk: qcom: gcc-kaanapali: Fix always-enabling PCIE_RSCC clocks
The critical_cbrcrs array will get qcom_branch_set_clk_en() called on
each entry which will set BIT(0) to enable the clock. This is however
wrong for these two PCIE_RSCC clocks which need BIT(20) and BIT(21) set
respectively to enable them.
Fixes: d1919c375f21 ("clk: qcom: Add support for Global clock controller on Kaanapali")
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20260807-various-pcie-clk-fix-v1-3-5caf78a599d7@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'scripts/objdiff')
0 files changed, 0 insertions, 0 deletions