diff options
Diffstat (limited to 'drivers/pinctrl/nxp/pinctrl-s32.h')
| -rw-r--r-- | drivers/pinctrl/nxp/pinctrl-s32.h | 35 |
1 files changed, 34 insertions, 1 deletions
diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctrl-s32.h index 8715befd5f05..028578a090e4 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32.h +++ b/drivers/pinctrl/nxp/pinctrl-s32.h @@ -2,7 +2,7 @@ * * S32 pinmux core definitions * - * Copyright 2016-2020, 2022 NXP + * Copyright 2016-2020, 2022, 2026 NXP * Copyright (C) 2022 SUSE LLC * Copyright 2015-2016 Freescale Semiconductor, Inc. * Copyright (C) 2012 Linaro Ltd. @@ -34,11 +34,42 @@ struct s32_pin_range { unsigned int end; }; +/** + * struct s32_gpio_range - contiguous GPIO pin range within a SIUL2 module + * @gpio_base: first GPIO line offset in the GPIO range + * @pin_base: first pinctrl pin number mapped by this GPIO range + * @gpio_num: number of consecutive GPIO pins in the range + * @sparse: true if the PGPD layout is non-linear (resolved via pad map only); + * pins not found in the pad map are invalid for this range + */ +struct s32_gpio_range { + unsigned int gpio_base; + unsigned int pin_base; + unsigned int gpio_num; + bool sparse; +}; + +/** + * struct s32_gpio_pad_map - mapping between GPIO ranges and PGPD pads + * @gpio_start: first GPIO line offset in the range + * @gpio_end: last GPIO line offset in the range + * @pad: PGPD pad number serving the range + */ +struct s32_gpio_pad_map { + unsigned int gpio_start; + unsigned int gpio_end; + unsigned int pad; +}; + struct s32_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; unsigned int npins; const struct s32_pin_range *mem_pin_ranges; unsigned int mem_regions; + const struct s32_gpio_range *gpio_ranges; + unsigned int num_gpio_ranges; + const struct s32_gpio_pad_map *gpio_pad_maps; + unsigned int num_gpio_pad_maps; }; struct s32_pinctrl_soc_info { @@ -53,6 +84,8 @@ struct s32_pinctrl_soc_info { #define S32_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) #define S32_PIN_RANGE(_start, _end) { .start = _start, .end = _end } +#define S32_GPIO_RANGE(gpio, pin, num) \ + { .gpio_base = gpio, .pin_base = pin, .gpio_num = num } int s32_pinctrl_probe(struct platform_device *pdev, const struct s32_pinctrl_soc_data *soc_data); |