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11 hoursMerge branch 'for-next' of ↵Mark Brown
https://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux.git
16 hoursMerge branch 'for-next' of ↵Mark Brown
https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux.git
2 dayssoc: qcom: rpmh-rsc: manage PM notifiers with devresPengpeng Hou
rpmh_rsc_probe() registers CPU PM or genpd notifiers before populating child devices. If child population fails, the CPU PM notifier path is not unwound and the genpd path needs open-coded cleanup. Use devm_pm_runtime_enable() for the genpd path and devm_add_action_or_reset() for both notifier registrations. This makes probe failure and driver detach use the same cleanup model while keeping devm_of_platform_populate() responsible for child devices. Fixes: 25092e6100ac ("soc: qcom: rpmh-rsc: Attach RSC to cluster PM domain") Signed-off-by: Pengpeng Hou <pengpeng@iscas.ac.cn> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260623015501.31129-1-pengpeng@iscas.ac.cn Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 dayssoc: qcom: Avoid SCM and SPM for cpuidle driversKrzysztof Kozlowski
QCOM_SCM and QCOM_SPM are user-selectable drivers, thus ARM_QCOM_SPM_CPUIDLE should rather avoid selecting them but instead depend to avoid any possible unmet dependencies. ARM_QCOM_SPM_CPUIDLE does use symbols from SCM and SPM, and since it cannot be built-in, the dependency must be as built-in. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-4-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 dayssoc: qcom: Make important drivers defaultKrzysztof Kozlowski
The drivers for Qualcomm SoC components are covering a basic or fundamental SoC blocks. Usually they are required for booting or to achieve basic expected functionality when running Linux. These drivers do not represent any sort of buses visible to the board designers/configurators, thus they should be always enabled, regardless how SoC is used in the final board. Kernel configuration should not ask users choice of drivers when that choice is obvious and known to the developers that answer should be 'yes' or 'module'. Switch most of the Qualcomm SoC drivers to a default 'yes' or 'module' for ARCH_QCOM, to match existing defconfig usage. This has no impact on arm64 defconfig, arm qcom_defconfig and arm multi_v7_defconfig. multi: +#define CONFIG_QCOM_PDR_HELPERS_MODULE 1 +#define CONFIG_QCOM_PBS_MODULE 1 +#define CONFIG_QCOM_AOSS_QMP 1 +#define CONFIG_QCOM_APR_MODULE 1 +#define CONFIG_QCOM_LLCC_MODULE 1 qcom: +#define CONFIG_QCOM_PDR_HELPERS_MODULE 1 +#define CONFIG_QCOM_PBS_MODULE 1 +#define CONFIG_QCOM_AOSS_QMP 1 +#define CONFIG_QCOM_APR_MODULE 1 +#define CONFIG_QCOM_SPM 1 +#define CONFIG_QCOM_LLCC_MODULE 1 The change will however enable by default all drivers for arm or arm64 COMPILE_TEST builds, whenever ARCH_QCOM is selected, which feels logical: if one selects ARCH_QCOM then probably by default wants to build test it entirely. Kernels with COMPILE_TEST are not supposed to be used for booting. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-3-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 dayssoc: qcom: Restrict drivers per ARM/ARM64Krzysztof Kozlowski
There is no point to allow selecting core SoC drivers for Qualcomm ARMv7 SoCs when building ARM64 kernel, and vice versa. This makes kernel configuration more difficult as many do not remember the Qualcomm SoCs model names/numbers and their properties like architecture. No features should be lost because: 1. There won't be a single image for ARMv7 and ARMv8/9 SoCs. 2. Newer ARMv8/9 SoCs won't be running in arm32 emulation mode. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-2-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
3 dayssoc: qcom: Hide all drivers behind selectable menuKrzysztof Kozlowski
Switch from a simple menu to menuconfig, so all Qualcomm SoC drivers will be under one selectable option, allowing to disable them all which should make kernel configuration easier when preparing a non-Qualcomm kernel. This has few benefits (functional impact of this commit): 1. Allow compile testing of QCOM_OCMEM, which previously required ARCH_QCOM. 2. Hide behind ARCH_QCOM or COMPILE_TEST drivers specific to Qualcomm which should not be available to other kernel builds: QCOM_PMIC_PDCHARGER_ULOG, QCOM_PMIC_GLINK, QCOM_SPM and QCOM_PBS. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260711-qcom-soc-kconfig-v2-1-4a907e064281@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 daysremoteproc: qcom_q6v5_pas: Switch over to generic PAS TZ APIsSumit Garg
Switch qcom_q6v5_pas client driver over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Since qcom_q6v5_pas depends on MDT loader for PAS firmware loading, it has to be switched over to generic PAS APIs in this commit to avoid any build issues. Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Tested-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> # Lemans Tested-by: Vignesh Viswanathan <vignesh.viswanathan@oss.qualcomm.com> # IPQ9650 Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702115835.167602-5-sumit.garg@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 dayssoc: qcom: ubwc: Add Shikra UBWC configNabige Aala
Add UBWC configuration for the Shikra platform. Shikra shares the same hardware as QCM2290 (Agatti), so reuse qcm2290_data for the UBWC settings Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Nabige Aala <nabige.aala@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608-shikra-display-v4-2-88a846afdd5d@oss.qualcomm.com [bjorn: Translated to new generic definitions] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
6 dayssoc: qcom: pd-mapper: Add support for QCS8300Mohammad Rafi Shaik
Add support for the Qualcomm QCS8300 SoC to the protection domain mapper. QCS8300 share the same protection domain configuration as SC8280XP, except charger_pd. Add an entry to the kernel, to avoid the need for userspace to provide this service. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608084139.1468000-3-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
6 dayssoc: qcom: pd-mapper: Add support for SA8775PMohammad Rafi Shaik
Add support for the Qualcomm SA8775P SoC to the protection domain mapper. SA8775P share the same protection domain configuration as SC8280XP with an additional gpdsp domain, except for charger_pd. Add an entry to the kernel, to avoid the need for userspace to provide this service. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260608084139.1468000-2-mohammad.rafi.shaik@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
6 dayssoc: qcom: llcc: Add configuration data for Shikra SoCKomal Bajaj
Add Last Level Cache table and configs for the Shikra SoC. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260531-shikra_llcc_conf-v1-1-fa405f5a2404@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
7 dayssoc: qcom: qcom_stats: Add SoCCP and DCP subsystems statsSneh Mankad
Add SMEM items for SoC Control Processor and Display Co-Processor subsystem stats which are present in Hawi SoC. Signed-off-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260615-add_subsystem_lpm_stats-v1-1-d40fc7c755da@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
7 dayssoc: qcom: ice: Support IP version beyond v3Manivannan Sadhasivam
This driver currently supports Inline Crypto Engine (ICE) IP version 3 and 4. But this driver fully supports v5 and should support upcoming versions as well. So extend the version check to support versions 3 and beyond. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260521131229.11199-1-mani@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: Add config for MilosLuca Weiss
Describe the Universal Bandwidth Compression (UBWC) configuration for the Milos SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20260501-milos-mdss-v3-5-58bfc58c0e13@fairphone.com [bjorn: Rebased on recent refactorings] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: deduplicate UBWC configuration dataDmitry Baryshkov
After removing all extra entries from the UBWC database it is easy to define generic entries, common for all machine classes. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-28-72f2749bc807@oss.qualcomm.com [bjorn: Dropped unused "ubwc_3_0_hbb16", per compiler warning] Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: sort out the rest of the UBWC swizzle settingsDmitry Baryshkov
Sort out the remaining UBWC swizzle values, using flags to control whether level 2 and level 3 swizzling are enabled or not. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-27-72f2749bc807@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: use fixed values for UBWC swizzle for UBWC < 4.0Dmitry Baryshkov
UBWC devices before 4.0 use standard UBWC swizzle levels. As all the drivers now use the qcom_ubwc_swizzle() helper, move those values to the helper, leaving UBWC 4.0+ intact for now. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-26-72f2749bc807@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: drop macrotile_mode from the databaseDmitry Baryshkov
All the users have been migrated to using qcom_ubwc_macrotile_mode() instead of reading the raw value from the config structure. Drop the field from struct qcom_ubwc_cfg_data and replace it with the calculated value. Split single UBWC_3_0 into UBWC_3_0 (no macrotile mode) and UBWC_3_1 (with macrotile mode). Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-25-72f2749bc807@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: drop ubwc_bank_spreadDmitry Baryshkov
According to the documentation, UBWC bank spreading should be enabled for all targets. It's just not all targets have separate bit to control it. Drop the bit from the database and make the helper always return true. If we need to change it later, the helper can be adjusted according to the programming guides. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-24-72f2749bc807@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: ubwc: drop ubwc_dec_versionDmitry Baryshkov
The ubwc_dec_version field has been inherited from the MDSS driver and it is equal to the version of the UBWC decoder in the display block only. Other IP Cores can have different UBWC decoders and so the version would vary between blocks. As the value is no longer used as is not relevant to other UBWC database consumers, drop it from the UBWC database. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520-ubwc-rework-v5-23-72f2749bc807@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: cmd-db: use C-style SPDX comment for source fileMayur Kumar
checkpatch.pl reports an improper SPDX comment style for this file: WARNING: Improper SPDX comment style for 'drivers/soc/qcom/cmd-db.c', please use '//' instead Per Documentation/process/license-rules.rst, C source files must use the '// SPDX-License-Identifier: ...' form instead of the '/* ... */' form. Fix it. Signed-off-by: Mayur Kumar <kmayur809@gmail.com> Reviewed-by: Sneh Mankad <sneh.mankad@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260510193840.59156-1-kmayur809@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
8 dayssoc: qcom: socinfo: Add SoC ID for SDM850David Heidelberg
Recognize the SDM850 SoC. Signed-off-by: David Heidelberg <david@ixit.cz> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260627-sda850-v2-2-44bf46ade42e@ixit.cz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
11 daysReplace <linux/mod_devicetable.h> by more specific <linux/device-id/*.h> (c ↵Uwe Kleine-König (The Capable Hub)
files) Replace the #include of <linux/mod_devicetable.h> by the more specific <linux/device-id/*.h> where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich <dakr@kernel.org> Acked-by: Takashi Sakamoto <o-takashi@sakamocchi.jp> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
12 dayssoc: qcom: Unify user-visible "Qualcomm" nameKrzysztof Kozlowski
Various names for Qualcomm as a company are used in user-visible config options: QCOM, Qualcomm and Qualcomm Technologies. Switch to unified "Qualcomm" so it will be easier for users to identify the options when for example running menuconfig. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260422083330.84247-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-06-17Merge tag 'soc-drivers-7.2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC driver updates from Arnd Bergmann: "There are a few added drivers, but mostly the normal maintenance to drivers for firmware, memory controller and other soc specific hardware: - The NXP QuickEngine gets modern MSI support, which allows some cleanups to the GICv3 irqchip chip driver - A new SoC specific driver for the Renesas R-Car MFIS unit is added, encapsulating support for the on-chip mailbox and hwspinlock implementations that are not easily separated into individual drivers - The Qualcomm SoC drivers add support for additional SoC implementations, and flexibility around power management for the serial-engine driver as well as probing the LLCC driver using custom hardware descriptions inside of the device itself. - Added support for the Samsung thermal management unit - A cleanup to the Tegra 'PMC' driver interfaces to remove legacy APIs and allow multiple PMC instances everywhere. - Updates to the TI SCI and KNAS drivers to improve suspend/resume support. - Minor driver changes for mediatek, xilinx, allwinner, aspeed, tegra, broadcom, amd, microchip and starfive specific drivers - Memory controller updates for Tegra and Renesas for additional SoC types and other improvements. - Firmware driver updates for Arm FF-A, SMCCC and SCMI interfaces, to update driver probing, object lifetimes and address minor bugs" * tag 'soc-drivers-7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (189 commits) Revert "firmware: zynqmp: Add dynamic CSU register discovery and sysfs interface" Revert "Documentation: ABI: add sysfs interface for ZynqMP CSU registers" memory: tegra234: drop dead NULL check in tegra234_mc_icc_aggregate() memory: tegra264: drop redundant tegra264_mc_icc_aggregate() memory: tegra186-emc: stop borrowing MC aggregate hook for EMC soc: aspeed: cleanup dead default for ASPEED_SOCINFO firmware: tegra: bpmp: Add support for multi-socket platforms firmware: tegra: bpmp: Propagate debugfs errors soc/tegra: pmc: Add Tegra238 support soc/tegra: pmc: Restrict power-off handler to Nexus 7 soc/tegra: pmc: Populate powergate debugfs only when needed soc/tegra: pmc: Move legacy code behind CONFIG_ARM guard soc/tegra: pmc: Remove unused legacy functions soc/tegra: pmc: Create PMC context dynamically firmware: samsung: acpm: remove compile-testing stubs firmware: samsung: acpm: Add devm_acpm_get_by_phandle helper firmware: samsung: acpm: Add TMU protocol support firmware: samsung: acpm: Make acpm_ops const and access via pointer firmware: samsung: acpm: Drop redundant _ops suffix in acpm_ops members firmware: samsung: acpm: Annotate rx_data->cmd with __counted_by_ptr ...
2026-06-15Merge tag 'thermal-7.2-rc1' of ↵Linus Torvalds
gitolite.kernel.org:pub/scm/linux/kernel/git/rafael/linux-pm Pull thermal control updates from Rafael Wysocki: "These add new hardware support (i.MX93 TMU, Amlogic T7, Intel Arrow Lake, QCom Nord, Shikra and Hawi), fix issues in a number of places in the thermal control core and drivers, clean up code and refactor it in preparation for future changes: - Rework the initialization and cleanup of thermal class cooling devices to separate DT-based cooling device registration and cooling device registration without DT (Daniel Lezcano, Ovidiu Panait) - Update the cooling device DT bindings to support 3-cell cooling device representation, where the additional cell holds an ID to select a cooling mechanism for devices that offer multiple cooling mechanisms, and adjust the cooling device registration code accordingly (Gaurav Kohli, Daniel Lezcano) - Remove dead code from two functions in the thermal core and simplify the unregistration of thermal governors (Rafael Wysocki) - Fix critical temperature attribute removal handling in the generic thermal zone hwmon support code and rework that code to register a separate hwmon class device for each thermal zone (instead of using one hwmon class device for all thermal zones of the same type) to address thermal zone removal deadlocks (Rafael Wysocki) - Use attribute groups for adding temperature attributes to hwmon class devices associated with thermal zones (Rafael Wysocki) - Pass WQ_UNBOUND when allocating the thermal workqueue (Marco Crivellari) - Fix potential shift overflow in ptc_mmio_write() and improve error handling in proc_thermal_ptc_add() in the int340x thermal control driver (Aravind Anilraj) - Use sysfs_emit() for cpumask printing in the Intel powerclamp thermal driver (Yury Norov) - Add Arrow Lake CPU models to the intel_tcc_cooling driver (Srinivas Pandruvada) - Add QCom Nord, Shikra and Hawi temperature sensor DT bindings (Deepti Jaggi, Gaurav Kohli, Dipa Ramesh Mantre) - Use devm_add_action_or_reset() for clock disable on the NVidia soctherm and switch it to devm cooling device registration version (Daniel Lezcano) - Add the Amlogic T7 thermal sensor along with thermal calibration data read from SMC calls (Ronald Claveau) - Fix atomic temperature read in the QCom tsens driver to comply with hardware documentation (Priyansh Jain) - Add SpacemiT K1 thermal sensor support (Shuwei Wu) - Add i.MX93 temperature sensor support and filter out the invalid temperature (Jacky Bai) - Enable by default the TMU (Thermal Monitoring Unit) on Exynos platform (Krzysztof Kozlowski) - Rework interrupt initialization in the Tsens driver and add the optional wakeup source (Priyansh Jain) - Fix typo in a comment in the TSens QCom driver (Jinseok Kim) - Fix trailing whitespace and repeated word in the OF code, remove quoted string splitting across lines from the iMX7 driver, and remove a stray space from the thermal_trip_of_attr() macro definition (Mayur Kumar) - Update the thermal testing facility code to avoid NULL pointer dereferences by rejecting missing command arguments and replace sscanf() with kstrtoint() or kstrtoul() in that code (Ovidiu Panait, Samuel Moelius)" * tag 'thermal-7.2-rc1' of gitolite.kernel.org:pub/scm/linux/kernel/git/rafael/linux-pm: (54 commits) thermal: sysfs: Replace sscanf() with kstrtoul() thermal: testing: Replace sscanf() with kstrtoint() thermal: testing: reject missing command arguments thermal: intel: intel_tcc_cooling: Add Arrow Lake CPU models thermal/drivers/qcom/tsens: Disable wakeup interrupt setup on automotive targets thermal/drivers/qcom/tsens: Switch wake IRQ handling to PM callbacks thermal/core: Fix missing stub for devm_thermal_cooling_device_register dt-bindings: thermal: cooling-devices: Update support for 3 cells cooling device thermal/of: Support cooling device ID in cooling-spec thermal/of: Pass cdev_id and introduce devm registration helper thermal/of: Add cooling device ID support thermal/of: Rename the devm_thermal_of_cooling_device_register() function thermal/core: Make cooling device OF node conditional on CONFIG_THERMAL_OF thermal/of: Move cooling device OF helpers out of thermal core hwmon: Use non-OF thermal cooling device registration API thermal/core: Add devm_thermal_cooling_device_register() thermal/core: Introduce non-OF thermal_cooling_device_register() thermal/drivers/samsung: Enable TMU by default thermal/driver/qoriq: Workaround unexpected temperature readings from tmu thermal/drivers/qoriq: Add i.MX93 tmu support ...
2026-06-03thermal/of: Rename the devm_thermal_of_cooling_device_register() functionDaniel Lezcano
To clarify that the function operates on child nodes, rename: devm_thermal_of_cooling_device_register() | v devm_thermal_of_child_cooling_device_register() Used the command: find . -type f -name '*.[ch]' -exec \ sed -i 's/devm_thermal_of_cooling_device_register/\ devm_thermal_of_child_cooling_device_register/g' {} \; Did not used clang-format-diff because it does not indent correctly and checkpatch complained. Manually reindented to make checkpatch happy This prepares for upcoming support of cooling devices identified by an ID rather than device tree child nodes. No functional change. Signed-off-by: Daniel Lezcano <daniel.lezcano@oss.qualcomm.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org> Reviewed-by: Lukasz Luba <lukasz.luba@arm.com> Acked-by: Rafael J. Wysocki (Intel) <rafael@kernel.org> Link: https://patch.msgid.link/20260526140802.1059293-18-daniel.lezcano@oss.qualcomm.com
2026-05-21Merge branch '20260227061544.1785978-1-praveen.talari@oss.qualcomm.com' into ↵Bjorn Andersson
drivers-for-7.2 Merge the refactoring and helper functions in the Qualcomm GENI Serial Engine driver through a topic branch. These changes will provide the ability to add support managing power and performance for the GENI instances in platforms where these are controlled as SCMI resources. The patches are merged through a topic branch to avoid conflicts with other changes, while making them available to other subsystems. Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Introduce helper APIs for performance controlPraveen Talari
The GENI Serial Engine (SE) drivers (I2C, SPI, and SERIAL) currently manage performance levels and operating points directly. This resulting in code duplication across drivers. such as configuring a specific level or find and apply an OPP based on a clock frequency. Introduce two new helper APIs, geni_se_set_perf_level() and geni_se_set_perf_opp(), addresses this issue by providing a streamlined method for the GENI Serial Engine (SE) drivers to find and set the OPP based on the desired performance level, thereby eliminating redundancy. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-8-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Introduce helper API for attaching power domainsPraveen Talari
The GENI Serial Engine drivers (I2C, SPI, and SERIAL) currently handle the attachment of power domains. This often leads to duplicated code logic across different driver probe functions. Introduce a new helper API, geni_se_domain_attach(), to centralize the logic for attaching "power" and "perf" domains to the GENI SE device. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-7-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Add resources activation/deactivation helpersPraveen Talari
The GENI SE protocol drivers (I2C, SPI, UART) implement similar resource activation/deactivation sequences independently, leading to code duplication. Introduce geni_se_resources_activate()/geni_se_resources_deactivate() to power on/off resources.The activate function enables ICC, clocks, and TLMM whereas the deactivate function disables resources in reverse order including OPP rate reset, clocks, ICC and TLMM. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-6-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Handle core clk in geni_se_clks_off() and geni_se_clks_on()Praveen Talari
Currently, core clk is handled individually in protocol drivers like the I2C driver. Move this clock management to the common clock APIs (geni_se_clks_on/off) that are already present in the common GENI SE driver to maintain consistency across all protocol drivers. Core clk is now properly managed alongside the other clocks (se->clk and wrapper clocks) in the fundamental clock control functions, eliminating the need for individual protocol drivers to handle this clock separately. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-5-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Introduce helper API for resource initializationPraveen Talari
The GENI Serial Engine drivers (I2C, SPI, and SERIAL) currently duplicate code for initializing shared resources such as clocks and interconnect paths. Introduce a new helper API, geni_se_resources_init(), to centralize this initialization logic, improving modularity and simplifying the probe function. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-4-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Add geni_icc_set_bw_ab() functionPraveen Talari
Add a new function geni_icc_set_bw_ab() that allows callers to set average bandwidth values for all ICC (Interconnect) paths in a single call. This function takes separate parameters for core, config, and DDR average bandwidth values and applies them to the respective ICC paths. This provides a more convenient API for drivers that need to configure specific average bandwidth values. Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-3-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: geni-se: Refactor geni_icc_get() and make qup-memory ICC path ↵Praveen Talari
optional The "qup-memory" interconnect path is optional and may not be defined in all device trees. Unroll the loop-based ICC path initialization to allow specific error handling for each path type. The "qup-core" and "qup-config" paths remain mandatory and will fail probe if missing, while "qup-memory" is now handled as optional and skipped when not present in the device tree. Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Reviewed-by: Mukesh Kumar Savaliya <mukesh.savaliya@oss.qualcomm.com> [...] Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Link: https://lore.kernel.org/r/20260227061544.1785978-2-praveen.talari@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: llcc-qcom: Fix NULL vs IS_ERR() bug in qcom_llcc_get_fw_config()Dan Carpenter
The devm_memremap() function doesn't return NULL, it returns error pointers. Fix the error checking to match. Fixes: ac23106a9b9a ("soc: qcom: llcc-qcom: get SCT descriptors from fw-populated memory") Signed-off-by: Dan Carpenter <error27@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/ag1N_rAHEQ1YJsa7@stanley.mountain Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: ice: Fix the error code when 'qcom,ice' property is not foundManivannan Sadhasivam
When both 'ice' reg entry and 'qcom,ice' property are not found in DT, then it implies that ICE is not supported. So return -EOPNOTSUPP instead of -ENODEV to client drivers to specify ICE functionality is not supported. Fixes: b9ab7217dd7d ("soc: qcom: ice: Return proper error codes from devm_of_qcom_ice_get() instead of NULL") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Closes: https://lore.kernel.org/linux-arm-msm/8bac0358-9da0-4cbb-98ee-333b85ba4908@samsung.com Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260520155704.130803-1-manivannan.sadhasivam@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-21soc: qcom: llcc-qcom: Add support for ElizaAbel Vesa
Eliza uses a 4-region LLCC register layout made up of two per-bank base register regions together with the broadcast OR and AND regions. So add this SoC specific configuration and its compatible string. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260513-eliza-llcc-v2-2-27381ae833d5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: socinfo: Add SoC ID for Nord SA8797PDeepti Jaggi
Add Nord SA8797P SoC ID to socinfo driver. Signed-off-by: Deepti Jaggi <deepti.jaggi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260427003531.229671-3-shengchao.guo@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: socinfo: Add SoC ID for SM7750Alexander Koskovich
Recognize the SM7750 SoC which is an Eliza SoC variant. Signed-off-by: Alexander Koskovich <akoskovich@pm.me> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260412-sm7550-id-v1-2-958a673ff791@pm.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: socinfo: Add PMIC PMAU0102Shawn Guo
Add PMAU0102 found on Nord boards to pmic_models array. Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260419131523.1232835-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: socinfo: Add PMIV0102 & PMIV0104 PMICsAlexander Koskovich
Add the PMIV0102 and PMIV0104 to the pmic_models array. Signed-off-by: Alexander Koskovich <akoskovich@pm.me> Link: https://lore.kernel.org/r/20260413-add-pmic-ids-v1-1-1f40b8773ef8@pm.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18Merge branch '20260518-qcom-ice-fix-v7-0-2a595382185b@oss.qualcomm.com' into ↵Bjorn Andersson
drivers-for-7.2 Merge the fixes for ICE driver race condition through a topic branch, to allow sharing it with other subsystems as well.
2026-05-18soc: qcom: ice: Return proper error codes from devm_of_qcom_ice_get() ↵Manivannan Sadhasivam
instead of NULL devm_of_qcom_ice_get() currently returns NULL if ICE SCM is not available or "qcom,ice" property is not found in DT. But this confuses the clients since NULL doesn't convey the reason for failure. So return proper error codes instead of NULL. Reported-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com> # OP-TEE as TZ Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260518-qcom-ice-fix-v7-3-2a595382185b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: ice: Return -ENODEV if the ICE platform device is not foundManivannan Sadhasivam
By the time the consumer driver calls devm_of_qcom_ice_get(), all the platform devices for ICE nodes would've been created by of_platform_default_populate(). So for the absence of any platform device, -ENODEV should not returned, not -EPROBE_DEFER. Fixes: 2afbf43a4aec ("soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver") Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com> # OP-TEE as TZ Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260518-qcom-ice-fix-v7-2-2a595382185b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-18soc: qcom: ice: Fix race between qcom_ice_probe() and of_qcom_ice_get()Manivannan Sadhasivam
The current platform driver design causes probe ordering races with consumers (UFS, eMMC) due to ICE's dependency on SCM firmware calls. If ICE probe fails (missing ICE SCM or DT registers), devm_of_qcom_ice_get() loops with -EPROBE_DEFER, leaving consumers non-functional even when ICE should be gracefully disabled. devm_of_qcom_ice_get() doesn't know if the ICE driver probe has failed due to above reasons or it is waiting for the SCM driver. Moreover, there is no devlink dependency between ICE and consumer drivers as 'qcom,ice' is not considered as a DT 'supplier'. So the consumer drivers have no idea of when the ICE driver is going to probe. To address these issues, store the error pointer in a global xarray with ice node phandle as a key during probe in addition to the valid ice pointer and synchronize both qcom_ice_probe() and of_qcom_ice_get() using a mutex. If the xarray entry is NULL, then it implies that the driver is not probed yet, so return -EPROBE_DEFER. If it has any error pointer, return that error pointer directly. Otherwise, add the devlink as usual and return the valid pointer to the consumer. Xarray is used instead of platform drvdata, since driver core frees the drvdata during probe failure. So it cannot be used to pass the error pointer to the consumers. Note that this change only fixes the standalone ICE DT node bindings and not the ones with 'ice' range embedded in the consumer nodes, where there is no issue. Fixes: 2afbf43a4aec ("soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver") Reported-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Tested-by: Sumit Garg <sumit.garg@oss.qualcomm.com> # OP-TEE as TZ Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Cc: stable@vger.kernel.org # 6.4 Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260518-qcom-ice-fix-v7-1-2a595382185b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13soc: qcom: pd-mapper: Add support for Hawi SoCMukesh Ojha
Hawi uses the same protection domain layout as Kaanapali, so reuse the kaanapali_domains table. Also add the missing adsp_ois_pd entry (OIS protection domain, instance_id 74) to kaanapali_domains, which is required by both Kaanapali and Hawi. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260506110226.2256249-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13soc: qcom: llcc-qcom: Capitalize LLCC/EDAC in comments and diagnosticsFrancisco Munoz Ruiz
Capitalize occurrences of the acronym "LLCC" and "EDAC" in comments and diagnostic text to improve consistency and readability. Signed-off-by: Francisco Munoz Ruiz <francisco.ruiz@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260407-external_llcc_changes2set-v2-3-b5017ce2020b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-05-13soc: qcom: llcc-qcom: get SCT descriptors from fw-populated memoryFrancisco Munoz Ruiz
Retrieve System Cache Table (SCT) descriptors from a shared memory region populated by firmware. SCT initialization and programming are performed entirely by firmware outside of Linux. The LLCC driver only consumes the pre-initialized descriptor data and does not configure SCT itself. Support this mechanism for future SoCs that provide SCT programming via firmware. Signed-off-by: Francisco Munoz Ruiz <francisco.ruiz@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260407-external_llcc_changes2set-v2-2-b5017ce2020b@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-07-14 04:04:53 +0000