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| author | Stefano Radaelli <stefano.r@variscite.com> | 2026-06-08 16:41:04 +0200 |
|---|---|---|
| committer | Frank Li <Frank.Li@nxp.com> | 2026-06-29 14:56:25 -0400 |
| commit | 342414b800bfea45cbc118d51dc66a066411c033 (patch) | |
| tree | 41535144400ead228687592ca14cd1938b47662c | |
| parent | 9497ab2868eec57352b72ada3efec10e0428bb3e (diff) | |
| download | linux-stable-342414b800bfea45cbc118d51dc66a066411c033.tar.gz linux-stable-342414b800bfea45cbc118d51dc66a066411c033.zip | |
arm64: dts: imx8mp-var-som-symphony: add TPM support
Add the ST33KTPM2XI2C TPM device on the Symphony carrier board.
Enable the I2C4 bus, add the PCAL6408 GPIO expander used by the TPM and
describe the TPM reset line.
Signed-off-by: Stefano Radaelli <stefano.r@variscite.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts index cb27853ba281..7cf58198ef14 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts @@ -116,6 +116,31 @@ }; }; +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default", "gpio", "sleep"; + pinctrl-0 = <&pinctrl_i2c4>; + pinctrl-1 = <&pinctrl_i2c4_gpio>; + pinctrl-2 = <&pinctrl_i2c4_gpio>; + scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status = "okay"; + + pcal6408: gpio@21 { + compatible = "nxp,pcal6408"; + reg = <0x21>; + #gpio-cells = <2>; + gpio-controller; + }; + + st33ktpm2xi2c: tpm@2e { + compatible = "st,st33ktpm2xi2c", "tcg,tpm-tis-i2c"; + reg = <0x2e>; + label = "tpm"; + reset-gpios = <&pcal6408 4 GPIO_ACTIVE_LOW>; + }; +}; + &snvs_pwrkey { status = "okay"; }; @@ -201,6 +226,20 @@ >; }; + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2 + MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2 + >; + }; + + pinctrl_i2c4_gpio: i2c4gpiogrp { + fsl,pins = < + MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20 0x400001c2 + MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x400001c2 + >; + }; + pinctrl_pca9534: pca9534grp { fsl,pins = < MX8MP_IOMUXC_GPIO1_IO15__GPIO1_IO15 0xc0 |