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| author | Stephan Gerhold <stephan.gerhold@linaro.org> | 2026-07-07 13:56:01 +0200 |
|---|---|---|
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | 2026-07-17 17:47:41 +0200 |
| commit | 4529aababe4212b9b6d70e83ceb6a99f9691c811 (patch) | |
| tree | 05c85fba3d64eda776e94f216a94c7a1fe618625 /scripts/Makefile.thinlto | |
| parent | adfc275b317c02cd043b0cf28b8cfb7459b041f0 (diff) | |
| download | linux-stable-4529aababe4212b9b6d70e83ceb6a99f9691c811.tar.gz linux-stable-4529aababe4212b9b6d70e83ceb6a99f9691c811.zip | |
dt-bindings: mtd: qcom,nandc: Add MDM9607 QPIC NAND controller
Add the qcom,mdm9607-nand compatible for the QPIC NAND controller used
inside the MDM9607 SoC.
On MDM9607 and other recent SoCs, the QPIC hardware requires 3 clocks
(core, aon, ahb). However, access to these clocks is restricted to the RPM
firmware that controls the shared power resources for the whole SoC. The
clocks cannot be controlled separately, for the OS view of the hardware
there is only a single RPM_SMD_QPIC_CLK clock that implicitly enables all
of the 3 clocks. The only exception to this are some IPQ* SoC that are not
using RPM, there the clocks are directly controlled by the kernel via the
clock controller (GCC). Require only one clock in the dt-bindings for
MDM9607 to avoid having to define dummy clock entries.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'scripts/Makefile.thinlto')
0 files changed, 0 insertions, 0 deletions
