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| author | Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> | 2026-07-29 18:50:05 +0200 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2026-08-11 18:21:09 -0500 |
| commit | d4c79b63d82d408c81f1629bcdc8cdbeebd85014 (patch) | |
| tree | a538973c6e6e6f36ba67c8958be6e487955f38e2 /scripts | |
| parent | dc59e4fea9d83f03bad6bddf3fa2e52491777482 (diff) | |
| download | linux-stable-d4c79b63d82d408c81f1629bcdc8cdbeebd85014.tar.gz linux-stable-d4c79b63d82d408c81f1629bcdc8cdbeebd85014.zip | |
PCI: Allow D3 for native hotplug-capable Root Ports on non-x86 platforms
Commit eb3b5bf1a88d ("PCI: Whitelist native hotplug ports for runtime D3"),
prevented native hotplug-capable Root Ports from entering D3 citing issues
on old Intel SkyLake Xeon-SP platform.
But there is no reason to restrict D3 for native hotplug-capable Root Ports
on non-x86 platforms. We recently enabled D3 on non hotplug-capable Root
Ports on non-x86 platforms (specifically for DT platforms) in commit
a5fb3ff63287 ("PCI: Allow PCI bridges to go to D3Hot on all non-x86"). So
do the same for native hotplug-capable Root Ports as well.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://patch.msgid.link/20260729165005.896725-1-manivannan.sadhasivam@oss.qualcomm.com
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions