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| author | Oleksij Rempel <o.rempel@pengutronix.de> | 2023-01-31 09:46:32 +0100 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2023-03-06 10:01:46 +0800 |
| commit | 03c8a3c719884cb6a7e0f1cb328d58ee13d445d7 (patch) | |
| tree | 0fb6b050f6565133f29dffcf37685f1c16776ae1 | |
| parent | 887185649c7ee8a9cc2d4e94de92bbbae6cd3747 (diff) | |
| download | linux-03c8a3c719884cb6a7e0f1cb328d58ee13d445d7.tar.gz linux-03c8a3c719884cb6a7e0f1cb328d58ee13d445d7.zip | |
ARM: dts: imx6dl-prtmvt: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6dl-prtmvt.dts | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/imx6dl-prtmvt.dts b/arch/arm/boot/dts/imx6dl-prtmvt.dts index 1f8cddd83ccb..5f4fa796ca18 100644 --- a/arch/arm/boot/dts/imx6dl-prtmvt.dts +++ b/arch/arm/boot/dts/imx6dl-prtmvt.dts @@ -193,6 +193,7 @@ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; + clock-output-names = "enet_ref_pad"; }; reg_1v8: regulator-1v8 { @@ -293,8 +294,10 @@ }; &clks { - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; + clocks = <&clk50m_phy>; + clock-names = "enet_ref_pad"; + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_ENET_REF_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, <&clk50m_phy>; }; &ecspi1 { @@ -314,10 +317,6 @@ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - clocks = <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET>, - <&clk50m_phy>; - clock-names = "ipg", "ahb", "ptp"; phy-handle = <&rmii_phy>; status = "okay"; |