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authorFrancesco Dolcini <francesco.dolcini@toradex.com>2026-04-09 11:58:50 +0200
committerFrank Li <Frank.Li@nxp.com>2026-05-19 14:14:00 -0400
commit097418652e6ab85d4c737c01f3e024fb2399b289 (patch)
treec66d186550c4e567ad86fd981065f68da5a919d6
parentde2e5e6c695a6fe5cfa780cd63ade651a6508d00 (diff)
downloadlinux-097418652e6ab85d4c737c01f3e024fb2399b289.tar.gz
linux-097418652e6ab85d4c737c01f3e024fb2399b289.zip
arm64: dts: freescale: imx8mp-verdin: Split UART_2 pinctrl group
Some carrier board reuse the UART_2 control signals as GPIO, split the pinctrl RTS/CTS in separated nodes to maximize flexibility. Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
index d31f8082394f..9fee2cf9ef54 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp-verdin.dtsi
@@ -846,7 +846,7 @@
/* Verdin UART_2 */
&uart2 {
pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_uart2>;
+ pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart2_cts>, <&pinctrl_uart2_rts>;
uart-has-rtscts;
};
@@ -1277,10 +1277,18 @@
<MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x1c4>; /* SODIMM 131 */
};
+ pinctrl_uart2_cts: uart2ctsgrp {
+ fsl,pins =
+ <MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4>; /* SODIMM 143 */
+ };
+
+ pinctrl_uart2_rts: uart2rtsgrp {
+ fsl,pins =
+ <MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4>; /* SODIMM 141 */
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins =
- <MX8MP_IOMUXC_SD1_DATA4__UART2_DCE_RTS 0x1c4>, /* SODIMM 143 */
- <MX8MP_IOMUXC_SD1_DATA5__UART2_DCE_CTS 0x1c4>, /* SODIMM 141 */
<MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x1c4>, /* SODIMM 137 */
<MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x1c4>; /* SODIMM 139 */
};