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| author | Imran Shaik <imran.shaik@oss.qualcomm.com> | 2026-07-18 18:26:11 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2026-07-30 22:35:24 -0500 |
| commit | 11345cbf17cacc3828f7bcb021ecc07c687d04f2 (patch) | |
| tree | 09552a2f21bfee37ea7c862aeaf422e743ced8fb | |
| parent | b8b5b26aa10e57c154ceb7d32d573afb864823aa (diff) | |
| download | linux-11345cbf17cacc3828f7bcb021ecc07c687d04f2.tar.gz linux-11345cbf17cacc3828f7bcb021ecc07c687d04f2.zip | |
clk: qcom: dispcc-qcm2290: Enable runtime PM support
The QCM2290 DISPCC is now associated with a power domain (RPMPD_CX) to
propagate genpd performance state votes to the CX rail. Set use_rpm to
true so that a runtime PM reference is acquired and released around probe,
instead of leaving a permanent 'enable' vote on the power domain.
Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-4-62703e05ef0f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/clk/qcom/dispcc-qcm2290.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 1c21267ae0f7..3b6f537f03ba 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -516,6 +516,7 @@ static const struct qcom_cc_desc disp_cc_qcm2290_desc = { .num_gdscs = ARRAY_SIZE(disp_cc_qcm2290_gdscs), .resets = disp_cc_qcm2290_resets, .num_resets = ARRAY_SIZE(disp_cc_qcm2290_resets), + .use_rpm = true, .driver_data = &disp_cc_qcm2290_driver_data, }; |