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| author | Frank Li <Frank.Li@nxp.com> | 2025-01-28 16:15:58 -0500 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2025-02-25 08:32:59 +0800 |
| commit | 1ecc4dbf6acef3c2ec3e930b62f35c5e212bb998 (patch) | |
| tree | e07b45a7255b137f162757af769bd51fb180d376 | |
| parent | c95fc1e1f618d377ada7387d06db52ac79b7570b (diff) | |
| download | linux-1ecc4dbf6acef3c2ec3e930b62f35c5e212bb998.tar.gz linux-1ecc4dbf6acef3c2ec3e930b62f35c5e212bb998.zip | |
arm64: dts: imx95: add PCIe's msi-map and iommu-map property
Add PCIe's msi-map and iommu-map property because i.MX95 support smmu and
its.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx95.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi b/arch/arm64/boot/dts/freescale/imx95.dtsi index 0b64a1df3c7a..3af13173de4b 100644 --- a/arch/arm64/boot/dts/freescale/imx95.dtsi +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi @@ -1615,6 +1615,12 @@ assigned-clock-parents = <0>, <0>, <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + /* pcie0's Devid(BIT[7:6]) is 0x00, stream id(BIT[5:0]) is 0x10~0x17 */ + msi-map = <0x0 &its 0x10 0x1>, + <0x100 &its 0x11 0x7>; + iommu-map = <0x000 &smmu 0x10 0x1>, + <0x100 &smmu 0x11 0x7>; + iommu-map-mask = <0x1ff>; fsl,max-link-speed = <3>; status = "disabled"; }; @@ -1682,6 +1688,14 @@ assigned-clock-parents = <0>, <0>, <&scmi_clk IMX95_CLK_SYSPLL1_PFD1_DIV2>; power-domains = <&scmi_devpd IMX95_PD_HSIO_TOP>; + /* pcie1's Devid(BIT[7:6]) is 0x10, stream id(BIT[5:0]) is 0x18~0x1f */ + msi-map = <0x0 &its 0x98 0x1>, + <0x100 &its 0x99 0x7>; + msi-map-mask = <0x1ff>; + /* smmu have not Devid(BIT[7:6]) */ + iommu-map = <0x000 &smmu 0x18 0x1>, + <0x100 &smmu 0x19 0x7>; + iommu-map-mask = <0x1ff>; fsl,max-link-speed = <3>; status = "disabled"; }; |