diff options
| author | Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> | 2026-07-08 18:28:49 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-07-14 10:36:37 +0200 |
| commit | 24afcb87e6aca1ff3face276223eeea0012f8e2b (patch) | |
| tree | f331fff4e935210466c88b0d4322930d0253fe3a | |
| parent | 3e7259fb8a31c8b784628cfc417998447b0e5629 (diff) | |
| download | linux-24afcb87e6aca1ff3face276223eeea0012f8e2b.tar.gz linux-24afcb87e6aca1ff3face276223eeea0012f8e2b.zip | |
arm64: dts: renesas: r9a09g047: Fix PCIe dma-ranges memory space code
The RZ/G3E SoC supports up to 8 GiB of memory. Update the PCIe dma-ranges
property to use the 64-bit prefetchable memory space code.
Fixes: 1ac57c9830cb ("arm64: dts: renesas: r9a09g047: Add PCIe node")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260708172849.227915-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi index 310f988a63c4..73757e8e2197 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi @@ -1447,7 +1447,7 @@ reg = <0 0x13400000 0 0x10000>; ranges = <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, <0x43000000 4 0x40000000 4 0x40000000 6 0x00000000>; - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 2 0x00000000>; + dma-ranges = <0x43000000 0 0x40000000 0 0x40000000 2 0x00000000>; bus-range = <0x0 0xff>; interrupts = <GIC_SPI 800 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 801 IRQ_TYPE_LEVEL_HIGH>, |